STRUCTURE WITH INDUCTOR AND MIM CAPACITOR
    24.
    发明申请
    STRUCTURE WITH INDUCTOR AND MIM CAPACITOR 有权
    电感和MIM电容结构

    公开(公告)号:US20160163693A1

    公开(公告)日:2016-06-09

    申请号:US14588991

    申请日:2015-01-05

    CPC classification number: H01L28/60 H01L28/10 H01L28/87 H01L28/91

    Abstract: A structure with an inductor and a MIM capacitor is provided. The structure includes a dielectric layer, an inductor and a MIM capacitor. The inductor and the MIM capacitor are disposed within the dielectric layer. The inductor includes a core and a wire surrounding the core. The MIM capacitor includes a top electrode, a bottom electrode and an insulating layer. The top electrode or the bottom electrode includes a material which forms the core.

    Abstract translation: 提供具有电感器和MIM电容器的结构。 该结构包括电介质层,电感器和MIM电容器。 电感器和MIM电容器设置在电介质层内。 电感器包括芯和围绕芯的导线。 MIM电容器包括顶电极,底电极和绝缘层。 顶部电极或底部电极包括形成芯的材料。

    SEMICONDUCTOR DEVICE
    25.
    发明申请

    公开(公告)号:US20250006723A1

    公开(公告)日:2025-01-02

    申请号:US18225706

    申请日:2023-07-25

    Inventor: ZHIBIAO ZHOU

    Abstract: A semiconductor device includes a first metal-oxide semiconductor (MOS) transistor on a substrate, a pickup region adjacent to one side of the first MOS transistor, and a protection diode adjacent to another side of the first MOS transistor. Preferably, the first MOS transistor includes a first gate structure on the substrate and a first source/drain region adjacent to two sides of the first gate structure, the protection diode is electrically connected to the first gate structure, and the pickup region and the protection diode include different conductive type.

    HIGH ELECTRON MOBILITY TRANSISTOR
    26.
    发明公开

    公开(公告)号:US20230335629A1

    公开(公告)日:2023-10-19

    申请号:US17746923

    申请日:2022-05-17

    Inventor: ZHIBIAO ZHOU

    CPC classification number: H01L29/778 H01L29/45 H01L29/47

    Abstract: A high electron mobility transistor (HEMT) includes a first doped layer disposed in a substrate, a mesa isolation disposed on the substrate, a gate electrode disposed on the mesa isolation, a source electrode and a drain electrode disposed adjacent to two sides of the gate electrode, a passivation layer disposed on the mesa isolation and around the source electrode and the drain electrode, a first metal line connecting the source electrode and the first doped layer, and a second metal line connecting the drain electrode and the first doped layer.

    SEMICONDUCTOR STRUCTURE
    27.
    发明申请

    公开(公告)号:US20230082878A1

    公开(公告)日:2023-03-16

    申请号:US17502026

    申请日:2021-10-14

    Abstract: A semiconductor structure includes a semiconductor on insulator (SOI) substrate, a first electrically conductive structure, and a second electrically conductive structure. The SOI substrate includes a base substrate, a buried insulation layer disposed on the base substrate, a semiconductor layer disposed on the buried insulation layer, and a trap rich layer disposed between the buried insulation layer and the base substrate. At least a part of the first electrically conductive structure and at least a part of the second electrically conductive structure are disposed in the trap rich layer. A part of the trap rich layer is disposed between the first electrically conductive structure and the second electrically conductive structure. The first electrically conductive structure, the second electrically conductive structure, and the trap rich layer disposed between the first electrically conductive structure and the second electrically conductive structure are at least a portion of an anti-fuse structure.

    SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

    公开(公告)号:US20200294933A1

    公开(公告)日:2020-09-17

    申请号:US16371077

    申请日:2019-03-31

    Inventor: ZHIBIAO ZHOU

    Abstract: A semiconductor structure is provided, the semiconductor structure includes a front oxide layer on a backside oxide layer, a front electronic component in the front oxide layer, a backside electronic component in the backside oxide layer, and a shield structure disposed between the front oxide layer and the backside oxide layer, the shield structure includes a patterned buried metal layer, two front contact structures disposed on a front surface of the patterned buried metal layer, and two back contact structures disposed on a backside of the patterned buried metal layer.

    METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
    30.
    发明申请

    公开(公告)号:US20190027607A1

    公开(公告)日:2019-01-24

    申请号:US16131014

    申请日:2018-09-13

    Abstract: The present invention provides a method for forming a semiconductor structure, the method includes: firstly, a substrate having a recess disposed therein is provided, wherein the substrate comprises a silicon substrate, next, a first element is formed in the recess and arranged along a first direction, wherein the first element is made of an oxidation semiconductor material, afterwards, a dielectric layer is formed on the first element, and a second element is formed on dielectric layer and arranged along the first direction, wherein the second element is used as the gate structure of a transistor structure.

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