公开(公告)号：US09817725B2

公开(公告)日：2017-11-14

申请号：US14514733

申请日：2014-10-15

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Chin-Yin Tsai ,  Yi-Lin Lai

IPC: G06F11/14 ,  G06F12/02

CPC classification number: G06F11/1469 ,  G06F11/1441 ,  G06F11/1451 ,  G06F12/0246 ,  G06F2201/84 ,  G06F2212/1008 ,  G06F2212/7201 ,  G06F2212/7207 ,  G06F2212/7209

Abstract: A flash memory control technique with high reliability is provided. A flash memory controller provides a volatile storage area for temporary storage of logical-to-physical address mapping data between a host and a flash memory as well as error detection codes encoded from the logical-to-physical address mapping data. When reading from the volatile storage area, the microcontroller of the flash memory controller is configured to perform an error detection procedure based on the error detection codes. The microcontroller is further configured to restore the logical-to-physical address mapping data in the volatile storage area based on a backup of the logical-to-physical address mapping data.

公开(公告)号：US20170277471A1

公开(公告)日：2017-09-28

申请号：US15166268

申请日：2016-05-27

Applicant: VIA Technologies, Inc.

Inventor： Sheng-Huei Huang ,  Yi-Lin Lai

IPC: G06F3/06 ,  G06F11/07 ,  G06F12/10

CPC classification number: G06F3/0647 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0679 ,  G06F3/0685 ,  G06F11/0727 ,  G06F11/076 ,  G06F11/079 ,  G06F11/0793 ,  G06F12/1009 ,  G06F2212/2022 ,  G06F2212/7201

Abstract: A non-volatile memory apparatus including a non-volatile storage circuit, a main memory and a controller, and an operating method thereof are provided. Each of a plurality of logical block address groups includes a plurality of logical block addresses. Each of the logical block address groups is assigned a group read-count value. An adjustment of the group read-count values is triggered by a read command of a host. When one read-count value of the group read-count values exceeds a preset range, the controller performs a scan operation to non-volatile storage blocks of the non-volatile storage circuit corresponding to a corresponding logical block address group of the read-count value, so as to check a number of error bits. The controller decides whether to perform a storage block data-moving operation to the non-volatile storage block corresponding to the corresponding logical block address group based on results of the scan operation.

公开(公告)号：US09274577B2

公开(公告)日：2016-03-01

申请号：US14490046

申请日：2014-09-18

Applicant: VIA Technologies, Inc.

Inventor： Yi-Lin Lai ,  Bo-Ming Huang ,  Kuo-Yu Wu

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/263 ,  G06F1/266 ,  G06F1/3212

Abstract: An adaptive universal serial bus (USB) charging method and system are disclosed. In a low-power state, a USB device is charged with a non-USB charging mode. The non-USB charging mode is retained when no variation of a data signal coupled to the USB device is detected. When the data signal possesses variation for a first period, it is switched to a third proprietary charging mode.

Abstract translation: 公开了一种自适应通用串行总线（USB）充电方法和系统。 在低功耗状态下，USB设备以非USB充电模式进行充电。 当不检测到耦合到USB设备的数据信号的变化时，保持非USB充电模式。 当数据信号具有第一周期的变化时，它被切换到第三专有充电模式。

公开(公告)号：US20130151731A1

公开(公告)日：2013-06-13

申请号：US13706598

申请日：2012-12-06

Applicant: Via Technologies, Inc.

Inventor： Yi-Lin Lai ,  Hao-Hsuan Chiu ,  Terrance Shih

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  G06F1/266 ,  G06F13/4068 ,  G06F13/426 ,  H02J7/0004 ,  H02J7/007

Abstract: An apparatus is provided for charging a Universal Serial Bus (USB) device according to an optimal charging mode. The apparatus includes a charging module that is configured to obtain a descriptor from the USB device upon detection of the USB device on a USB bus. The charging module includes one or more descriptor entries disposed in a memory and a controller. The one or more descriptor entries include descriptor data, for matching the descriptor to a specific descriptor entry, and charging data, that specifies the optimal charging mode for the USB device. The controller is coupled to the memory, and is configured to match the descriptor to the specific descriptor entry, and is configured to initiate the optimal charging mode on the USB bus according to the charging data.

Abstract translation: 提供了一种用于根据最佳充电模式对通用串行总线（USB）装置充电的装置。 该装置包括一个充电模块，用于在USB总线上检测到USB设备时从USB设备获取描述符。 充电模块包括设置在存储器中的一个或多个描述符条目和控制器。 一个或多个描述符条目包括描述符数据，用于将描述符与特定描述符条目进行匹配，以及指定USB设备的最佳充电模式的计费数据。 控制器耦合到存储器，并且被配置为使描述符与特定描述符条目匹配，并且被配置为根据计费数据在USB总线上启动最佳充电模式。

公开(公告)号：US11500801B2

公开(公告)日：2022-11-15

申请号：US17189176

申请日：2021-03-01

Applicant: VIA Technologies Inc.

Inventor： Yi-Lin Lai ,  Jiin Lai ,  Chin-Yin Tsai

IPC: G06F13/28 ,  G06F13/16 ,  H04L67/1097 ,  H04L67/00 ,  G06F15/78

Abstract: A computing apparatus includes a first processing circuit and a second processing circuit. The first processing circuit includes a programmable logic circuit. The second processing circuit includes a general purpose processor that is used to execute an application program to download a bitstream to the first processing circuit for programming the programmable logic circuit to implement a direct memory access (DMA) engine and at least one physical engine (PE). The DMA engine is used to access a first memory through a DMA manner. The at least one PE is used to read data to be processed from the first memory through the DMA engine. The first processing circuit and the second processing circuit are disposed in one chip.

公开(公告)号：US20210303494A1

公开(公告)日：2021-09-30

申请号：US17189176

申请日：2021-03-01

Applicant: VIA Technologies Inc.

Inventor： Yi-Lin Lai ,  Jiin Lai ,  Chin-Yin Tsai

IPC: G06F13/28 ,  G06F13/16 ,  H04L29/08

Abstract: A computing apparatus includes a first processing circuit and a second processing circuit. The first processing circuit includes a programmable logic circuit. The second processing circuit includes a general purpose processor that is used to execute an application program to download a bitstream to the first processing circuit for programming the programmable logic circuit to implement a direct memory access (DMA) engine and at least one physical engine (PE). The DMA engine is used to access a first memory through a DMA manner. The at least one PE is used to read data to be processed from the first memory through the DMA engine. The first processing circuit and the second processing circuit are disposed in one chip.

公开(公告)号：US20170285718A1

公开(公告)日：2017-10-05

申请号：US15193125

申请日：2016-06-27

Applicant: VIA Technologies, Inc.

Inventor： Yi-Lin Lai ,  Chen-Te Chen

IPC: G06F1/32 ,  G06F12/02

CPC classification number: G06F1/324 ,  G06F1/3237 ,  G06F1/3296 ,  G06F12/0238 ,  G06F13/14 ,  G06F2212/222 ,  G06F2212/251 ,  Y02D10/128 ,  Y02D50/20

Abstract: A memory apparatus and an energy-saving control method thereof are provided. The memory apparatus includes a plurality of non-volatile memory units and a control chip, and the control chip includes a specific circuit group, a memory control unit and an energy-saving control unit. The memory control unit controls an access to the non-volatile memory units. In a normal mode and during a period of accessing the non-volatile memory units by the control chip, if the non-volatile memory units are in a busy state, the energy-saving control unit controls the clock generation unit to stop outputting an internal clock signal to the specific circuit group, so as to reduce power consumption of the control chip.

公开(公告)号：US08819301B2

公开(公告)日：2014-08-26

申请号：US13706598

申请日：2012-12-06

Applicant: VIA Technologies, Inc.

Inventor： Yi-Lin Lai ,  Hao-Hsuan Chiu ,  Terrance Shih

IPC: G06F3/00 ,  G06F13/40 ,  H02J7/00 ,  G06F13/42 ,  G06F1/26

CPC classification number: G06F13/4022 ,  G06F1/266 ,  G06F13/4068 ,  G06F13/426 ,  H02J7/0004 ,  H02J7/007

Abstract: An apparatus is provided for charging a Universal Serial Bus (USB) device according to an optimal charging mode. The apparatus includes a charging module that is configured to obtain a descriptor from the USB device upon detection of the USB device on a USB bus. The charging module includes one or more descriptor entries disposed in a memory and a controller. The one or more descriptor entries include descriptor data, for matching the descriptor to a specific descriptor entry, and charging data, that specifies the optimal charging mode for the USB device. The controller is coupled to the memory, and is configured to match the descriptor to the specific descriptor entry, and is configured to initiate the optimal charging mode on the USB bus according to the charging data.

Abstract translation: 提供了一种用于根据最佳充电模式对通用串行总线（USB）装置充电的装置。 该装置包括一个充电模块，用于在USB总线上检测到USB设备时从USB设备获取描述符。 充电模块包括设置在存储器中的一个或多个描述符条目和控制器。 一个或多个描述符条目包括描述符数据，用于将描述符与特定描述符条目进行匹配，以及指定USB设备的最佳充电模式的计费数据。 控制器耦合到存储器，并且被配置为使描述符与特定描述符条目匹配，并且被配置为根据计费数据在USB总线上启动最佳充电模式。

公开(公告)号：US20130151749A1

公开(公告)日：2013-06-13

申请号：US13706579

申请日：2012-12-06

Applicant: Via Technologies, Inc.

Inventor： Yi-Lin Lai ,  Hao-Hsuan Chiu ,  Terrance Shih

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  G06F1/266 ,  G06F13/4068 ,  G06F13/426 ,  H02J7/0004 ,  H02J7/007

Abstract: An apparatus is provided for coupling a Universal Serial Bus (USB) device and a USB host. The apparatus includes a memory and a controller. The memory includes one or more descriptor entries. The controller is configured to obtain a descriptor of the USB device upon detection of the USB device on a USB bus, and compare the descriptor to a specific descriptor entry to generate a comparing result. Then the controller enables or disables a link path between the USB host and the USB device according the comparing result.

Abstract translation: 提供了用于耦合通用串行总线（USB）设备和USB主机的设备。 该装置包括存储器和控制器。 存储器包括一个或多个描述符条目。 控制器被配置为在USB总线上检测到USB设备时获得USB设备的描述符，并将描述符与特定描述符条目进行比较以生成比较结果。 然后控制器根据比较结果启用或禁用USB主机和USB设备之间的链接路径。