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    In-Memory Deep Neural Network Device Using Spin Orbit Torque (SOT) With Multi-State Weight
    21.
    发明申请
    In-Memory Deep Neural Network Device Using Spin Orbit Torque (SOT) With Multi-State Weight 有权

    公开(公告)号：US20250077834A1

    公开(公告)日：2025-03-06

    申请号：US18954415

    申请日：2024-11-20

    Applicant: Western Digital Technologies, Inc.

    Inventor： Quang LE ,  Xiaoyong LIU ,  Lei XU ,  Brian R. YORK ,  Cherngye HWANG ,  Hisashi TAKANO

    IPC: G06N3/04

    Abstract: The present disclosure is generally related to a deep neural network (DNN) device comprising a plurality of spin-orbit torque (SOT) cells. The DNN device comprises an array comprising n rows and m columns of nodes, each row of nodes coupled to one of n first conductive lines, each column of nodes coupled to one of m second conductive lines, each node of the n rows and m columns of nodes comprising a plurality of SOT cells, each SOT cell comprising: at least one SOT layer, at least one ferromagnetic (FM) layer, and a controller configured to store at least one corresponding weight of an n×m array of weights of a neural network in each of the SOT cell. The FM layer may comprise two or more domains, two or more elliptical arms, or two or more states.

    Spin Orbital Squared (SO-SO) Logic
    23.
    发明申请
    Spin Orbital Squared (SO-SO) Logic 有权

    公开(公告)号：US20240423098A1

    公开(公告)日：2024-12-19

    申请号：US18645189

    申请日：2024-04-24

    Applicant: Western Digital Technologies, Inc. ,  Tokyo Institute of Technology

    Inventor： Quang LE ,  Xiaoyong LIU ,  Brian R. YORK ,  Cherngye HWANG ,  Hisashi TAKANO ,  Nam Hai PHAM

    IPC: H10N50/85 ,  H03K19/18 ,  H10N52/80

    Abstract: The present disclosure generally relate to an integrated circuit utilizing spin orbital-spin orbital (SO-SO) logic. The integrated circuit comprises a plurality of SO-SO logic cells, where each SO-SO logic cell comprises a first spin orbit torque (SOT1) layer, a second spin orbit torque (SOT2) layer, and a ferromagnetic layer disposed between the SOT1 and SOT2 layer. Each SO-SO logic cell is configured for: a first current path that is in plane to a plane of the SOT1 layer, and a second current path that is perpendicular to a plane of the SOT2 layer, the second current path being configured to extend into the ferromagnetic layer. The integrated circuit further comprises a common voltage source connected to each SOT device, and one or more interconnects disposed between adjacent SOT devices of the plurality of SOT devices, the one or more interconnects connecting the adjacent SOT devices together.

    Tape Head With Side-Shielded Writers And Process For Making Same
    27.
    发明公开
    Tape Head With Side-Shielded Writers And Process For Making Same 审中-公开

    公开(公告)号：US20230223043A1

    公开(公告)日：2023-07-13

    申请号：US17647809

    申请日：2022-01-12

    Applicant: Western Digital Technologies, Inc.

    Inventor： Quang LE ,  Hongquan JIANG ,  Cherngye HWANG ,  David J. SEAGLE ,  Xiaoyong LIU

    IPC: G11B5/11 ,  G11B5/31

    CPC classification number: G11B5/11 ,  G11B5/3133

    Abstract: The present disclosure generally relates to a tape head of a tape drive, and methods of forming thereof. In one embodiment, a tape head for magnetic storage devices comprises a trailing shield, a leading shield, a first write pole coupled to the trailing shield, a second write pole coupled to the leading shield, and side shields spaced from the first write pole and the second write pole by a thin insulation layer. The side shields are further disposed between the trailing shield and the leading shield. In another embodiment, a tape head for magnetic storage devices comprises a main pole disposed between a trailing shield and a leading shield and a side shield disposed adjacent to the main pole. The side shield is further disposed between the trailing shield and the leading shield and spaced from the main pole by a thin insulation layer.

    AREAL DENSITY CAPABILITY IMPROVEMENT WITH A MAIN POLE SKIN
    28.
    发明申请
    AREAL DENSITY CAPABILITY IMPROVEMENT WITH A MAIN POLE SKIN 有权

    公开(公告)号：US20220358957A1

    公开(公告)日：2022-11-10

    申请号：US17868586

    申请日：2022-07-19

    Applicant: Western Digital Technologies, Inc.

    Inventor： Suping SONG ,  Zhanjie LI ,  Kuok San HO ,  Quang LE ,  Alexander M. ZELTSER

    IPC: G11B5/127 ,  G11B5/31 ,  G11B5/23

    Abstract: The present disclosure generally relates to data storage devices, and more specifically, to a magnetic media drive employing a magnetic recording head. The head includes a main pole at a media facing surface (MFS), a trailing shield at the MFS, and a heavy metal layer disposed between the main pole and the trailing shield at the MFS. Spin-orbit torque (SOT) is generated from the heavy metal layer and transferred to a surface of the main pole as a current passes through the heavy metal layer in a cross-track direction. The SOT executes a torque on the surface magnetization of the main pole, which reduces the magnetic flux shunting from the main pole to the trailing shield. With the reduced magnetic flux shunting from the main pole to the trailing shield, write-ability is improved.

    Bismuth Antimony Alloys for Use as Topological Insulators
    29.
    发明申请
    Bismuth Antimony Alloys for Use as Topological Insulators 有权

    公开(公告)号：US20210408370A1

    公开(公告)日：2021-12-30

    申请号：US16917334

    申请日：2020-06-30

    Applicant: Western Digital Technologies, Inc.

    Inventor： Brian R. YORK ,  Cherngye HWANG ,  Alan SPOOL ,  Michael GRIBELYUK ,  Quang LE

    IPC: H01L43/10 ,  H01L27/22 ,  H01L43/06 ,  H01L43/04 ,  H03B15/00

    Abstract: A SOT device includes a bismuth antimony dopant element (BiSbE) alloy layer over a substrate. The BiSbE alloy layer is used as a topological insulator. The BiSbE alloy layer includes bismuth, antimony, AND a dopant element. The dopant element is a non-metallic dopant element, a metallic dopant element, and combinations thereof. Examples of metallic dopant elements include Ni, Co, Fe, CoFe, NiFe, NiCo, NiCu, CoCu, NiAg, CuAg, Cu, Al, Zn, Ag, Ga, In, or combinations thereof. Examples of non-metallic dopant elements include Si, P, Ge, or combinations thereof. The BiSbE alloy layer can include a plurality of BiSb lamellae layers and one or more dopant element lamellae layers. The BiSbE alloy layer has a (012) orientation.

    DUAL WRITER FOR ADVANCED MAGNETIC RECORDING
    30.
    发明申请
    DUAL WRITER FOR ADVANCED MAGNETIC RECORDING 有权

    公开(公告)号：US20210158839A1

    公开(公告)日：2021-05-27

    申请号：US17001593

    申请日：2020-08-24

    Applicant: Western Digital Technologies, Inc.

    Inventor： Thao A. NGUYEN ,  Michael Kuok San HO ,  Zhigang BAI ,  Zhanjie LI ,  Quang LE

    IPC: G11B5/09 ,  G11B5/31 ,  G11B5/187 ,  G11B5/60 ,  G11B5/40 ,  G11B5/23

    Abstract: The present disclosure generally relates to a magnetic media drive employing a magnetic recording head. The magnetic recording head comprises a first write head, a second write head, at least one read head, and a thermal fly height control element. The first write head is a wide writing write head comprising a first main pole and a first trailing shield. The second write head a narrow writing write head comprising a second main pole, a trailing gap, a second trailing shield, and one or more side shields. The first main pole has a shorter height and a greater width than the second main pole. The second main pole has a curved or U-shaped surface disposed adjacent to the trailing gap. The thermal fly height control element and the at least one read head are aligned with a center axis of the second main pole of the second write head.

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