公开(公告)号：US20080135901A1

公开(公告)日：2008-06-12

申请号：US11939955

申请日：2007-11-14

申请人： Yoshiro SHIMOJO ,  Susumu Shuto ,  Iwao Kunishima ,  Tohru Ozaki

发明人： Yoshiro SHIMOJO ,  Susumu Shuto ,  Iwao Kunishima ,  Tohru Ozaki

IPC分类号： H01L29/76 ,  H01L21/8246

CPC分类号： H01L27/11502 ,  H01L21/76816 ,  H01L21/76895 ,  H01L21/76897 ,  H01L27/11507

摘要： A semiconductor memory, comprising: a first memory cell transistor disposed on a semiconductor substrate; a second memory cell transistor disposed on the semiconductor substrate and having a first source-drain region in common with the first memory cell transistor; a first ferroelectric capacitor disposed with a via in between above a second source-drain region of the first memory cell transistor; a second ferroelectric capacitor disposed with a via in between above a second source-drain region of the second memory cell transistor; an interlayer dielectric disposed on the semiconductor substrate, as coating the memory cell transistors and the ferroelectric capacitors, the interlayer dielectric having a contact hole through which the first source-drain region is partially exposed at the bottom and upper electrodes of the first and second ferroelectric capacitors are partially exposed at the top; and a wiring layer filled into the contact hole, which connects the first source-drain region, the upper electrode of the first ferroelectric capacitor, and the second ferroelectric capacitor.

摘要翻译： 一种半导体存储器，包括：设置在半导体衬底上的第一存储单元晶体管; 第二存储单元晶体管，设置在半导体衬底上并且具有与第一存储单元晶体管共同的第一源 - 漏区; 第一铁电电容器，其设置有在第一存储单元晶体管的第二源 - 漏区之间的通孔; 第二铁电电容器，设置有在第二存储单元晶体管的第二源极 - 漏极区之间的通孔; 设置在半导体衬底上的层间电介质，作为涂覆存储单元晶体管和铁电电容器，层间电介质具有接触孔，第一源极 - 漏极区域在第一和第二铁电体的底部被部分暴露，上部电极 电容器部分暴露在顶部; 以及将第一源极 - 漏极区域，第一铁电体电容器的上部电极和第二铁电电容器连接的接触孔中填充的布线层。

公开(公告)号：US20060170019A1

公开(公告)日：2006-08-03

申请号：US11134414

申请日：2005-05-23

申请人： Tohru Ozaki ,  Iwao Kunishima

发明人： Tohru Ozaki ,  Iwao Kunishima

IPC分类号： H01L29/94 ,  H01L21/00

CPC分类号： H01L27/11507 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11509 ,  H01L28/57

摘要： There is provided a semiconductor storage device comprising a ferroelectric capacitor superior in barrier capability against penetration of hydrogen from all directions including a transverse direction. The device comprises a transistor formed on a semiconductor substrate, the ferroelectric capacitor formed above the transistor and including a lower electrode, a ferroelectric film, and an upper electrode, a first hydrogen barrier film which continuously surrounds side portions of a ferroelectric capacitor cell array constituted of a plurality of ferroelectric capacitors, and a second hydrogen barrier film which is formed above the ferroelectric capacitor cell array and which is brought into contact with the first hydrogen barrier film in the whole periphery.

摘要翻译： 提供了一种包括铁电电容器的半导体存储装置，该铁电电容器的阻挡能力优于氢气从包括横向的所有方向渗透。 该器件包括形成在半导体衬底上的晶体管，形成在晶体管上方并包括下电极，铁电体膜和上电极的铁电电容器，连续围绕构成的铁电电容器单元阵列的侧部的第一氢阻挡膜 的多个强电介质电容器，以及形成在铁电体电容器单元阵列上方并与整个周边与第一氢阻挡膜接触的第二氢阻挡膜。

公开(公告)号：US20050176199A1

公开(公告)日：2005-08-11

申请号：US10618616

申请日：2003-07-15

申请人： Tohru Ozaki ,  Iwao Kunishima ,  Toyota Morimoto ,  Hiroyuki Kanaya

发明人： Tohru Ozaki ,  Iwao Kunishima ,  Toyota Morimoto ,  Hiroyuki Kanaya

IPC分类号： H01L27/105 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/336

CPC分类号： H01L27/11502 ,  H01L27/11507

摘要： A semiconductor memory device including a memory cell block having a plurality of memory transistors formed on a semiconductor substrate. The memory transistors include first and second impurity-diffused regions and a gate formed therebetween. A plurality of memory cells are also included in the memory cell block and have lower electrodes connected to the first impurity-diffused regions, ferroelectric films formed on the lower electrodes and first upper electrodes formed on the ferroelectric films and connected to the second impurity-diffused regions. Further included are block selecting transistors formed on the semiconductor substrate and being connected to one end of the memory cell block. Second upper electrodes are also formed adjoined to the block selecting transistors and being disconnected from the first upper electrode of the memory cells.

摘要翻译： 一种半导体存储器件，包括具有形成在半导体衬底上的多个存储晶体管的存储单元块。 存储晶体管包括第一和第二杂质扩散区域以及在它们之间形成的栅极。 多个存储单元也包括在存储单元块中，并且具有连接到第一杂质扩散区的下电极，形成在下电极上的铁电膜和形成在铁电体膜上的第一上电极并连接到第二杂质扩散区 地区。 还包括形成在半导体衬底上并连接到存储单元块的一端的块选择晶体管。 第二上电极也形成为与块选择晶体管相邻并且与存储单元的第一上电极断开连接。

公开(公告)号：US20050205910A1

公开(公告)日：2005-09-22

申请号：US10960029

申请日：2004-10-08

申请人： Yoshinori Kumura ,  Hiroyuki Kanaya ,  Tohru Ozaki

发明人： Yoshinori Kumura ,  Hiroyuki Kanaya ,  Tohru Ozaki

IPC分类号： H01L27/105 ,  H01L21/00 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L27/11502 ,  H01L27/11507

摘要： A transistor including a source/drain region is formed on a semiconductor substrate. A plug electrode is formed on the source/drain region. A conductive film is formed on the plug electrode. A first insulation film is formed on the conductive film. A lower electrode is formed on the first insulation film, and electrically connected to the conductive film formed on the plug electrode. A ferroelectric film is formed on the lower electrode. An upper electrode is formed on the ferroelectric film.

摘要翻译： 包括源极/漏极区域的晶体管形成在半导体衬底上。 插头电极形成在源极/漏极区域上。 在插头电极上形成导电膜。 在导电膜上形成第一绝缘膜。 在第一绝缘膜上形成下电极，与形成在插塞电极上的导电膜电连接。 在下电极上形成铁电体膜。 在铁电体膜上形成上部电极。

公开(公告)号：US20090095993A1

公开(公告)日：2009-04-16

申请号：US12244210

申请日：2008-10-02

申请人： Tohru Ozaki ,  Yoshinori Kumura

发明人： Tohru Ozaki ,  Yoshinori Kumura

IPC分类号： H01L27/115 ,  H01L21/8246

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： According to an aspect of the present invention, there is provided a semiconductor memory device including a ferroelectric capacitor, including a semiconductor substrate, a transistor having diffusion layers being a source and a drain, the transistor being formed on a surface of the semiconductor substrate, a ferroelectric capacitor being formed over the transistor, the ferroelectric capacitor including a lower electrode, a ferroelectric film and an upper electrode stacked in order, an interlayer insulator separating between the transistor and the ferroelectric capacitor, a first contact plug being embedded in the interlayer insulator formed beneath the ferroelectric capacitor, the first contact plug directly connecting between one of the diffusion layers and the lower electrode, a first hydrogen barrier film covering the transistor a second hydrogen barrier film, a portion of the second hydrogen barrier film being formed on the first hydrogen barrier film, another portion of the second hydrogen barrier film covering at least the ferroelectric capacitor, and a second contact plug being embedded in the interlayer insulator, the second hydrogen barrier film and the first hydrogen barrier film, one end of the second contact plug connecting to the other of the diffusion layers.

摘要翻译： 根据本发明的一个方面，提供了一种包括具有半导体衬底的铁电电容器，具有源极和漏极的扩散层的晶体管的半导体存储器件，晶体管形成在半导体衬底的表面上， 形成在晶体管上的强电介质电容器，所述强电介质电容器包括下电极，强电介质膜和依次堆叠的上电极，分隔在所述晶体管和所述铁电电容器之间的层间绝缘体，第一接触插塞嵌入所述层间绝缘体 形成在强电介质电容器下方的第一接触插塞，直接连接在一个扩散层和下电极之间的第一接触插塞，第一氢阻挡膜，覆盖晶体管第二氢阻挡膜，第二氢阻挡膜的一部分形成在第一 氢屏障膜，另一部分的secon d氢屏障膜，其至少覆盖所述铁电电容器，以及第二接触插塞，其被嵌入在所述层间绝缘体中，所述第二氢阻挡膜和所述第一氢阻挡膜，所述第二接触插塞的一端连接到所述扩散层中的另一个 。

公开(公告)号：US20070072310A1

公开(公告)日：2007-03-29

申请号：US11364224

申请日：2006-03-01

申请人： Yoshinori Kumura ,  Tohru Ozaki ,  Susumu Shuto

发明人： Yoshinori Kumura ,  Tohru Ozaki ,  Susumu Shuto

IPC分类号： H01L21/00 ,  H01L21/8242 ,  H01L29/94 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L27/11507 ,  H01L21/76834 ,  H01L21/76895 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11509 ,  H01L28/57 ,  H01L28/65

摘要： A semiconductor device comprising a semiconductor substrate and memory cells. Each memory cell comprises a switching transistor and a ferroelectric capacitor, both formed on the substrate. The ferroelectric capacitor includes a lower electrode, an upper electrode and a ferroelectric film held between the lower and upper electrodes. A first wire formed from a deposited wire-material film is connected to the upper electrode of the ferroelectric capacitor. A second wire formed by damascene process is provided on the first wire.

摘要翻译： 一种半导体器件，包括半导体衬底和存储单元。 每个存储单元包括形成在基板上的开关晶体管和铁电电容器。 铁电电容器包括保持在下电极和上电极之间的下电极，上电极和铁电膜。 由沉积的线材膜形成的第一线连接到铁电电容器的上电极。 通过镶嵌工艺形成的第二丝线设置在第一线上。

公开(公告)号：US20100072525A1

公开(公告)日：2010-03-25

申请号：US12553923

申请日：2009-09-03

申请人： Yoshiro Shimojo ,  Tohru Ozaki ,  Yoshinori Kumura

发明人： Yoshiro Shimojo ,  Tohru Ozaki ,  Yoshinori Kumura

IPC分类号： H01L27/108 ,  H01L21/02

CPC分类号： H01L27/11512 ,  H01L27/11507 ,  H01L28/55

摘要： According to a method for manufacturing a semiconductor memory device of the present invention, a capacitor lower electrode film is left on the wiring layer located above a dummy transistor. In this manner, when processing of the capacitors is performed by removing a capacitor upper electrode film and a ferroelectric film, removal of the wiring layer can be prevented, and the connection between the diffusion layer of a select transistor and a bit line can be secured.

摘要翻译： 根据本发明的半导体存储器件的制造方法，在位于虚拟晶体管上方的布线层上留下电容器下电极膜。 以这种方式，当通过去除电容器上电极膜和铁电体膜来执行电容器的处理时，可以防止布线层的去除，并且可以确保选择晶体管的扩散层和位线之间的连接 。

公开(公告)号：US20060102941A1

公开(公告)日：2006-05-18

申请号：US10986060

申请日：2004-11-12

申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

IPC分类号： H01L29/94

CPC分类号： H01L28/55 ,  G11C11/22 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65

摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底电极，顶电极和设置在底电极和顶电极之间的电介质膜的电容器，底电极包括含有 铱，设置在电介质膜和第一导电膜之间并由贵金属膜形成的第二导电膜，设置在电介质膜和第二导电膜之间并由具有钙钛矿结构的金属氧化物膜形成的第三导电膜， 以及设置在所述第一导电膜和所述第二导电膜之间并且包括金属膜和金属氧化物膜中的至少一种的防扩散膜，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散。

公开(公告)号：US06762065B2

公开(公告)日：2004-07-13

申请号：US10448359

申请日：2003-05-30

申请人： Hiroyuki Kanaya ,  Yasuyuki Taniguchi ,  Tohru Ozaki ,  Yoshinori Kumura

发明人： Hiroyuki Kanaya ,  Yasuyuki Taniguchi ,  Tohru Ozaki ,  Yoshinori Kumura

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L21/31116 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/56 ,  H01L28/75

摘要： A lower electrode is formed on an insulating film on a semiconductor substrate. A pair of ferroelectric films are formed on the lower electrode separately from each other. An upper electrode is formed on each of the pair of ferroelectric films. A portion of the lower electrode on which the ferroelectric film is formed is thicker than a portion thereof on which the ferroelectric film is not formed. Such a structure is obtained by sequentially depositing the lower electrode, the ferroelectric film, and the upper electrode on the insulating film, forming a mask on the upper-electrode, using this mask to etch the upper-electrode and the ferroelectric film to thereby pattern a pair of upper electrodes and a pair of ferroelectric electrodes, forming such a mask that continuously covers the pair of upper electrodes and the pair of ferroelectric films, and then etching the lower-electrode material film.

摘要翻译： 在半导体衬底上的绝缘膜上形成下电极。 一对铁电体膜分别形成在下电极上。 在一对铁电体膜中的每一个上形成上电极。 形成铁电体膜的下部电极的一部分比不形成强电介质膜的部分厚。 通过使用该掩模在绝缘膜上依次沉积下电极，铁电体膜和上电极，在上电极上形成掩模，以蚀刻上电极和铁电体膜，从而形成图案 一对上电极和一对铁电电极，形成连续地覆盖一对上电极和一对铁电体膜的掩模，然后蚀刻下电极材料膜。

公开(公告)号：US06603161B2

公开(公告)日：2003-08-05

申请号：US09801920

申请日：2001-03-09

申请人： Hiroyuki Kanaya ,  Yasuyuki Taniguchi ,  Tohru Ozaki ,  Yoshinori Kumura

发明人： Hiroyuki Kanaya ,  Yasuyuki Taniguchi ,  Tohru Ozaki ,  Yoshinori Kumura

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L21/31116 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/56 ,  H01L28/75

摘要： There is provided a semiconductor device having a ferroelectric capacitor formed on a semiconductor substrate covered with an insulator film, wherein the ferroelectric capacitor comprises: a bottom electrode formed on the insulator film; a ferroelectric film formed on the bottom electrode; and a top electrode formed on the ferroelectric film. The ferroelectric film has a stacked structure of either of two-layer-ferroelectric film or three-layer-ferroelectric film. The upper ferroelectric film is metallized and prevents hydrogen from diffusing in lower ferroelectric layer. Crystal grains of the stacked ferroelectric films are preferably different.

摘要翻译： 提供一种半导体器件，其具有形成在被绝缘体膜覆盖的半导体衬底上的铁电电容器，其中所述强电介质电容器包括：形成在所述绝缘膜上的底部电极; 形成在底部电极上的铁电体膜; 以及形成在强电介质膜上的顶部电极。 铁电体膜具有两层铁电体膜或三层铁电体膜的层叠结构。 上部铁电膜被金属化，并防止氢在下部铁电层中扩散。 堆叠的铁电体膜的晶粒优选不同。