公开(公告)号：US5995439A

公开(公告)日：1999-11-30

申请号：US188367

申请日：1998-11-10

申请人： Takao Watanabe ,  Kazushige Ayukawa ,  Ryo Fujita ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka

发明人： Takao Watanabe ,  Kazushige Ayukawa ,  Ryo Fujita ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka

IPC分类号： G06F17/50 ,  G11C7/00 ,  G11C7/02 ,  G11C7/10 ,  G11C8/12 ,  H01L27/108 ,  G11C8/00

CPC分类号： G11C7/02 ,  G11C7/10 ,  G11C7/1006 ,  G11C7/1042 ,  G11C7/1072 ,  H01L27/10897

摘要： A semiconductor IC device is designed using a memory core with a plurality of I/O lines, a transfer circuit module and a logic library which are produced beforehand and stored in a data base. The memory core and a logic circuit are arranged so that their I/O lines extend in the same direction. A transfer circuit including plural stages of switch groups is arranged between the I/O lines of the memory core and the I/O lines of the logic circuit. Switches forming each stage of switch group are formed between the I/O lines of the memory core and the I/O lines of the logic circuit. When one stage of or a small number of stages of switch groups are turned on, the I/O lines of the memory core and the I/O lines of the logic circuit are turned on, thereby forming a desired transfer pattern. The memory core is constructed by the combination of functional modules such as an amplifier module, a bank module and a power supply module. In the bank module are arranged row-system circuits which operate independently of each other and a multiplicity of I/O lines which extend in a bit line direction.

公开(公告)号：US5940087A

公开(公告)日：1999-08-17

申请号：US739457

申请日：1996-10-29

申请人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

发明人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

IPC分类号： G09G5/00 ,  G06F3/153 ,  G06F13/18 ,  G09G5/36 ,  G09G5/39 ,  G09G5/393 ,  G09G5/397 ,  G09G5/399

CPC分类号： G06F3/14 ,  G09G5/39 ,  G09G2360/127 ,  G09G5/001 ,  G09G5/363 ,  G09G5/393

摘要： A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.

公开(公告)号：US5581796A

公开(公告)日：1996-12-03

申请号：US164776

申请日：1993-12-10

申请人： Kazuyoshi Koga ,  Ryo Fujita ,  Koyo Katsura ,  Yasushi Fukunaga ,  Hideyuki Hara

发明人： Kazuyoshi Koga ,  Ryo Fujita ,  Koyo Katsura ,  Yasushi Fukunaga ,  Hideyuki Hara

IPC分类号： G06T15/10 ,  G09G5/14 ,  G09G5/393 ,  G06T15/00

CPC分类号： G06T15/10 ,  G09G5/14 ,  G09G5/393

摘要： In a case where a graphic image segment of which positional information is defined in a world coordinate system and of which size information is defined in a device coordinate system is developed to be displayed on a multi-window screen, the development processing performance is improved in peripheral portions of the window. A rectangular development area (first development area) associated with the window is expanded with consideration of a size information of a graphic segment so as to obtain a second development area. The second development area is compared with a rectangular area (an existence area) circumscribing a graphic image represented only with positional information of the graphic segment. As a result, whether or not the graphic segment is to be developed is determined. The first development area is reduced with consideration of size information of the graphic segment to produce a third development area. The third development area is compared with the existence area to decide whether or not the clipping operation is necessary for the graphic segment.

摘要翻译： 在世界坐标系中定义哪个位置信息的图形图像段并且在设备坐标系中定义尺寸信息的情况下，显示在多窗口屏幕上，显影处理性能得到改善 窗口的周边部分。 考虑到图形段的尺寸信息来扩展与窗口相关联的矩形显影区域（第一显影区域），以获得第二显影区域。 将第二开发区域与限定仅由图形段的位置信息表示的图形图像的矩形区域（存在区域）进行比较。 结果，确定图形片段是否被开发。 考虑到图形部分的尺寸信息，第一个开发区域减少，以产生第三个开发区域。 将第三开发区域与存在区域进行比较，以确定剪切操作是否对于图形段是必需的。

公开(公告)号：US20130026211A1

公开(公告)日：2013-01-31

申请号：US13640776

申请日：2011-04-12

申请人： Ryo Fujita ,  Hiroshi Ebihara

发明人： Ryo Fujita ,  Hiroshi Ebihara

IPC分类号： B23K3/00 ,  B23K1/06

CPC分类号： H01L24/75 ,  B23K1/00 ,  B29C65/08 ,  B29C65/081 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13144 ,  H01L2224/75303 ,  H01L2224/7531 ,  H01L2224/75355 ,  H01L2224/75745 ,  H01L2224/75801 ,  H01L2224/75821 ,  H01L2224/759 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K13/0408 ,  H05K13/0409 ,  H01L2924/00014 ,  H01L2924/00

摘要： In some cases, it is difficult to carry out ultrasonic joining of high quality with a conventional bonding tool. A bonding tool includes: a horn that transmits an ultrasonic vibration; an ultrasonic vibrator that is provided at one end of the horn, and generates the ultrasonic vibration; and an electronic component holding part that holds an electronic component, wherein the electronic component holding part has a male fitting part in a shape of a tapering-off, and an electronic component holding face that holds the electronic component on an opposite side to the male fitting part, a female fitting part in a shape according to a shape of the male fitting part is formed in a predetermined face of the horn, and the male fitting part is fitted into the female fitting part via an adhesion layer.

摘要翻译： 在一些情况下，难以用传统的粘合工具进行高质量的超声波接合。 接合工具包括：发射超声波振动的喇叭; 超声波振子，设置在喇叭的一端，产生超声波振动; 以及电子部件保持部，其保持电子部件，其中，所述电子部件保持部具有呈锥形的凸形配合部，以及将所述电子部件保持在与所述男性的相反侧的电子部件保持面 形成在喇叭的预定面上的与阳配合部的形状相对应的形状的阴配合部，通过粘接层将阳配合部嵌入阴配合部。

公开(公告)号：US08328066B2

公开(公告)日：2012-12-11

申请号：US12711744

申请日：2010-02-24

申请人： Ryo Fujita ,  Hiroshi Ebihara ,  Katsuhiko Watanabe

发明人： Ryo Fujita ,  Hiroshi Ebihara ,  Katsuhiko Watanabe

IPC分类号： B23K1/06

CPC分类号： H01L24/75 ,  H01L24/81 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/181 ,  Y10T29/53174 ,  H01L2924/00

摘要： A bonding tool, including: a component mounting unit including a horn that has a heater insertion hole, in which a heater is inserted with a predetermined clearance, and transmits ultrasonic vibration, an ultrasonic transducer that is fixed on the horn and produces the ultrasonic vibration, and an electronic component holder that is fixed on the horn, holds an electronic component and is heated by the heater; a leg that supports the horn on both sides of the horn at nodal points of the ultrasonic vibration on the horn; a supporter that holds the leg; and a heater holder that holds the heater on both sides of the horn, wherein the leg and the heater holder are formed integrally with each other.

摘要翻译： 一种接合工具，包括：部件安装单元，包括具有加热器插入孔的喇叭，加热器插入孔中，加热器以预定间隙插入，并且发送超声波振动;超声波换能器，固定在喇叭上并产生超声波振动 以及固定在喇叭上的电子部件保持器，保持电子部件并被加热器加热; 在喇叭的超声波振动的节点处支撑喇叭两侧的喇叭; 支持腿的人 以及在喇叭的两侧保持加热器的加热器保持器，其中腿部和加热器保持器彼此一体地形成。

公开(公告)号：US20090164034A1

公开(公告)日：2009-06-25

申请号：US12339739

申请日：2008-12-19

申请人： Kevin Cohen ,  Tal Pink ,  Ryo Fujita

发明人： Kevin Cohen ,  Tal Pink ,  Ryo Fujita

IPC分类号： G06F17/00

CPC分类号： G10H1/0058 ,  G10H1/0025 ,  G10H2210/076 ,  G10H2210/105 ,  G10H2210/125 ,  G10H2240/091 ,  G10H2240/131 ,  G10H2240/175 ,  G10H2240/305 ,  H04L65/604

摘要： Systems and methods for web-based performance collaborations based on multimedia-content sharing are disclosed. In one aspect of the present disclosure, an audio mix request with a first audio track representing a beat is received. One embodiment includes, recording a second audio track provided by the recording user while simultaneously performing aural playback of the beat represented by the first audio track to the recording user during a recording session, providing aural playback of a preview of mixing the first audio track and the second audio track after the recording session has ended, and generating a mixed track from the first audio track and the second audio track.

摘要翻译： 公开了基于多媒体内容共享的基于Web的性能协作的系统和方法。 在本公开的一个方面，接收具有表示节拍的第一音频轨道的音频混合请求。 一个实施例包括：在记录会话期间，记录由记录用户提供的第二音轨，同时在记录会话期间同时对记录用户执行由第一音频轨迹表示的节拍的听觉回放，提供混合第一音轨的预览和 在记录会话结束之后的第二音频轨道，并且从第一音频轨道和第二音频轨道生成混合轨道。

公开(公告)号：US20070057200A1

公开(公告)日：2007-03-15

申请号：US11519872

申请日：2006-09-13

申请人： Ryo Fujita ,  Haruo Yoda ,  Kimiaki Ando ,  Yuji Inoue ,  Masato Muraki

发明人： Ryo Fujita ,  Haruo Yoda ,  Kimiaki Ando ,  Yuji Inoue ,  Masato Muraki

IPC分类号： G21G5/00

CPC分类号： H01J37/3174 ,  B82Y10/00 ,  B82Y40/00 ,  H01J2237/31762 ,  H01J2237/31769

摘要： High-contrast exposure is performed by use of a small dose of electron beams, a pattern is formed on a wafer with high accuracy, and high-precision inspection is performed. In pattern formation, proximity effect correction processing is performed. Moreover, exposure of electron beams is performed based on a result of filtering using an inverse characteristic of exposure characteristics of the electron beams. Furthermore, in pattern inspection, electron beams are irradiated based on a result of filtering for obtaining a peripheral region of an edge of the pattern formed.

摘要翻译： 通过使用小剂量的电子束进行高对比度曝光，以高精度在晶片上形成图案，进行高精度检查。 在图案形成中，执行邻近效应校正处理。 此外，基于使用电子束的曝光特性的逆特性的滤波结果来执行电子束的曝光。 此外，在图案检查中，基于滤波结果照射电子束，以获得形成的图案的边缘的周边区域。

公开(公告)号：US07091598B2

公开(公告)日：2006-08-15

申请号：US10466300

申请日：2001-01-19

申请人： Ryo Fujita ,  Osamu Kubo ,  Kouki Noguchi ,  Masaharu Kubo ,  Michihiro Mishima ,  Yasuhiko Takahashi

发明人： Ryo Fujita ,  Osamu Kubo ,  Kouki Noguchi ,  Masaharu Kubo ,  Michihiro Mishima ,  Yasuhiko Takahashi

IPC分类号： H01L23/52

CPC分类号： G06F11/261 ,  G06F11/267 ,  G06F15/7867 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/13091 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

摘要： An electronic circuit device has a high-density mount board, on which are disposed a microcomputer, a random access memory, a programmable device which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so as to be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device is simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized is simulated. Consequently, the device facilitates the debugging at early stages of system development, configures a prototype system, and contributes to the time reduction throughout the system development, prototype fabrication and large-scale production.

摘要翻译： 电子电路装置具有高密度安装板，微型计算机，随机存取存储器，作为由FPGA表示的可变逻辑电路的可编程装置以及可存储操作程序的电可重写非易失性存储器 的微机。 高密度安装板在底面上具有外部安装销，以与系统片上多芯片模块相同的方式安装在母板上。 通过在可编程器件上设置预期的逻辑功能，模拟由电子电路器件实现的基于硬件的功能。 通过将操作程序写入到非易失性存储器中，模拟要实现的基于软件的功能。 因此，该设备便于系统开发初期的调试，配置原型系统，有助于整个系统开发，原型制作和大规模生产的时间缩短。

公开(公告)号：US06609236B2

公开(公告)日：2003-08-19

申请号：US09964615

申请日：2001-09-28

申请人： Takao Watanabe ,  Kazushige Ayukawa ,  Ryo Fujita ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka

发明人： Takao Watanabe ,  Kazushige Ayukawa ,  Ryo Fujita ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka

IPC分类号： G06F945

CPC分类号： G11C7/02 ,  G11C7/10 ,  G11C7/1006 ,  G11C7/1042 ,  G11C7/1072 ,  H01L27/10897

摘要： A semiconductor IC device is designed using a memory core with a plurality of I/O lines, a transfer circuit module and a logic library which are produced beforehand and stored in a data base. The memory core and a logic circuit are arranged so that their I/O lines extend in the same direction. A transfer circuit including plural stages of switch groups is arranged between the I/O lines of the memory core and the I/O lines of the logic circuit. Switches forming each stage of switch group are formed between the I/O lines of the memory core and the I/O lines of the logic circuit. When one stage of or a small number of stages of switch groups are turned on, the I/O lines of the memory core and the I/O lines of the logic circuit are turned on, thereby forming a desired transfer pattern. The memory core is constructed by the combination of functional modules such as an amplifier module, a bank module and a power supply module. In the bank module are arranged row-system circuits which operate independently of each other and a multiplicity of I/O lines which extend in a bit line direction.

公开(公告)号：US06377267B1

公开(公告)日：2002-04-23

申请号：US09593496

申请日：2000-06-14

申请人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

发明人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

IPC分类号： G06F1300

CPC分类号： G06F3/14 ,  G09G5/001 ,  G09G5/363 ,  G09G5/39 ,  G09G5/393 ,  G09G2360/127

摘要： A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.

摘要翻译： 一种用于生成，显示或打印字符和图形数据的图形处理装置。 使用连续的列访问，其中指定行地址用于访问存储器，并且连续地访问指定的相同行地址内的不同列地址中的数据，以及缓冲装置，用于在处理器的访问和 提供对内存的访问。 用于显示的程序和图像信息存储在主存储器中。 帧缓冲器和主存储器的整体结构简单，体积小。