摘要:
Apparatus and methods related to memory resistors are provided. A feedback controller applies adjustment signals to a memristor. A non-volatile electrical resistance of the memristor is sensed by the feedback controller during the adjustment. The memristor is adjusted to particular values lying between first and second limiting values with minimal overshoot. Increased memristor service life, faster operation, lower power consumption, and higher operational integrity are achieved by the present teachings.
摘要:
An electrically actuated device includes a reactive metal layer, a first electrode established in contact with the reactive metal layer, an insulating material layer established in contact with the first electrode or the reactive metal layer, an active region established on the insulating material layer, and a second electrode established on the active region. A conductive nano-channel is formed through a thickness of the insulating material layer.
摘要:
An electrically actuated device (10) comprises an active region (30) disposed between a first electrode (12) and a second electrode (14); a substantially nonrandom distribution of dopant initiators at an interface between the active region and the first electrode; and a substantially nonrandom distribution of dopants in a portion of the active region adjacent to the interface.
摘要:
A nanoscale switching device provides enhanced thermal stability and endurance to switching cycles. The switching device has an active region disposed between electrodes and containing a switching material capable of carrying a species of dopants and transporting the dopants under an electrical field. At least one of the electrodes is formed of conductive material having a melting point greater than 1800° C.
摘要:
A memristive device includes a first electrode, a second electrode, and an active region disposed between the first and second electrodes. At least one of the first and second electrodes is a metal oxide electrode.
摘要:
A nanoscale switching device comprises at least two electrodes, each of a nanoscale width; and an active region disposed between and in electrical contact with the electrodes, the active region containing a switching material capable of carrying a species of dopants and transporting the dopants under an electrical field, wherein at least one of the electrodes comprises an amorphous conductive material.
摘要:
A memristive device having a bimetallic electrode includes a memristive matrix, a first electrode and a second electrode. The first electrode is in electrical contact with the memristive matrix and the second electrode is in electrical contact with the memristive matrix and an underlying layer. At least one of the first and second electrodes is a bimetallic electrode which includes a conducting layer and a metallic layer.
摘要:
This invention relates to magnetic tunnel junctions and methods for making the magnetic tunnel junctions. The magnetic tunnel junctions include a tunnel barrier oxide layer sandwiched between two ferromagnetic layers both of which are epitaxial or textured with respect to the underlying substrate upon which the magnetic tunnel junctions are grown. The magnetic tunnel junctions provide improved magnetic properties, sharper interfaces and few defects.
摘要:
Memristive devices, memristors and methods for fabricating memristive devices are disclosed. In one aspect, a memristor includes a first electrode wire and a second electrode wire. The second electrode wire and the first electrode wire define an overlap area. The memristor includes an electrode extension in contact with the first electrode wire and disposed between the first and second electrode wires. At least one junction is disposed between the second electrode wire and the electrode extension. Each junction contacts a portion of the electrode extension and has a junction contact area with the second electrode wire, and the sum total junction contact area of the at least one junction is less than the overlap area.
摘要:
A multilayer crossbar memory array includes a number of layers. Each layer includes a top set of parallel lines, a bottom set of parallel lines intersecting the top set of parallel lines, and memory elements disposed at intersections between the top set of parallel lines and the bottom set of parallel lines. A top set of parallel lines from one of the layers is a bottom set of parallel lines for an adjacent one of the layers.