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公开(公告)号：US4355284A
公开(公告)日：1982-10-19
申请号：US209616
申请日：1980-11-24
申请人： William F. Acker
发明人： William F. Acker
摘要： A phase correction system is disclosed for adjusting a phase relationship of periodic data samples, based on a level crossing detector identifying certain data samples in connection with a preselected value.
摘要翻译： 公开了一种相位校正系统，用于基于与预选值相关联地识别某些数据样本的电平交叉检测器来调整周期性数据样本的相位关系。
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公开(公告)号：US4250454A
公开(公告)日：1981-02-10
申请号：US23823
申请日：1979-03-26
申请人： Norman Y. Sakamoto
发明人： Norman Y. Sakamoto
CPC分类号： H03L7/0812 , G01R25/08 , G01S7/282
摘要： An electronic trigger circuit for an RF source, which electronic trigger may be advantageously used in a radar apparatus, for instance. The trigger employs digital logic devices including a register or counter, a circuit for initiating counting in the register in response to a received pretrigger signal and a circuit responsive to the occurrence of selected count in the register for enabling the RF source. A timing signal is generated, based upon the pretrigger signal in timed relationship to the time at which the RF source should nominally generate its RF signal. Typically, the RF source generates its RF signal at sometime after being enabled. A comparator circuit is provided for comparing the phase relationship of the aforementioned timing signal and the occurrence of the RF signal and is in turn coupled to an arithmetic circuit effective for altering the number of states through which the register counts. Preferably, the arithmetic circuit alters the number of states only when the comparison circuit indicates that the phase relationship differs by some preselected period of time. Thus, each time the RF source is fired, its output is compared with the time at which the output should nominally occur and when this difference exceeds a predetermined amount, the amount of delay between the time the pretrigger signal is received and the time the RF source is enabled is varied by changing the number of states through which the aforementioned register counts.
摘要翻译： 例如，用于RF源的电子触发电路，该电子触发器可以有利地用于雷达装置中。 触发器采用包括寄存器或计数器的数字逻辑器件，用于响应于接收到的预触发信号而在寄存器中启动计数的电路和响应于寄存器中选择的计数的发生的电路以使能RF源。 基于与RF信号源名义上产生其RF信号的时间的定时关系的预触发信号，产生定时信号。 通常，RF源在启用后的某个时间产生其RF信号。 提供比较器电路，用于比较上述定时信号的相位关系和RF信号的出现，并且又连接到有效地改变寄存器计数的状态数量的运算电路。 优选地，只有当比较电路指示相位关系不同预定时间段时，算术电路才改变状态数。 因此，每当RF源被点亮时，其输出与输出应该名义上出现的时间进行比较，并且当该差异超过预定量时，接收到预触发信号的时间与RF之间的时间 源使能是通过改变上述寄存器计数的状态数来改变的。
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公开(公告)号：US4178631A
公开(公告)日：1979-12-11
申请号：US877259
申请日：1978-02-13
摘要： A digital phase detector includes a hard limiter which transforms an incoming signal of known frequency into a binary signal at the same frequency. A reference generator produces two binary references at the signal frequency, one reference shifted 90.degree. in phase with respect to the other. The binary signal is exclusive-ORed with each reference and the exclusive-OR outputs therefrom control two counters, the counters thereby registering counts analogous to trigonometric functions of the signal phase angle. A phase modulated clock drives the counters, the phase modulation feature permitting a correction factor to be incorporated in order to cancel the error introduced by the quantized nature of the digital computations involved.
摘要翻译： 数字相位检测器包括硬限幅器，其将已知频率的输入信号以相同频率变换成二进制信号。 参考发生器在信号频率处产生两个二进制参考，一个参考相对于另一个相位移位90°。 二进制信号与每个参考值进行异或运算，其异或输出控制两个计数器，计数器由此记录类似于信号相位角的三角函数的计数。 相位调制时钟驱动计数器，相位调制特征允许并入校正因子，以便消除由所涉及的数字计算的量化特性引入的误差。
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公开(公告)号：US3968493A
公开(公告)日：1976-07-06
申请号：US507185
申请日：1974-09-18
申请人： James David Last , Emyr Wyn Roberts
发明人： James David Last , Emyr Wyn Roberts
摘要： In a phase comparison radio navigation system in which phase-locked signals of the same frequency are radiated in succession from spaced stations and are compared in phase at a receiver, instead of locking an oscillator or oscillators at the receiver to received signals to provide simultaneously available signals for phase comparison, each received signal is compared in turn in digital phase comparison means with a free-running oscillator, two successive comparisons of the oscillator with one received signal being used to determine the phase error rate of the oscillator and this error rate being used to correct the other phase determinations.
摘要翻译： 在相位比较无线电导航系统中，其中相同频率的锁相信号从间隔的电台连续地辐射并且在接收机处被相位比较，而不是将接收机处的振荡器或振荡器锁定到接收信号以提供同时可用的 用于相位比较的信号，每个接收信号在数字相位比较装置中与自由运行的振荡器进行比较，振荡器与一个接收信号的两个连续比较用于确定振荡器的相位误差率，该误差率为 用于纠正其他相位的确定。
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26.发明授权Random phase modulating time base and method to improve measurement averaging counter resolution 失效随机相位调制时基和提高测量平均相位分辨率的方法
公开(公告)号：US3886451A
公开(公告)日：1975-05-27
申请号：US43746074
申请日：1974-01-28
申请人： HEWLETT PACKARD CO
发明人： CHU DAVID C , GLIEVER JOHN H
CPC分类号： G04F10/04
摘要： A time base and method to provide resolution improvement for measurement averaging counters when measuring an applied signal comprising time intervals or pulsed frequencies repetitively occurring at rates synchronous to a counter''s clock frequency. The phase of a reference frequency is varied in response to a random signal. The phase modulated reference frequency is applied to a frequency multiplier chain which multiplies both the frequency and the effective amount of phase modulation. The randomly phase shifting output of the frequency multiplier chain is applied as a clock signal to a measurement averaging counter thereby destroying coherence between the clock signal and the applied signal and allowing statistical averaging to take place.
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公开(公告)号：US10914772B2
公开(公告)日：2021-02-09
申请号：US16002373
申请日：2018-06-07
申请人： SOCIONEXT INC.
发明人： Albert Hubert Dorner , Martin Wahle
摘要： The present disclosure relates to phase measurement circuitry operable based on a first clock signal having an intended clock frequency F1 and a second clock signal having an intended clock frequency F2, the circuitry comprising: a delay line configured to receive the first clock signal, the delay line comprising a plurality of delay units each configured to cause a propagation delay, and the plurality of delay units connected in series along the length of the delay line and defining a series of positions therebetween through which signal edges of the first clock signal propagate over time; an edge detector configured to sample the delay line at successive sample times based on the second clock signal and to record at each sample time the position of a given signal edge of the first clock signal along the delay line; and a phase angle determiner configured to determine a phase angle per delay unit based on successive recorded said positions.
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公开(公告)号：US09774319B2
公开(公告)日：2017-09-26
申请号：US15157564
申请日：2016-05-18
申请人： SK hynix Inc.
发明人： Myeong Jae Park , Kyung Hoon Kim , Kyu Young Kim , Woo Yeol Shin
摘要： A phase detection circuit includes a sampling signal generation circuit configured to generate a plurality of sampling signals in response to a plurality of phase change clocks having different phases and data; a charging voltage generation circuit configured to compare the plurality of sampling signals, and change a voltage level of one charging voltage between a first charging voltage and a second charging voltage; and a comparison circuit configured to compare voltage levels of the first and second charging voltages, and generate a result signal.
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30.发明授权System and method for measuring phase attributes of electrical grid system and equipment using a smart probe 有权使用智能探头测量电网系统和设备相位属性的系统和方法公开(公告)号：US09164135B2
公开(公告)日：2015-10-20
申请号：US13230901
申请日：2011-09-13
CPC分类号： G01R25/08 , G01R15/142
摘要： A system for measuring phase attributes of high voltage electrical lines comprises a single high voltage probe. The probe comprises a sensing element for selectively measuring voltage of a high voltage electrical line. A processing circuit detects zero crossings of the measured voltage, applies a time tag to the zero crossings, and stores samples of the amplitude and time tagged zero crossings. A memory stores samples of the amplitude and time tagged zero crossings for a plurality of high voltage electrical lines. A processor is operatively associated with the memory for determining phase relationships between the plurality of high voltage electrical lines.
摘要翻译： 用于测量高压电线的相位属性的系统包括单个高电压探针。 探头包括用于选择性地测量高压电线的电压的感测元件。 处理电路检测测量电压的过零点，对过零点应用时间标签，并存储幅度和时间标记的过零点的样本。 存储器存储多个高压电线的幅度和时间标记的过零点的样本。 处理器可操作地与存储器相关联，用于确定多个高压电线之间的相位关系。
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