Tunable duplexer arrangement configured for TDD operation

    公开(公告)号:US09853685B2

    公开(公告)日:2017-12-26

    申请号:US14329493

    申请日:2014-07-11

    Abstract: RF duplexing and methods of operating the same are described herein. In one embodiment, an RF duplexing system may include a control circuit and a duplexer with a first tunable RF filter and second tunable RF filter. The control circuit is operable in a full duplexing transmission mode and a half duplexing transmission mode. The control circuit tunes the first tunable RF filter in the full duplexing transmission mode so that the first tunable RF filter defines a transmission passband and tune the second tunable RF filter so that the second tunable RF filter defines a receive passband. Also, the control circuit tunes one of the tunable RF filters so that the tunable RF filter defines the passband while the other tunable RF filter enhances the passband. In this manner, the tunable RF filters in the duplexer are both utilized to get better performance during the half duplexing mode.

    Tunable RF transmit/receive multiplexer

    公开(公告)号:US09843342B2

    公开(公告)日:2017-12-12

    申请号:US14922803

    申请日:2015-10-26

    Inventor: Nadim Khlat

    CPC classification number: H04B1/0057 H04B1/0064

    Abstract: A tunable RF transmit/receive (TX/RX) multiplexer, which includes a tunable RF TX/RX diplexing circuit and a first group of RF RX bandpass filters, is disclosed. The tunable RF TX/RX diplexing circuit has a first RX connection node and a first antenna port, which is coupled to a first RF antenna. Each of the first group of RF RX bandpass filters is coupled to the first RX connection node. At least two of the first group of RF RX bandpass filters simultaneously receive and filter respective RF input signals via the first RX connection node to provide respective filtered RF input signals.

    Auto-configuration of devices based upon configuration of serial input pins and supply

    公开(公告)号:US09720872B2

    公开(公告)日:2017-08-01

    申请号:US14511602

    申请日:2014-10-10

    CPC classification number: G06F13/4221 G06F13/4282

    Abstract: A device includes a memory, at least two input/output (IO) pins, and slave identifier (ID) selection circuitry. The memory stores a slave ID, which identifies the device to other devices in a serial communication process. The slave ID selection circuitry changes the stored slave ID based on which one of the IO pins is coupled to a supply voltage. By changing the slave ID of the device based on which one of the IO pins is coupled to a supply voltage, a number of devices with otherwise identical slave IDs may change their slave IDs in order to participate in a serial communication process on the same bus. Further, the slave ID of the device may be changed without using an additional IO pin on the device.

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