公开(公告)号：US08314031B2

公开(公告)日：2012-11-20

申请号：US12726347

申请日：2010-03-18

Applicant: Chia-Lin Hsu

Inventor： Chia-Lin Hsu

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/3212

Abstract: A planarization process for a pre-damascene structure is described, wherein the pre-damascene structure includes a metal hard mask that is disposed on a first material layer with a damascene opening therein and a second material layer that fills the damascene opening and covers the metal hard mask. A first CMP step is conducted using a first slurry to remove the second material layer outside the damascene opening. A second CMP step is conducted using a second slurry to remove the metal hard mask.

Abstract translation: 描述了一种预镶嵌结构的平面化方法，其中预镶嵌结构包括设置在其中具有镶嵌开口的第一材料层上的金属硬掩模和填充镶嵌开口并覆盖金属的第二材料层 硬面膜 使用第一浆料进行第一CMP步骤以除去镶嵌开口外部的第二材料层。 使用第二浆料进行第二CMP步骤以除去金属硬掩模。

公开(公告)号：US20120286745A1

公开(公告)日：2012-11-15

申请号：US13421847

申请日：2012-03-15

Applicant: SHU-CHIA LIN ,  Wen-Yueh Hsieh ,  Ching-Yuan Lin

Inventor： SHU-CHIA LIN ,  Wen-Yueh Hsieh ,  Ching-Yuan Lin

IPC: G05F1/70

CPC classification number: H02M3/158 ,  H02M1/4208 ,  H02M2001/009 ,  Y02B70/126 ,  Y10T307/258

Abstract: A digital power factor correction device is provided, which is an all-digital control module. The digital power factor correction device includes a voltage loop control unit, an input power control unit, a current loop control unit, and a pulse width modulation generation unit, to perform power factor correction for minimizing the phase difference between input current and input voltage through adjusting input current with an external driver and a switch unit. The voltage loop control unit and the current loop control unit contain proportion-integral-differentiation controller to form voltage control loop and current control loop, respectively. The input power control unit adjusts current waveform according to the input power, while the pulse width modulation generation unit decides stop time of pulse width modulation to produce a pulse width modulation signal, to control the external driver and the switch unit for eliminating loading effect.

Abstract translation: 提供了一种数字功率因数校正装置，它是全数字控制模块。 数字功率因数校正装置包括电压环路控制单元，输入功率控制单元，电流环路控制单元和脉冲宽度调制生成单元，以执行功率因数校正，以使输入电流和输入电压之间的相位差最小化 用外部驱动器和开关单元调节输入电流。 电压环控制单元和电流环控制单元分别包含比例积分微分控制器，以形成电压控制回路和电流控制回路。 输入功率控制单元根据输入功率调整电流波形，而脉宽调制生成单元决定脉宽调制的停止时间，生成脉宽调制信号，控制外部驱动器和开关单元，消除负载效应。

公开(公告)号：US20120284450A1

公开(公告)日：2012-11-08

申请号：US13244328

申请日：2011-09-24

Applicant: PO-CHUN HUANG ,  Yuan-hao Chang ,  Jen-Wei Hsieh ,  Yung-feng Lu ,  Chia-lin Chang

Inventor： PO-CHUN HUANG ,  Yuan-hao Chang ,  Jen-Wei Hsieh ,  Yung-feng Lu ,  Chia-lin Chang

IPC: G06F12/00

CPC classification number: G06F12/0246 ,  G06F2212/7205 ,  G06F2212/7209

Abstract: A flash memory system and managing and collecting methods for flash memory with invalid page messages thereof are described. When the valid data pages of the flash memory are changed to invalid data pages, a recording area is used to record the message of the invalid data pages to effectively collect the occupied space of the invalid data pages in the flash memory. Further, while garbage collecting step is performed, a block is rapidly selected according to the message of the recording area and the valid data pages in the selected block are correctly identified, copied and removed.

Abstract translation: 描述了闪存系统以及具有无效页面消息的闪速存储器的管理和收集方法。 当闪存的有效数据页被改变为无效数据页时，使用记录区来记录无效数据页的消息，以有效地收集闪存中无效数据页的占用空间。 此外，当执行垃圾回收步骤时，根据记录区域的消息快速选择块，并且正确地识别，复制和删除所选块中的有效数据页。

公开(公告)号：US20120264302A1

公开(公告)日：2012-10-18

申请号：US13085502

申请日：2011-04-13

Applicant: Chun-Wei Hsu ,  Teng-Chun Tsai ,  Chia-Lin Hsu ,  Po-Cheng Huang ,  Chia-Hsi Chen ,  Yen-Ming Chen ,  Chih-Hsun Lin

Inventor： Chun-Wei Hsu ,  Teng-Chun Tsai ,  Chia-Lin Hsu ,  Po-Cheng Huang ,  Chia-Hsi Chen ,  Yen-Ming Chen ,  Chih-Hsun Lin

IPC: H01L21/306

CPC classification number: H01L21/31053 ,  H01L21/02065 ,  H01L21/76224 ,  H01L29/66545

Abstract: A chemical mechanical polishing (CMP) process includes steps of providing a substrate, performing a first polishing step to the substrate with an acidic slurry, and performing a second polishing step to the substrate with a basic slurry after the first polishing step.

Abstract translation: 化学机械抛光（CMP）工艺包括以下步骤：提供基材，用酸性浆料对基材进行第一抛光步骤，以及在第一抛光步骤之后用碱性浆料对基材进行第二抛光步骤。

公开(公告)号：US08259060B2

公开(公告)日：2012-09-04

申请号：US12432143

申请日：2009-04-29

Applicant: Ling Li ,  Wen-Chih Tai ,  Chia-Lin Liu ,  Chi-Neng Mo

Inventor： Ling Li ,  Wen-Chih Tai ,  Chia-Lin Liu ,  Chi-Neng Mo

IPC: G09G3/36

CPC classification number: G09G3/342 ,  G09G3/3413 ,  G09G2310/0235 ,  G09G2310/0289 ,  G09G2320/064 ,  G09G2330/021

Abstract: The present invention relates to a drive circuit of light source by color sequential method for generating a full-color image based on sequential switching between red, green and blue illuminations. The drive circuit of light source by color sequential method includes a color-sequential control circuit and a plurality of radiating areas coupled to multiple light units. The color-sequential control circuit is connected to those radiating areas to control the operation thereof by the color sequential method.

Abstract translation: 本发明涉及一种基于红色，绿色和蓝色照明之间的顺序切换来产生全色图像的彩色顺序方法的光源驱动电路。 通过色彩顺序方法的光源的驱动电路包括色顺序控制电路和耦合到多个光单元的多个辐射区域。 色顺序控制电路连接到那些辐射区域，以通过彩色顺序方法控制其操作。

公开(公告)号：US08213195B2

公开(公告)日：2012-07-03

申请号：US12691739

申请日：2010-01-22

Applicant: Ting-Chin Tsen ,  Shu-Chia Lin ,  Wen-Yueh Hsieh

Inventor： Ting-Chin Tsen ,  Shu-Chia Lin ,  Wen-Yueh Hsieh

IPC: H02M1/12 ,  H02M7/5387

CPC classification number: H02M7/4807 ,  H02M7/53873

Abstract: A PWM step wave and sine wave driving device is provided. The driving device includes an ADC unit, an input processing unit, a first pulse width calculation unit, a register unit, a first output unit, a zero point detecting unit, a second pulse width calculation unit, a second output unit, and a multiplexer output unit. The driving device receives input signals, and output desired step wave or sine wave driving signals for driving an external electric device. The driving device detects a point of zero voltage of the system power supply by the zero point detecting unit. When the system power supply is abnormal, the first output unit outputs predetermined PWM step wave output signals, or the second output unit outputs predetermined PWM sine wave output signals. In such a way, the external electric device can be maintained for regular operation, so that the malfunction or breakdown thereof is prevented.

Abstract translation: 提供PWM步进波和正弦波驱动装置。 驱动装置包括ADC单元，输入处理单元，第一脉冲宽度计算单元，寄存器单元，第一输出单元，零点检测单元，第二脉冲宽度计算单元，第二输出单元和多路复用器 输出单元。 驱动装置接收输入信号，并输出用于驱动外部电气装置的期望的步进波或正弦波驱动信号。 驱动装置通过零点检测部检测系统电源的零电压点。 当系统电源异常时，第一输出单元输出预定的PWM阶跃波输出信号，或者第二输出单元输出预定的PWM正弦波输出信号。 以这种方式，可以保持外部电气设备的正常操作，从而防止其故障或故障。

公开(公告)号：US08186647B2

公开(公告)日：2012-05-29

申请号：US12250798

申请日：2008-10-14

Applicant: Chieh-Cheng Chen ,  Ming-Chih Tsai ,  Chien-Chia Lin

Inventor： Chieh-Cheng Chen ,  Ming-Chih Tsai ,  Chien-Chia Lin

IPC: F16K31/02

CPC classification number: F16K31/52408 ,  F16K31/0655 ,  Y10T74/18312

Abstract: A solenoid valve includes a bobbin, a coil, a rod, and at least one ball. The bobbin has a through hole and a multiple-turning-point groove in the inner wall of the bobbin. The coil winds around the bobbin. The rod is disposed in the through hole and is capable of moving inward or outward along the through hole, and has a recess in the outer wall of the rod. Each ball is received in the groove and the recess at the same time.

Abstract translation: 电磁阀包括线轴，线圈，杆和至少一个球。 线轴在筒管的内壁上具有通孔和多转点槽。 线圈缠绕在线轴上。 杆设置在通孔中并且能够沿着通孔向内或向外移动，并且在杆的外壁中具有凹部。 每个球同时被容纳在凹槽和凹槽中。

公开(公告)号：US20120119236A1

公开(公告)日：2012-05-17

申请号：US13358327

申请日：2012-01-25

Applicant: Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

Inventor： Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

IPC: H01L27/15 ,  H01L33/48

CPC classification number: H01L33/48 ,  H01L33/20 ,  H01L33/24

Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

Abstract translation: 提供了一种形成在凹面纹理基板上的发光二极管（LED）的半导体器件。 对衬底进行图案化和蚀刻以形成凹陷。 沿着凹部的底部形成分离层。 沿着侧壁和任选地沿着相邻凹部之间的基板的表面形成LED结构。 在这些实施例中，与平面表面相比，LED结构的表面积增加。 在另一个实施例中，LED结构形成在凹部内，使得底部接触层与凹部的拓扑不一致。 在这些实施例中，硅衬底中的凹陷导致底接触层中的立方结构，例如具有非极性特性并且表现出更高外部量子效率的n-GaN层。

公开(公告)号：US20120080703A1

公开(公告)日：2012-04-05

申请号：US13172175

申请日：2011-06-29

Applicant: Hsien Chia Lin

Inventor： Hsien Chia Lin

IPC: H01L33/50

CPC classification number: H01L33/62 ,  H01L25/0753 ,  H01L33/486 ,  H01L33/504 ,  H01L33/507 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2933/0066 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An LED package structure comprises a substrate, a first electrically conductive pattern, a second electrically conductive pattern, at least one electrically conductive element, and an LED chip. The substrate has a first surface and a second surface opposite to the first surface. The first electrically conductive pattern is disposed on the first surface. The second electrically conductive pattern is disposed on the second surface. The at least one electrically conductive element traverses the fluorescent substrate and connects the first and second electrically conductive patterns. The LED chip is disposed on the second surface and has a light extraction surface that connects the second electrically conductive pattern. The LED chip is electrically coupled to the first electrically conductive pattern via the at least one electrically conductive element.

Abstract translation: LED封装结构包括衬底，第一导电图案，第二导电图案，至少一个导电元件和LED芯片。 基板具有与第一表面相对的第一表面和第二表面。 第一导电图案设置在第一表面上。 第二导电图案设置在第二表面上。 所述至少一个导电元件横穿所述荧光基板并且连接所述第一和第二导电图案。 LED芯片设置在第二表面上并且具有连接第二导电图案的光提取表面。 LED芯片经由至少一个导电元件电耦合到第一导电图案。

公开(公告)号：US20120080702A1

公开(公告)日：2012-04-05

申请号：US13118007

申请日：2011-05-27

Applicant: Hsien Chia LIN

Inventor： Hsien Chia LIN

IPC: H01L33/50

CPC classification number: H01L33/62 ,  H01L25/0753 ,  H01L33/486 ,  H01L33/504 ,  H01L33/507 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2933/0066 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In one aspect, an LED package structure comprises a fluorescent substrate, a first electrically conductive pattern, a second electrically conductive pattern, at least one electrically conductive element, and an LED chip. The fluorescent substrate has a first surface and a second surface opposite the first surface. The fluorescent substrate comprises a mixture of a fluorescent material and a glass material. The first electrically conductive pattern is disposed on the first surface. The second electrically conductive pattern is disposed on the second surface. The electrically conductive element passes through the fluorescent substrate and connects the first and second electrically conductive patterns. The LED chip is disposed on the second surface and has a light extraction surface that connects the second electrically conductive pattern. The LED chip is electrically coupled to the first electrically conductive pattern via the electrically conductive element.

Abstract translation: 在一个方面，LED封装结构包括荧光基板，第一导电图案，第二导电图案，至少一个导电元件和LED芯片。 荧光基板具有与第一表面相对的第一表面和第二表面。 荧光基板包括荧光材料和玻璃材料的混合物。 第一导电图案设置在第一表面上。 第二导电图案设置在第二表面上。 导电元件通过荧光基板并连接第一和第二导电图案。 LED芯片设置在第二表面上并且具有连接第二导电图案的光提取表面。 LED芯片经由导电元件电耦合到第一导电图案。