公开(公告)号：US07425476B2

公开(公告)日：2008-09-16

申请号：US11242696

申请日：2005-10-04

申请人： Woo-Geun Lee ,  Hye-Young Ryu ,  Sang-Gab Kim ,  Jang-Soo Kim

发明人： Woo-Geun Lee ,  Hye-Young Ryu ,  Sang-Gab Kim ,  Jang-Soo Kim

IPC分类号： H01L21/00

CPC分类号： H01L27/1288 ,  H01L21/32134 ,  H01L21/76838 ,  H01L27/1214 ,  H01L29/66765

摘要： A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion.

摘要翻译： 制造薄膜晶体管阵列面板的方法包括：形成包括栅电极的栅极线，在栅极线上形成栅绝缘层，在栅绝缘层上形成半导体条; 在半导体条上形成欧姆接触，在欧姆接触上形成包括源电极和漏电极的数据线，在数据线和漏电极上沉积钝化层，并形成连接到漏电极的像素电极。 数据线和漏电极，欧姆接触和半导体条纹的形成包括在栅绝缘层上沉积本征硅层，非本征硅层和导体层，形成光致抗蚀剂，其包括对应于 源极电极和漏极电极之间的沟道区域，以及对应于数据线和漏极电极的导线区域的第一部分，其中第一部分比第二部分厚，蚀刻对应于剩余区域的导体层 除了使用光致抗蚀剂作为蚀刻掩模的导线和沟道区域之外，去除第二部分以暴露沟道区域上的导体层，蚀刻剩余区域上的本征硅层和非本征硅层，蚀刻导体层和 在通道区域上的非本征硅层，以及去除第一部分。

公开(公告)号：US20080012139A1

公开(公告)日：2008-01-17

申请号：US11770012

申请日：2007-06-28

申请人： Hye-Young Ryu ,  Young-Hoon Yoo ,  Jang-Soo Kim ,  Sung-Man Kim ,  Kyung-Wook Kim ,  Hyang-Shik Kong ,  Young-Goo Song

发明人： Hye-Young Ryu ,  Young-Hoon Yoo ,  Jang-Soo Kim ,  Sung-Man Kim ,  Kyung-Wook Kim ,  Hyang-Shik Kong ,  Young-Goo Song

IPC分类号： H01L23/48

CPC分类号： G02F1/136227 ,  G02F2001/136236 ,  H01L27/1244 ,  H01L27/1248

摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge, placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并且具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

公开(公告)号：US20080001937A1

公开(公告)日：2008-01-03

申请号：US11759515

申请日：2007-06-07

申请人： Kyoung-Ju Shin ,  Jin-Ho Ju ,  Shi-Yul Kim ,  Jang-Soo Kim ,  Chong-Chul Chai ,  Hye-Young Ryu

发明人： Kyoung-Ju Shin ,  Jin-Ho Ju ,  Shi-Yul Kim ,  Jang-Soo Kim ,  Chong-Chul Chai ,  Hye-Young Ryu

IPC分类号： G09G5/00

CPC分类号： G02F1/136227 ,  G02F2001/136222 ,  H01L27/1248

摘要： A display substrate includes a TFT layer, a passivation layer, an organic layer, an inorganic insulating layer and a pixel electrode. The TFT layer includes gate and data lines, a thin film transistor and a storage electrode. The data line crosses the gate line, and is electrically insulated from the gate line by a gate insulating layer. The TFT is electrically connected to the gate and data lines. The passivation layer covers the TFT layer. The organic layer is on the passivation layer. The inorganic insulating layer of a low temperature deposition is on the organic layer, and the low temperature is about 100° C. to about 250° C. The pixel electrode is on the inorganic insulating layer to be electrically connected to the TFT through a contact hole that is formed through the inorganic insulating layer, the organic layer and the passivation layer. The inorganic insulating layer helps to block leakage of impurities from the organic layer to layers above the inorganic insulating layer.

摘要翻译： 显示基板包括TFT层，钝化层，有机层，无机绝缘层和像素电极。 TFT层包括栅极和数据线，薄膜晶体管和存储电极。 数据线与栅极线交叉，并通过栅极绝缘层与栅极线电绝缘。 TFT与栅极和数据线电连接。 钝化层覆盖TFT层。 有机层位于钝化层上。 低温沉积的无机绝缘层在有机层上，低温约为100℃至约250℃。像素电极位于无机绝缘层上，通过接触电连接到TFT 通过无机绝缘层，有机层和钝化层形成的孔。 无机绝缘层有助于阻止杂质从有机层泄漏到无机绝缘层上方的层。

公开(公告)号：US20060073645A1

公开(公告)日：2006-04-06

申请号：US11242696

申请日：2005-10-04

申请人： Woo-Geun Lee ,  Hye-Young Ryu ,  Sang-Gab Kim ,  Jang-Soo Kim

发明人： Woo-Geun Lee ,  Hye-Young Ryu ,  Sang-Gab Kim ,  Jang-Soo Kim

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  H01L21/32134 ,  H01L21/76838 ,  H01L27/1214 ,  H01L29/66765

摘要： A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion.

摘要翻译： 制造薄膜晶体管阵列面板的方法包括：形成包括栅电极的栅极线，在栅极线上形成栅绝缘层，在栅绝缘层上形成半导体条; 在半导体条上形成欧姆接触，在欧姆接触上形成包括源电极和漏电极的数据线，在数据线和漏电极上沉积钝化层，并形成连接到漏电极的像素电极。 数据线和漏电极，欧姆接触和半导体条纹的形成包括在栅绝缘层上沉积本征硅层，非本征硅层和导体层，形成光致抗蚀剂，其包括对应于 源极电极和漏极电极之间的沟道区域，以及对应于数据线和漏极电极的导线区域的第一部分，其中第一部分比第二部分厚，蚀刻对应于剩余区域的导体层 除了使用光致抗蚀剂作为蚀刻掩模的导线和沟道区域之外，去除第二部分以暴露沟道区域上的导体层，蚀刻剩余区域上的本征硅层和非本征硅层，蚀刻导体层和 在通道区域上的非本征硅层，以及去除第一部分。

公开(公告)号：US08530893B2

公开(公告)日：2013-09-10

申请号：US13205132

申请日：2011-08-08

申请人： Ki-Won Kim ,  Kyoung-Jae Chung ,  Hye-Young Ryu ,  Young-Joo Choi ,  Seung-Ha Choi ,  Kap-Soo Yoon

发明人： Ki-Won Kim ,  Kyoung-Jae Chung ,  Hye-Young Ryu ,  Young-Joo Choi ,  Seung-Ha Choi ,  Kap-Soo Yoon

IPC分类号： H01L29/786 ,  H01L29/10 ,  H01L21/34

CPC分类号： H01L27/1225 ,  H01L29/66969 ,  H01L29/7869

摘要： A display substrate includes a gate wire formed on an insulating substrate, a semiconductor pattern formed on the gate wire and containing a metal oxynitride compound, and a data wire formed on the semiconductor pattern to cross the gate wire. The semiconductor pattern has a carrier number density ranging from 1016/cm3 to 1019/cm3.

摘要翻译： 显示基板包括形成在绝缘基板上的栅极线，形成在栅极线上并含有金属氮氧化合物的半导体图案，以及形成在半导体图案上的数据线，以跨越栅极线。 半导体图案的载体数密度范围为1016 / cm3至1019 / cm3。

公开(公告)号：US07826011B2

公开(公告)日：2010-11-02

申请号：US12178193

申请日：2008-07-23

申请人： Byung-Duk Yang ,  Sang-Ki Kwak ,  Yoon-Ho Kang ,  Kyoung-Tae Han ,  Hye-Young Ryu

发明人： Byung-Duk Yang ,  Sang-Ki Kwak ,  Yoon-Ho Kang ,  Kyoung-Tae Han ,  Hye-Young Ryu

IPC分类号： G02F1/1335

CPC分类号： G02F1/133516 ,  G02F1/133512 ,  G02F2201/50

摘要： In a light transmitting, color image display unit, a top surface of a black matrix partition wall exhibits lyophobicity relative to in-solution pigment particles while sidewall surfaces of the black matrix exhibit lyophilicity relative to in-solution pigment particles. This allows the pigment containing solutions to abut without repulsion against the sidewall surfaces. Consequently, it is possible to prevent color filter solutions deposited through an inkjet deposition process from overflowing over the lyophobic partition wall tops into adjacent pixel regions and it is also possible to conformably define color filters of consistent thickness between the black matrix partition walls.

摘要翻译： 在透光彩色图像显示单元中，黑色矩阵分隔壁的顶表面相对于溶液中颜料颗粒显示疏液性，而黑色矩阵的侧壁表现出相对于溶液中颜料颗粒的亲液性。 这允许含颜料的溶液邻接而不排斥侧壁表面。 因此，可以防止通过喷墨沉积工艺沉积的滤色器溶液在疏液分隔壁顶部溢出到相邻的像素区域中，并且还可以顺应地定义黑矩阵分隔壁之间厚度一致的滤色器。

公开(公告)号：US07777858B2

公开(公告)日：2010-08-17

申请号：US11556468

申请日：2006-11-03

申请人： Young-Hoon Yoo ,  Jang-Soo Kim ,  Hye-Young Ryu

发明人： Young-Hoon Yoo ,  Jang-Soo Kim ,  Hye-Young Ryu

IPC分类号： G02F1/1339

CPC分类号： G02F1/1339 ,  G02F1/133516 ,  G02F1/1345

摘要： A liquid crystal display device including a first substrate, a common electrode formed over the first substrate, and a second substrate disposed opposite the first substrate. A common voltage-applying member applies a common voltage to the common electrode and maintains a cell gap between the first substrate and the second substrate. The common voltage-applying member includes an insulator and a conductor formed over the insulator.

摘要翻译： 一种液晶显示装置，包括第一基板，形成在第一基板上的公共电极以及与第一基板相对设置的第二基板。 公共电压施加部件向公共电极施加公共电压，并且在第一基板和第二基板之间保持单元间隙。 公共电压施加构件包括绝缘体和形成在绝缘体上的导体。

公开(公告)号：US20100203715A1

公开(公告)日：2010-08-12

申请号：US12765698

申请日：2010-04-22

申请人： Sang-Gab KIM ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

发明人： Sang-Gab KIM ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

IPC分类号： H01L21/28

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  H01L29/458

摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

公开(公告)号：US20080252828A1

公开(公告)日：2008-10-16

申请号：US11930653

申请日：2007-10-31

申请人： Kyoung-Ju Shin ,  Hye-Young Ryu ,  Jang-Soo Kim ,  Chong-Chul Chal ,  Jae-Hyoung Youn ,  Young-Wook Lee

发明人： Kyoung-Ju Shin ,  Hye-Young Ryu ,  Jang-Soo Kim ,  Chong-Chul Chal ,  Jae-Hyoung Youn ,  Young-Wook Lee

IPC分类号： G02F1/1335 ,  G02F1/1343

CPC分类号： G02F1/133514 ,  G02F1/134309 ,  G02F2001/134345 ,  G02F2001/136222

摘要： A thin film transistor array panel includes a substrate, a first gate line and a second gate line formed on the substrate, a storage electrode line between the first gate line and the second gate line, a data line intersecting the first gate line and the second gate line, a first thin film transistor connected to the first gate line and the data line, at least one color filter formed on the first thin film transistor, wherein the color filter comprises a first portion adjacent the first gate line with respect to the storage electrode line, a second portion adjacent the second gate line with respect to the storage electrode line, and a first connection connecting the first portion and the second portion and having a narrower width than that of the first and second portions, a first sub-pixel electrode formed on the color filter and connected to the first thin film transistor, and a second sub-pixel electrode facing the first sub-pixel electrode with respect to a gap, wherein at least one of an edge of the first sub-pixel electrode and an edge of the second sub-pixel electrode crosses over the first connection of the color filter, the edge of the first sub-pixel electrode, and the edge of the second sub-pixel electrode defining the gap between the first sub-pixel electrode and the second sub-pixel electrode.

摘要翻译： 薄膜晶体管阵列面板包括基板，形成在基板上的第一栅极线和第二栅极线，在第一栅极线和第二栅极线之间的存储电极线，与第一栅极线和第二栅极线相交的数据线 栅极线，连接到第一栅极线和数据线的第一薄膜晶体管，形成在第一薄膜晶体管上的至少一个滤色器，其中滤色器包括相对于存储器的第一栅极线的第一部分 电极线，相对于存储电极线相邻于第二栅极线的第二部分，以及连接第一部分和第二部分并且具有比第一和第二部分窄的宽度的第一连接，第一子像素 电极，形成在滤色器上并连接到第一薄膜晶体管，第二子像素电极相对于间隙面对第一子像素电极，其中至少在 第一子像素电极的边缘和第二子像素电极的边缘的第二子像素电极的边缘与滤色器的第一连接，第一子像素电极的边缘和第二子像素电极的边缘交叉 限定第一子像素电极和第二子像素电极之间的间隙的电极。

公开(公告)号：US20070187741A1

公开(公告)日：2007-08-16

申请号：US11690702

申请日：2007-03-23

申请人： Woo-Geun LEE ,  Hye-Young RYU

发明人： Woo-Geun LEE ,  Hye-Young RYU

IPC分类号： H01L29/94

CPC分类号： G02F1/1368 ,  H01L27/1255

摘要： In a thin film transistor substrate, a method of manufacturing the same, and a display apparatus having the same, a thin film transistor, a gate member, and a storage member are formed on an insulating substrate. The gate member has a gate line and a gate electrode electrically connected to the gate line, and the storage member has a storage line, a first storage electrode, and a second storage electrode. A data member is formed on an active layer. The data member includes a data line crossing the gate line, a third storage electrode overlapped with the first storage electrode and a fourth storage electrode overlapped with the second storage electrode. Thus, a capacitance variation of a storage capacitor may be prevented, thereby improving display quality of a display apparatus.

摘要翻译： 在绝缘基板上形成薄膜晶体管基板及其制造方法及具有该薄膜晶体管基板的显示装置，薄膜​​晶体管，栅极部件和存储部件。 栅极部件具有与栅极线电连接的栅极线和栅电极，并且存储部件具有存储线，第一存储电极和第二存储电极。 在有源层上形成数据元件。 数据构件包括与栅极线交叉的数据线，与第一存储电极重叠的第三存储电极和与第二存储电极重叠的第四存储电极。 因此，可以防止存储电容器的电容变化，从而提高显示装置的显示质量。