Thin film transistor array substrate and method of fabricating the same
    4.
    发明授权
    Thin film transistor array substrate and method of fabricating the same 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号:US08994023B2

    公开(公告)日:2015-03-31

    申请号:US13115088

    申请日:2011-05-24

    摘要: A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.

    摘要翻译: 提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。 薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板,形成在绝缘基板上的栅极绝缘膜,设置在栅极绝缘膜上的氧化物半导体图案,形成在氧化物半导体上的抗蚀刻图案 图案,以及形成在防蚀刻图案上的源电极和漏电极。 氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分,并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。

    Display substrate and method of manufacturing the display substrate
    5.
    发明授权
    Display substrate and method of manufacturing the display substrate 有权
    显示基板和制造显示基板的方法

    公开(公告)号:US08735890B2

    公开(公告)日:2014-05-27

    申请号:US13328658

    申请日:2011-12-16

    IPC分类号: H01L29/786

    CPC分类号: H01L27/1225 H01L27/1288

    摘要: In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

    摘要翻译: 在显示基板和显示基板的制造方法中,显示基板包括数据线,通道图案,绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开,并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上,以通过接触孔与输出电极接触。 因此,可以使氧化物半导体层的损伤最小化,并且可以简化制造工艺。

    Thin film transistor display panel and manufacturing method of the same
    10.
    发明授权
    Thin film transistor display panel and manufacturing method of the same 有权
    薄膜晶体管显示面板及其制造方法相同

    公开(公告)号:US09184090B2

    公开(公告)日:2015-11-10

    申请号:US13151102

    申请日:2011-06-01

    摘要: A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.

    摘要翻译: 提供具有高电荷迁移率并且可以获得相对于大面积显示器的均匀电特性的TFT显示面板及其制造方法。 TFT显示面板包括形成在绝缘基板上的栅极电极,栅极上由SiNx形成的第一栅极绝缘层,在第一栅极绝缘层上由SiOx形成的第二栅极绝缘层,形成为与栅极电极重叠的氧化物半导体层 栅电极,并具有通道部分,以及由氧化物半导体层和栅电极上的SiO x形成的钝化层,钝化层包括暴露漏电极的接触孔。 接触孔具有直接与金属一起暴露的部分的钝化层占据比上钝化层小的形状。