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    Nonvolatile memory device, storage system having the same, and method of driving the nonvolatile memory device
    31.
    发明授权
    Nonvolatile memory device, storage system having the same, and method of driving the nonvolatile memory device 有权
    非易失性存储器件，具有相同的存储系统以及驱动非易失性存储器件的方法

    公开(公告)号：US08050084B2

    公开(公告)日：2011-11-01

    申请号：US12893413

    申请日：2010-09-29

    Applicant: Jun-Soo Bae ,  Kwang-Jin Lee ,  Beak-Hyung Cho

    Inventor： Jun-Soo Bae ,  Kwang-Jin Lee ,  Beak-Hyung Cho

    IPC: G11C11/00

    CPC classification number: G11C8/12 ,  G11C7/04 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C2013/0054 ,  G11C2211/5634

    Abstract: A nonvolatile memory device includes a memory cell array including a plurality of nonvolatile memory cells each having a resistance corresponding to one of a plurality of first resistance distributions, a temperature compensation circuit including one or more reference cells each having a resistance corresponding to one among one or more second resistance distributions, and a data read circuit including a compensation unit and a sense amplifier, the compensation unit being adapted to supply compensation current to a sensing node, an amount of the compensation current varying based on the resistance of each reference cell, and the sense amplifier being adapted to compare the level of the sensing node with a reference level and to output a comparison result.

    Abstract translation: 非易失性存储器件包括存储单元阵列，其包括多个非易失性存储单元，每个非易失性存储单元具有对应于多个第一电阻分布之一的电阻，温度补偿电路包括一个或多个参考单元，每个参考单元具有对应于一个 或更多的第二电阻分布，以及包括补偿单元和读出放大器的数据读取电路，所述补偿单元适于向感测节点提供补偿电流，所述补偿电流的量基于每个参考单元的电阻而变化， 并且所述读出放大器适于将感测节点的电平与参考电平进行比较并输出比较结果。

    Non-volatile memory device including phase-change material
    32.
    发明申请
    Non-volatile memory device including phase-change material 有权
    包括相变材料的非易失性存储器件

    公开(公告)号：US20110049457A1

    公开(公告)日：2011-03-03

    申请号：US12657345

    申请日：2010-01-19

    Applicant: Myung-jin Kang ,  Jun-soo Bae ,  Doo-hwan Park ,  Eun-hee Cho

    Inventor： Myung-jin Kang ,  Jun-soo Bae ,  Doo-hwan Park ,  Eun-hee Cho

    IPC: H01L45/00

    CPC classification number: H01L45/141 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/144

    Abstract: A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by InXSbYTeZ or, alternatively, with substitutions of silicon and/or tin for indium, arsenic and/or bismuth for antimony, and selenium for tellurium; and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer.

    Abstract translation: 包括具有低工作电压和低功耗的相变材料的非易失性存储器件包括下电极; 相变材料层，形成在下电极上以与下电极电连接，其中相变材料层包括具有由InXSbYTeZ表示的组成的相变材料，或者替代地，硅和 /或锡用于铟，砷和/或锑的锑，硒用于碲; 以及形成在所述相变材料层上以与所述相变材料层电连接的上电极。

    Magnetic memory device and method of fabricating the same
    33.
    发明授权
    Magnetic memory device and method of fabricating the same 有权
    磁记忆装置及其制造方法

    公开(公告)号：US07732222B2

    公开(公告)日：2010-06-08

    申请号：US11465075

    申请日：2006-08-16

    Applicant: Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Se-Chung Oh ,  Kyung-Tae Nam

    Inventor： Jun-Soo Bae ,  Jang-Eun Lee ,  Hyun-Jo Kim ,  Se-Chung Oh ,  Kyung-Tae Nam

    IPC: H01L21/00

    CPC classification number: G11C11/15 ,  B82Y25/00 ,  B82Y40/00 ,  H01F10/3254 ,  H01F10/3272 ,  H01F10/3281 ,  H01F41/302 ,  H01L43/08

    Abstract: There is provided a magnetic memory device and a method of forming the same. The magnetic memory device includes an invariable pinning pattern and a variable pinning pattern on a substrate. A tunnel barrier pattern is interposed between the invariable pinning pattern and the variable pinning pattern, and the pinned pattern is interposed between the invariable pinning pattern and the tunnel barrier pattern. A storage free pattern is interposed between the tunnel barrier pattern and the variable pinning pattern, and a guide free pattern is interposed between the storage free pattern and the variable pinning pattern. A free reversing pattern is interposed between the storage and guide free patterns. The free reversing pattern reverses a magnetization direction of the storage free pattern and a magnetization direction of the guide free pattern in the opposite directions.

    Abstract translation: 提供了一种磁存储器件及其形成方法。 磁存储器件在衬底上包括不变的钉扎图案和可变的钉扎图案。 在不变的钉扎图案和可变钉扎图案之间插入隧道势垒图案，并且钉扎图案介于不变钉扎图案和隧道屏障图案之间。 在隧道势垒图案和可变钉扎图案之间插入无存储图案，并且在存储空闲图案和可变钉扎图案之间插入无引导图案。 在存储和无引导模式之间插入一个自由的反转模式。 自由反转图案反转无存储图案的磁化方向和反向自由图案的磁化方向。

    Methods of fabricating multi-layer phase-changeable memory devices
    36.
    发明授权
    Methods of fabricating multi-layer phase-changeable memory devices 有权
    制造多层可相变存储器件的方法

    公开(公告)号：US07615401B2

    公开(公告)日：2009-11-10

    申请号：US12189477

    申请日：2008-08-11

    Applicant: Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

    Inventor： Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

    IPC: H01L21/00

    CPC classification number: H01L45/06 ,  G11C13/0004 ,  G11C2213/79 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

    Abstract: A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase-changeable material pattern. The phase-changeable material pattern includes a first phase-changeable material layer and a second phase-changeable material layer. The first and second phase-changeable material patterns have different chemical, physical, and/or electrical characteristics. For example, the second phase-changeable material layer may have a greater resistivity than the first phase-changeable material layer. For instance, the first phase-changeable material layer may include nitrogen at a first concentration, and the second phase-changeable material layer may include nitrogen at a second concentration that is greater than the first concentration. Related devices and fabrication methods are also discussed.

    Abstract translation: 可变相存储器件包括相变材料图案，以及电连接到相变材料图案的第一和第二电极。 第一和第二电极被配置为向相变材料图案提供电信号。 相变材料图案包括第一相变材料层和第二相变材料层。 第一和第二可相变材料图案具有不同的化学，物理和/或电特性。 例如，第二相变材料层可以具有比第一相变材料层更大的电阻率。 例如，第一相变材料层可以包括第一浓度的氮，第二相变材料层可以包括大于第一浓度的第二浓度的氮。 还讨论了相关设备和制造方法。

    Phase changeable structure and method of forming the same
    37.
    发明授权
    Phase changeable structure and method of forming the same 有权
    相变结构及其形成方法

    公开(公告)号：US07569430B2

    公开(公告)日：2009-08-04

    申请号：US11674580

    申请日：2007-02-13

    Applicant: Jun-Soo Bae ,  Hideki Horii ,  Ji-Hye Yi ,  Young-Soo Lim

    Inventor： Jun-Soo Bae ,  Hideki Horii ,  Ji-Hye Yi ,  Young-Soo Lim

    IPC: H01L21/82

    CPC classification number: H01L45/1675 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144

    Abstract: The present invention relates to a phase changeable structure having decreased amounts of defects and a method of forming the phase changeable structure. A stacked composite is first formed by (i) forming a phase changeable layer including a chalcogenide is formed on a lower electrode, (ii) forming an etch stop layer having a first etch rate with respect to a first etching material including chlorine on the phase changeable layer, and (iii) forming a conductive layer having a second etch rate with respect to the first etching material on the etch stop layer. The conductive layer of the stacked composite is then etched using the first etching material to form an upper electrode. The etch stop layer and the phase changeable layer are then etched using a second etching material that is substantially flee of chlorine to form an etch stop pattern and a phase changeable pattern, respectively.

    Abstract translation: 本发明涉及具有减少的缺陷量的相变结构和形成相变结构的方法。 首先通过（i）在下电极上形成包括硫族化物的相变层来形成堆叠复合体，（ii）形成相对于在相上包括氯的第一蚀刻材料具有第一蚀刻速率的蚀刻停止层 可变层，和（iii）形成相对于蚀刻停止层上的第一蚀刻材料具有第二蚀刻速率的导电层。 然后使用第一蚀刻材料蚀刻层叠复合体的导电层以形成上电极。 然后使用基本上不含氯的第二蚀刻材料来蚀刻蚀刻停止层和相变层，以分别形成蚀刻停止图案和相变图案。

    Phase change memory device and method of fabricating the same
    38.
    发明申请
    Phase change memory device and method of fabricating the same 有权
    相变存储器件及其制造方法

    公开(公告)号：US20080237566A1

    公开(公告)日：2008-10-02

    申请号：US11905244

    申请日：2007-09-28

    Applicant: Hyeong-Geun AN ,  Hideki HORII ,  Jong-Chan SHIN ,  Dong-Ho AHN ,  Jun-Soo BAE ,  Jeong-Hee PARK

    Inventor： Hyeong-Geun AN ,  Hideki HORII ,  Jong-Chan SHIN ,  Dong-Ho AHN ,  Jun-Soo BAE ,  Jeong-Hee PARK

    IPC: H01L47/00

    CPC classification number: H01L27/2463 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1683

    Abstract: A phase change memory device and method of manufacturing the same is provided. A first electrode having a first surface is provided on a substrate. A second electrode having a second surface at a different level from the first surface is on the substrate. The second electrode may be spaced apart from the first electrode. A third electrode may be formed corresponding to the first electrode. A fourth electrode may be formed corresponding to the second electrode. A first phase change pattern may be interposed between the first surface and the third electrode. A second phase change pattern may be interposed between the second surface and the fourth electrode. Upper surfaces of the first and second phase change patterns may be on the same plane

    Abstract translation: 提供了一种相变存储器件及其制造方法。 具有第一表面的第一电极设置在基板上。 具有与第一表面不同的第二表面的第二电极在基板上。 第二电极可以与第一电极间隔开。 可以对应于第一电极形成第三电极。 可以对应于第二电极形成第四电极。 可以在第一表面和第三电极之间插入第一相变图案。 可以在第二表面和第四电极之间插入第二相变图案。 第一和第二相变图案的上表面可以在同一平面上

    Multi-layer phase-changeable memory devices
    39.
    发明授权
    Multi-layer phase-changeable memory devices 有权
    多层可相变存储器件

    公开(公告)号：US07425735B2

    公开(公告)日：2008-09-16

    申请号：US11627775

    申请日：2007-01-26

    Applicant: Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

    Inventor： Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

    IPC: H01L27/148 ,  H01L29/768 ,  H01L27/10 ,  H01L29/73 ,  H01L29/74 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC classification number: H01L45/06 ,  G11C13/0004 ,  G11C2213/79 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

    Abstract: A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase-changeable material pattern. The phase-changeable material pattern includes a first phase-changeable material layer and a second phase-changeable material layer. The first and second phase-changeable material patterns have different chemical, physical, and/or electrical characteristics. For example, the second phase-changeable material layer may have a greater resistivity than the first phase-changeable material layer. For instance, the first phase-changeable material layer may include nitrogen at a first concentration, and the second phase-changeable material layer may include nitrogen at a second concentration that is greater than the first concentration. Related devices and fabrication methods are also discussed.

    Abstract translation: 可变相存储器件包括相变材料图案，以及电连接到相变材料图案的第一和第二电极。 第一和第二电极被配置为向相变材料图案提供电信号。 相变材料图案包括第一相变材料层和第二相变材料层。 第一和第二可相变材料图案具有不同的化学，物理和/或电特性。 例如，第二相变材料层可以具有比第一相变材料层更大的电阻率。 例如，第一相变材料层可以包括第一浓度的氮，第二相变材料层可以包括大于第一浓度的第二浓度的氮。 还讨论了相关设备和制造方法。

    Magnetic random access memory device and method of forming the same
    40.
    发明申请
    Magnetic random access memory device and method of forming the same 有权

    公开(公告)号：US20080153179A1

    公开(公告)日：2008-06-26

    申请号：US12073098

    申请日：2008-02-29

    Applicant: Se-Chung OH ,  Jang-Eun LEE ,  Jun-Soo BAE ,  Hyun-Jo KIM ,  Kyung-Tae NAM ,  Young-Ki HA

    Inventor： Se-Chung OH ,  Jang-Eun LEE ,  Jun-Soo BAE ,  Hyun-Jo KIM ,  Kyung-Tae NAM ,  Young-Ki HA

    IPC: H01L21/00

    CPC classification number: G11C11/16 ,  B82Y10/00 ,  B82Y25/00 ,  G11B5/3909 ,  H01L27/228 ,  H01L43/08 ,  H01L43/12 ,  Y10T29/49034 ,  Y10T29/49044

    Abstract: Example embodiments of the present invention disclose a semiconductor memory device and a method of forming a memory device. A semiconductor memory device may include a digit line disposed on a substrate, an intermediate insulating layer covering the digit line, a magnetic tunnel junction (MTJ) pattern disposed on the intermediate insulating layer and over the digit line, the MTJ pattern including a sequentially stacked lower magnetic pattern, upper magnetic pattern, and capping pattern, wherein the capping pattern does not react with the upper magnetic pattern at a temperature above about 280° C., and a bit line connected to the capping pattern and disposed to intersect the digit line. A method of forming a semiconductor memory device may include forming a digit line on a substrate, forming an intermediate insulating layer covering the digit line, forming a magnetic tunnel junction (MTJ) pattern on the intermediate insulating layer, the MTJ pattern including a sequentially stacked lower magnetic pattern, upper magnetic pattern, and capping pattern, wherein the capping pattern does not react with the upper magnetic pattern at a temperature above about 280° C., performing an annealing operation at a temperature of about 350° C. or higher, and forming a bit line connected to the capping pattern and disposed to intersect the digit line.

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