公开(公告)号：US07319255B2

公开(公告)日：2008-01-15

申请号：US11138034

申请日：2005-05-26

申请人： Sung-Wook Hwang ,  Chang-Jin Kang ,  Kyeong-Koo Chi ,  Sung-Hoon Chung

发明人： Sung-Wook Hwang ,  Chang-Jin Kang ,  Kyeong-Koo Chi ,  Sung-Hoon Chung

IPC分类号： H01L29/94 ,  H01L21/28

CPC分类号： H01L29/4236 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66553 ,  H01L29/66621

摘要： A semiconductor device including a transistor and a method of forming thereof are provided. The semiconductor device comprises a metal gate electrode. A lower portion of the metal gate electrode fills a channel trench formed at a predetermined region of a substrate, and an upper portion of the metal gate electrode protrudes on the substrate. A gate insulating layer is interposed between inner sidewalls and a bottom surface of the channel trench, and the metal gate electrode. Source/drain regions are formed at the substrate in both sides of the metal gate electrode.

摘要翻译： 提供了包括晶体管及其形成方法的半导体器件。 半导体器件包括金属栅电极。 金属栅电极的下部填充形成在衬底的预定区域处的沟道沟槽，并且金属栅电极的上部在衬底上突出。 栅极绝缘层插入在沟道沟槽的内侧壁和底表面之间以及金属栅电极之间。 源极/漏极区域形成在金属栅电极两侧的衬底处。

公开(公告)号：US20070187806A1

公开(公告)日：2007-08-16

申请号：US11505323

申请日：2006-08-17

申请人： Min-Woo Kim ,  Sung-Wook Hwang ,  Gwang-Man Lim

发明人： Min-Woo Kim ,  Sung-Wook Hwang ,  Gwang-Man Lim

IPC分类号： H01L23/495

CPC分类号： H05K1/147 ,  H01L2224/16225 ,  H05K1/141 ,  H05K1/189 ,  H05K3/363 ,  H05K2201/10689 ,  H05K2201/10734

摘要： A semiconductor chip package mounting structure may mount a semiconductor chip package on a module board by implementing a flexible circuit board. The semiconductor chip package may be electrically connected to a first surface of the flexible circuit board and the module board may be electrically connected to a second surface of the flexible circuit board.

摘要翻译： 半导体芯片封装安装结构可以通过实现柔性电路板将半导体芯片封装安装在模块板上。 半导体芯片封装可以电连接到柔性电路板的第一表面，并且模块板可以电连接到柔性电路板的第二表面。

公开(公告)号：US20070035009A1

公开(公告)日：2007-02-15

申请号：US11502399

申请日：2006-08-11

申请人： Sung-wook Hwang ,  Sang-ho An

发明人： Sung-wook Hwang ,  Sang-ho An

IPC分类号： H01L23/12

CPC分类号： H01L25/105 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K3/3452 ,  H05K2201/099 ,  H05K2201/10734 ,  H01L2224/78 ,  H01L2224/45099 ,  H01L2924/00012

摘要： In an example embodiment, a printed circuit board (PCB) includes a package substrate having a plurality of first solder balls and a first resist layer formed on the first side. The first resist layer may have a plurality of first elliptical openings. Each of the first elliptical openings exposes a portion of one of the solder ball lands, respectively. In a related example embodiment, the first solder ball lands may be disposed along at least one direction of the first side and long axis of the first elliptical openings are disposed having a declination of 30° to 60° with respect to the at least one direction. In yet another example embodiment, the PCB may also have a plurality of second solder ball lands formed on a second side of the package substrate, along with a second resist layer formed on the second side of the package and including a plurality of second elliptical openings exposing a portion of one of the second solder ball lands, respectively. The PCB may also include a mounting region for a semiconductor chip located on the second side of the package substrate.

摘要翻译： 在示例性实施例中，印刷电路板（PCB）包括具有多个第一焊球和在第一侧上形成的第一抗蚀剂层的封装基板。 第一抗蚀剂层可以具有多个第一椭圆形开口。 每个第一椭圆形开口分别暴露焊球之一的一部分。 在相关的示例性实施例中，第一焊球焊盘可以沿着第一边的至少一个方向设置，并且第一椭圆形开口的长轴设置成相对于至少一个方向具有30°至60°的偏角 。 在另一个示例性实施例中，PCB还可以具有形成在封装基板的第二侧上的多个第二焊球焊盘，以及形成在封装的第二侧上的第二抗蚀剂层，并且包括多个第二椭圆形开口 分别露出第二焊球区域中的一个的一部分。 PCB还可以包括位于封装基板的第二侧上的用于半导体芯片的安装区域。

公开(公告)号：US20060219886A1

公开(公告)日：2006-10-05

申请号：US11338678

申请日：2006-01-25

申请人： Sung-Wook Hwang

发明人： Sung-Wook Hwang

IPC分类号： H05H3/02

CPC分类号： H05H3/02

摘要： There is provided an apparatus for measuring an angle distribution of neutral beams. The apparatus includes a Faraday cup assembly having an opening disposed in a trajectory path of neutral beams supplied from a neutral beam source and receives neutral beam particles, a secondary electron emission plate disposed in the Faraday cup such that the neutral beam particles passing through the opening collide with it to generate secondary electron emissions, and a secondary electron collector disposed to collect the secondary electron emissions.

摘要翻译： 提供了一种用于测量中性梁的角度分布的装置。 该装置包括法拉第杯组件，其具有设置在从中性束源提供的中性梁的轨迹路径中的开口，并且接收中性束粒子，设置在法拉第杯中的二次电子发射板，使得穿过开口的中性束粒子 与其碰撞以产生二次电子发射，并且设置用于收集二次电子发射的二次电子收集器。

公开(公告)号：US06718293B1

公开(公告)日：2004-04-06

申请号：US09372595

申请日：1999-08-12

申请人： Jae-Hee Ha ,  Sang-Heup Moon ,  Byeong-Ok Cho ,  Sung-Wook Hwang

发明人： Jae-Hee Ha ,  Sang-Heup Moon ,  Byeong-Ok Cho ,  Sung-Wook Hwang

IPC分类号： G06G748

CPC分类号： G06F17/5018

摘要： A computer simulation method for a semiconductor device manufacturing process, includes: a first step for forming an initial section of the material with only open cells exposed to the growth or etching among the cells; a second step for inputting information including growth or etching points into each open cell; a third step for computing a movement speed for the growth or etching points; a fourth step for moving the growth or etching points for a time determined according to the movement speed; and a fifth step for forming a new etching section by re-arranging the open cells exposed to the growth or etching, after moving the growth or etching points, the second to fifth steps being repeatedly performed on the re-arranged open cells until the sum of the predetermined time reaches the time (T).

摘要翻译： 一种用于半导体器件制造工艺的计算机模拟方法，包括：第一步骤，用于仅形成暴露于单元之间的生长或蚀刻的开放单元的材料的初始部分; 用于将包括生长或蚀刻点的信息输入到每个开放单元的第二步骤; 用于计算生长或蚀刻点的移动速度的第三步骤; 第四步骤，用于根据移动速度移动生长或蚀刻点一段时间; 以及第五步骤，通过重新布置暴露于生长或蚀刻的开放单元，在移动生长或蚀刻点之后形成新的蚀刻部分，在重新排列的开放单元上重复执行第二至第五步骤，直到总和 的时间达到时间（T）。