Abstract:
A method for forming copper indium gallium (sulfide) selenide (CIGS) solar cells, cadmium telluride (CdTe) solar cells, and copper zinc tin (sulfide) selenide (CZTS) solar cells using laser annealing techniques to anneal the absorber and/or the buffer layers. Laser annealing may result in better crystallinity, lower surface roughness, larger grain size, better compositional homogeneity, a decrease in recombination centers, and increased densification. Additionally, laser annealing may result in the formation of non-equilibrium phases with beneficial results.
Abstract:
Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH)2 film on the substrate, where the forming the Ni(OH)2 occurs at the cathode; and annealing the Ni(OH)2 film to form the NiO film, where the NiO film forms a portion of a resistive switching memory element. In some embodiments, methods further include forming a top electrode on the NiO film and before the forming the Ni(OH)2 film, pretreating the substrate. In some embodiments, methods are presented where the bottom electrode and the top electrode are a conductive material.
Abstract:
Embodiments of the current invention include methods of improving a process of forming a textured TCO film by combinatorial methods. The combinatorial method may include depositing a TCO by physical vapor deposition or sputtering, annealing the TCO, and etching the TCO where at least one of the depositing, the annealing, or the etching is performed combinatorially. Embodiments of the current invention also include improved methods of forming the TCO based on the results of combinatorial testing.
Abstract:
Surface texturing of the transparent conductive oxide (TCO) front contact of a thin film photovoltaic (TFPV) solar cell is needed to enhance the light-trapping capability of the TFPV solar cells and thus improving the solar cell efficiency. Embodiments of the current invention describe chemical formulations and methods for the wet etching of the TCO. The formulations and methods may be optimized to tune the surface texturing of the TCO as desired.
Abstract:
Embodiments provided herein describe a low-e panel and a method for forming a low-e panel. A transparent substrate is provided. A metal oxide layer is formed over the transparent substrate. The metal oxide layer includes a first element, a second element, and a third element. A reflective layer is formed over the transparent substrate. The first element may include tin or zinc. The second element and the third element may each include tin, zinc, antimony, silicon, strontium, titanium, niobium, zirconium, magnesium, aluminum, yttrium, lanthanum, hafnium, or bismuth. The metal oxide layer may also include nitrogen.
Abstract:
Embodiments of the current invention include methods of improving a process of forming a textured TCO film by combinatorial methods. The combinatorial method may include depositing a TCO by physical vapor deposition or sputtering, annealing the TCO, and etching the TCO where at least one of the depositing, the annealing, or the etching is performed combinatorially. Embodiments of the current invention also include improved methods of forming the TCO based on the results of combinatorial testing.
Abstract:
Method for monitoring and controlling a combinatorial process are presenting including: receiving a substrate; executing the combinatorial process, wherein the combinatorial process includes an in-line chemical preparation; analyzing the in-line chemical preparation for conformance with a corresponding in-line chemical preparation parameter using an in-line chemical analysis; and if the in-line chemical preparation is out of conformance with the corresponding in-line chemical preparation parameter, adjusting the in-line chemical preparation to conform with the corresponding in-line chemical preparation parameter utilizing a replenishing chemical preparation. In some embodiments, methods further include: performing a post-chemical mechanical planarization (CMP) clean before executing the combinatorial process, wherein the combinatorial process is a pre-clean; and depositing a capping layer after the pre-clean.
Abstract:
Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl3, and a pH adjuster.
Abstract:
Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.
Abstract:
Method for monitoring and controlling a combinatorial process are presenting including: receiving a substrate; executing the combinatorial process, wherein the combinatorial process includes an in-line chemical preparation; analyzing the in-line chemical preparation for conformance with a corresponding in-line chemical preparation parameter using an in-line chemical analysis; and if the in-line chemical preparation is out of conformance with the corresponding in-line chemical preparation parameter, adjusting the in-line chemical preparation to conform with the corresponding in-line chemical preparation parameter utilizing a replenishing chemical preparation. In some embodiments, methods further include: performing a post-chemical mechanical planarization (CMP) clean before executing the combinatorial process, wherein the combinatorial process is a pre-clean; and depositing a capping layer after the pre-clean.