公开(公告)号：US5793272A

公开(公告)日：1998-08-11

申请号：US701922

申请日：1996-08-23

申请人： Joachim Norbert Burghartz ,  Daniel Charles Edelstein ,  Christopher Vincent Jahnes ,  Cyprian Emeka Uzoh

发明人： Joachim Norbert Burghartz ,  Daniel Charles Edelstein ,  Christopher Vincent Jahnes ,  Cyprian Emeka Uzoh

IPC分类号： H01F17/00 ,  H01F17/06 ,  H01F27/28 ,  H01F30/16 ,  H01F41/04 ,  H01L23/522 ,  H01F5/00 ,  H01F27/24

CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F17/0033 ,  H01F27/2804 ,  H01F27/2895 ,  H01F30/16 ,  H01F41/042 ,  H01F41/046 ,  H01F17/06 ,  H01L2924/0002 ,  Y10T29/4902

摘要： High quality factor (Q) spiral and toroidal inductor and transformer are disclosed that are compatible with silicon very large scale integration (VLSI) processing, consume a small IC area, and operate at high frequencies. The spiral inductor has a spiral metal coil deposited in a trench formed in at dielectric layer over a substrate. The metal coil is enclosed in ferromagnetic liner and cap layers, and is connected to an underpass contact through a metal filled via in the dielectric layer. The spiral inductor also includes ferromagnetic cores lines surrounded by the metal spiral coil. A spiral transformer is formed by vertically stacking two spiral inductors, or placing them side-by-side over a ferromagnetic bridge formed below the metal coils and cores lines. The toroidal inductor includes a toroidal metal coil with a core having ferromagnetic strips. The toroidal metal coil is segmented into two coils each having a pair of ports to form a toroidal transformer.

摘要翻译： 公开了与硅非常大规模集成（VLSI）处理兼容的高质量因子（Q）螺旋和环形电感器和变压器，消耗小的IC区域并在高频下操作。 螺旋电感器具有沉积在衬底上的电介质层中形成的沟槽中的螺旋金属线圈。 金属线圈封装在铁磁衬垫和盖层中，并通过电介质层中的金属填充通孔连接到地下通道接触。 螺旋电感器还包括由金属螺旋线圈包围的铁磁芯线。 通过垂直堆叠两个螺旋电感器或将它们并排放置在形成在金属线圈和芯线下方的铁磁桥上，形成螺旋形变压器。 环形电感器包括具有铁磁条的芯的环形金属线圈。 环形金属线圈被分成两个线圈，每个线圈具有一对端口以形成环形变压器。

公开(公告)号：US08426316B2

公开(公告)日：2013-04-23

申请号：US12204412

申请日：2008-09-04

申请人： John Michael Cotte ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes ,  Robert Luke Wisnieff

发明人： John Michael Cotte ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes ,  Robert Luke Wisnieff

IPC分类号： H01L21/302 ,  C23F1/00

CPC分类号： H01L21/306 ,  H01L21/32135 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76865 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2924/01002 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/00

摘要： Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta liner completely to the dielectric layer. In the preferred embodiments, the present invention uses XeF2 selective gas phase etching as alternatives to Ta—TaN Chemical Mechanical Polishing (CMP) as a basic “liner removal process” and as a “selective cap plating base removal process.” In this first use, XeF2 is used to remove the metal liner, TaN—Ta, after copper CMP. In the second use, the XeF2 etch is used to selectively remove a plating base (TaN—Ta) that was used to form a metal cap layer over the copper conductor.

摘要翻译： 公开了一种在电介质层上处理包括衬底，电介质层和TaN-Ta衬垫的类型的半导体结构的方法和系统。 该方法包括使用XeF 2将至少一部分TaN-Ta衬套完全去除到介电层的步骤。 在优选实施例中，本发明使用XeF2选择性气相蚀刻作为Ta-TaN化学机械抛光（CMP）的替代品作为基本的“衬垫去除工艺”，并且作为“选择性电镀镀层去除工艺”。 在第一次使用中，XeF2用于在铜CMP之后去除金属衬垫TaN-Ta。 在第二次使用中，XeF2蚀刻用于选择性地去除用于在铜导体上形成金属覆盖层的电镀基底（TaN-Ta）。

公开(公告)号：US20120217651A1

公开(公告)日：2012-08-30

申请号：US13468609

申请日：2012-05-10

申请人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

发明人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.

摘要翻译： 提出了用于形成通孔的方法和装置，例如，在包括衬底的半导体晶片的一部分中形成通孔的方法。 该方法包括形成围绕基板的第一部分的沟槽，使得第一部分与基板的第二部分分离，在第一部分内形成穿过基板的孔，并在孔内形成第一金属。 沟槽延伸穿过衬底。 第一金属从基板的前表面延伸到基板的后表面。 通孔包括孔和第一金属。

公开(公告)号：US20090108381A1

公开(公告)日：2009-04-30

申请号：US10316254

申请日：2002-12-10

申请人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

发明人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

IPC分类号： H03H9/24 ,  H01L23/28 ,  H01L21/56

CPC分类号： B81C1/00246 ,  B81B2201/0271 ,  B81C1/0023 ,  B81C2203/0735 ,  H03H3/0072 ,  H03H9/2405

摘要： A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material. The method of removal of the sacrificial material is by an oxygen plasma or an anneal in an oxygen containing ambient. A method of vacuum encapsulation of the MEMS resonator or filter is provided through means of a cavity containing the MEMS device, filled with additional sacrificial material, and sealed. Access vias are created through the membrane sealing the cavity; the sacrificial material is removed as stated previously, and the vias are re-sealed in a vacuum coating process.

摘要翻译： 一种形成微机电系统（MEMS）谐振器或滤波器的方法，其与在任何模拟，数字或混合信号集成电路（IC）工艺中的集成兼容，或者与这些工艺中的金属互连层的形成同时 ，由于其组成材料，加工步骤和制造温度。 MEMS谐振器或滤波器包含形成MEMS谐振器或滤波器的电极的较低金属电平，其可与IC上的现有金属互连电平中的任何一个或任何一个共享。 它还包括谐振元件，该谐振元件由用于电连接和静电驱动的至少一个金属层和至少一个用于结构目的的电介质层组成。 通过沉积并随后去除由碳基材料构成的牺牲层来产生电极和谐振构件之间的间隙。 去除牺牲材料的方法是通过氧等离子体或在含氧环境中的退火。 MEMS谐振器或滤波器的真空封装方法是通过一个包含MEMS器件的空腔的装置提供的，其中填充有额外的牺牲材料并被密封。 通过隔膜密封腔形成通孔; 如先前所述去除牺牲材料，并且在真空涂覆工艺中重新密封通孔。

公开(公告)号：US07518229B2

公开(公告)日：2009-04-14

申请号：US11498689

申请日：2006-08-03

申请人： John Michael Cotte ,  Brian Paul Gaucher ,  Janusz Grzyb ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes ,  John Ulrich Knickerbocker ,  Duixian Liu ,  John Harold Magerlein ,  Chirag Suryakant Patel ,  Ullrich R. Pfeiffer ,  Cornelia Kang-I Tsang

发明人： John Michael Cotte ,  Brian Paul Gaucher ,  Janusz Grzyb ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes ,  John Ulrich Knickerbocker ,  Duixian Liu ,  John Harold Magerlein ,  Chirag Suryakant Patel ,  Ullrich R. Pfeiffer ,  Cornelia Kang-I Tsang

IPC分类号： H01L23/04

CPC分类号： H01L25/165 ,  H01L23/66 ,  H01L24/24 ,  H01L24/82 ,  H01L25/162 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01Q1/2283 ,  H01L2924/00 ,  H01L2224/0401

摘要： An apparatus is described incorporating an interposer having a cavity for a portion of an antenna structure, having conductor through vias, a top Si part having interconnection wiring and having pads for electrically mounting an integrated circuit chip thereon, wherein the top Si part mates with the interposer electrically and mechanically. The interposer and top Si part may be scaled to provide an array of functional units. The invention overcomes the problem of combining a high efficient antenna with integrated circuit chips in a Si package with signal frequencies from 1 to 100 GHz and the problem of shielding components proximate to the antenna and reduces strain arising from mismatching of TCEs.

摘要翻译： 描述了一种装置，其具有用于天线结构的一部分的空腔的插入件，具有导体穿过通孔，顶部Si部分具有互连布线并具有用于在其上电气安装集成电路芯片的焊盘，其中顶部Si部分与 内插器电气和机械。 插入器和顶部Si部分可以被缩放以提供功能单元的阵列。 本发明克服了将高效天线与Si封装中的集成电路芯片组合在一起的信号频率为1至100GHz的问题，以及屏蔽靠近天线的组件的问题，并减少了由于TCE失配引起的应变。

公开(公告)号：US20080186247A1

公开(公告)日：2008-08-07

申请号：US12062665

申请日：2008-04-04

申请人： John Michael Cotte ,  Brian Paul Gaucher ,  Janusz Grzyb ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes ,  John Ulrich Knickerbocker ,  Duixian Liu ,  John Harold Magerlein ,  Chirag Suryakant Patel ,  Ullrich R. Pfeiffer

发明人： John Michael Cotte ,  Brian Paul Gaucher ,  Janusz Grzyb ,  Nils Deneke Hoivik ,  Christopher Vincent Jahnes ,  John Ulrich Knickerbocker ,  Duixian Liu ,  John Harold Magerlein ,  Chirag Suryakant Patel ,  Ullrich R. Pfeiffer

IPC分类号： H01Q1/52

CPC分类号： H01L25/165 ,  H01L23/66 ,  H01L24/24 ,  H01L24/82 ,  H01L25/162 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01Q1/2283 ,  H01L2924/00 ,  H01L2224/0401

摘要： An apparatus is described incorporating an interposer having a cavity for a portion of an antenna structure, having conductor through vias, a top Si part having interconnection wiring and having pads for electrically mounting an integrated circuit chip thereon, wherein the top Si part mates with the interposer electrically and mechanically. The interposer and top Si part may be scaled to provide an array of functional units. The invention overcomes the problem of combining a high efficient antenna with integrated circuit chips in a Si package with signal frequencies from 1 to 100 GHz and the problem of shielding components proximate to the antenna and reduces strain arising from mismatching of TCEs.

摘要翻译： 描述了一种装置，其具有用于天线结构的一部分的空腔的插入件，具有导体穿过通孔，顶部Si部分具有互连布线并具有用于在其上电气安装集成电路芯片的焊盘，其中顶部Si部分与 内插器电气和机械。 插入器和顶部Si部分可以被缩放以提供功能单元的阵列。 本发明克服了将高效天线与Si封装中的集成电路芯片组合在一起的信号频率为1至100GHz的问题，以及屏蔽靠近天线的组件的问题，并减少了由于TCE失配引起的应变。

公开(公告)号：US5884990A

公开(公告)日：1999-03-23

申请号：US949314

申请日：1997-10-14

申请人： Joachim Norbert Burghartz ,  Daniel Charles Edelstein ,  Christopher Vincent Jahnes ,  Cyprian Emeka Uzoh

发明人： Joachim Norbert Burghartz ,  Daniel Charles Edelstein ,  Christopher Vincent Jahnes ,  Cyprian Emeka Uzoh

IPC分类号： H01F17/00 ,  H01F17/06 ,  H01F27/28 ,  H01F30/16 ,  H01F41/04 ,  H01L23/522 ,  H01F5/00 ,  H01F7/06

CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F17/0033 ,  H01F27/2804 ,  H01F27/2895 ,  H01F30/16 ,  H01F41/042 ,  H01F41/046 ,  H01F17/06 ,  H01L2924/0002 ,  Y10T29/4902

摘要： High quality factor (Q) spiral and toroidal inductor and transformer are disclosed that are compatible with silicon very large scale integration (VLSI) processing, consume a small IC area, and operate at high frequencies. The spiral inductor has a spiral metal coil deposited in a trench formed in a dielectric layer over a substrate. The metal coil is enclosed in ferromagnetic liner and cap layers, and is connected to an underpass contact through a metal filled via in the dielectric layer. The spiral inductor also includes ferromagnetic cores lines surrounded by the metal spiral coil. A spiral transformer is formed by vertically stacking two spiral inductors, or placing them side-by-side over a ferromagnetic bridge formed below the metal coils and cores lines. The toroidal inductor includes a toroidal metal coil with a core having ferromagnetic strips. The toroidal metal coil is segmented into two coils each having a pair of ports to form a toroidal transformer.

摘要翻译： 公开了与硅非常大规模集成（VLSI）处理兼容的高质量因子（Q）螺旋和环形电感器和变压器，消耗小的IC区域并在高频下操作。 螺旋电感器具有沉积在形成在衬底上的电介质层中的沟槽中的螺旋金属线圈。 金属线圈封装在铁磁衬垫和盖层中，并通过电介质层中的金属填充通孔连接到地下通道接触。 螺旋电感器还包括由金属螺旋线圈包围的铁磁芯线。 通过垂直堆叠两个螺旋电感器或将它们并排放置在形成在金属线圈和芯线下方的铁磁桥上，形成螺旋形变压器。 环形电感器包括具有铁磁条的芯的环形金属线圈。 环形金属线圈被分成两个线圈，每个线圈具有一对端口以形成环形变压器。

公开(公告)号：US08796138B2

公开(公告)日：2014-08-05

申请号：US13468609

申请日：2012-05-10

申请人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

发明人： John Michael Cotte ,  Christopher Vincent Jahnes ,  Bucknell Chapman Webb

IPC分类号： H01L21/768 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.

摘要翻译： 提出了用于形成通孔的方法和装置，例如，在包括衬底的半导体晶片的一部分中形成通孔的方法。 该方法包括形成围绕基板的第一部分的沟槽，使得第一部分与基板的第二部分分离，在第一部分内形成穿过基板的孔，并在孔内形成第一金属。 沟槽延伸穿过衬底。 第一金属从基板的前表面延伸到基板的后表面。 通孔包括孔和第一金属。

公开(公告)号：US20110109405A1

公开(公告)日：2011-05-12

申请号：US13007130

申请日：2011-01-14

申请人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

发明人： Leena Paivikki Buchwalter ,  Kevin Kok Chan ,  Timothy Joseph Dalton ,  Christopher Vincent Jahnes ,  Jennifer Louise Lund ,  Kevin Shawn Petrarca ,  James Louis Speidell ,  James Francis Ziegler

IPC分类号： H03H9/24

CPC分类号： B81C1/00246 ,  B81B2201/0271 ,  B81C1/0023 ,  B81C2203/0735 ,  H03H3/0072 ,  H03H9/2405

摘要： A microelectromechanical system (MEMS) resonator or filter including a first conductive layer, one or more electrodes patterned in the first conductive layer which serve the function of signal input, signal output, or DC biasing, or some combination of these functions, an evacuated cavity, a resonating member comprised of a lower conductive layer and an upper structural layer, a first air gap between the resonating member and one or more of the electrodes, an upper membrane covering the cavity, and a second air gap between the resonating member and the upper membrane.

摘要翻译： 一种微机电系统（MEMS）谐振器或滤波器，其包括第一导电层，在第一导电层中图案化的一个或多个电极，其用于信号输入，信号输出或DC偏置的功能，或这些功能的某些组合;抽真空腔 ，由下导电层和上结构层构成的谐振构件，在谐振构件和一个或多个电极之间的第一气隙，覆盖空腔的上膜，以及谐振构件和第二气隙之间的第二气隙 上膜。

公开(公告)号：US20090091037A1

公开(公告)日：2009-04-09

申请号：US11866455

申请日：2007-10-03

申请人： Solomon Assefa ,  Gregory Costrini ,  Christopher Vincent Jahnes ,  Michael J. Rooks ,  Jonathan Zanhong Sun

发明人： Solomon Assefa ,  Gregory Costrini ,  Christopher Vincent Jahnes ,  Michael J. Rooks ,  Jonathan Zanhong Sun

IPC分类号： H01L21/768 ,  H01L23/52

CPC分类号： H01L43/12

摘要： A pillar structure that is contacted by a vertical contact is formed in an integrated circuit. A hard mask is formed and utilized to pattern a least a portion of the pillar structure. The hard mask comprises carbon. Subsequently, the hard mask is removed. A conductive material is then deposited in a region previously occupied by the hard mask to form the vertical contact. The hard mask may, for example, comprise diamond-like carbon. The pillar structure may have a width or diameter less than about 100 nanometers.

摘要翻译： 在集成电路中形成由垂直接触件接触的柱结构。 硬掩模被形成并用于对柱结构的至少一部分进行图案化。 硬掩模包含碳。 随后，去除硬掩模。 然后将导电材料沉积在先前由硬掩模占据的区域中以形成垂直接触。 硬掩模可以例如包括类金刚石碳。 柱结构可以具有小于约100纳米的宽度或直径。