Power management of electronic devices utilizing transitions between link states
    31.
    发明授权
    Power management of electronic devices utilizing transitions between link states 有权
    利用链路状态之间的转换的电子设备的电源管理

    公开(公告)号:US08738950B2

    公开(公告)日:2014-05-27

    申请号:US13725880

    申请日:2012-12-21

    IPC分类号: G06F1/00 G06F1/32

    摘要: A method and apparatus for intelligent power management for low power link states. Some embodiments include methods, apparatuses, and systems for a device coupled to a controller via a link; a link power management engine to alter a power state of the link based on a transaction and some knowledge of future transactions between the device and the controller; and a memory or logic to store the link power management engine. In some embodiments, the memory stores information about at least one of the following: the power state of the link, the device buffering, the controller or device state or a history of transactions. In some embodiments, the device is a peripheral of a computer system. In some embodiments, the method may include transitioning the device to various link states. Other embodiments are described.

    摘要翻译: 一种用于低功率链路状态智能电源管理的方法和装置。 一些实施例包括用于经由链路耦合到控制器的设备的方法,设备和系统; 链路功率管理引擎,用于基于事务改变链路的功率状态以及对设备和控制器之间的未来事务的一些知识; 以及用于存储链路电源管理引擎的存储器或逻辑。 在一些实施例中,存储器存储关于以下至少一个的信息:链路的功率状态,设备缓冲,控制器或设备状态或事务历史。 在一些实施例中,设备是计算机系统的外设。 在一些实施例中,该方法可以包括将设备转换到各种链路状态。 描述其他实施例。

    STORAGE DRIVE MANAGEMENT
    34.
    发明申请
    STORAGE DRIVE MANAGEMENT 有权
    存储驱动管理

    公开(公告)号:US20120084582A1

    公开(公告)日:2012-04-05

    申请号:US12894670

    申请日:2010-09-30

    IPC分类号: G06F1/32

    摘要: With embodiments of the invention, a more robust solution is provided using a storage driver that may already be used for the platforms operating system. This is efficient because the storage driver typically already monitors storage drive access requests, and thus knows when traffic is outstanding (performance may be critical) or when it's not outstanding (and power may be saved).

    摘要翻译: 利用本发明的实施例,使用可能已经用于平台操作系统的存储驱动器来提供更强大的解决方案。 这是有效的,因为存储驱动程序通常已经监视存储驱动器访问请求,从而知道流量何时未完成(性能可能至关重要),或者当它不是很好(可能节省电力)时)。

    System and method for controlling processor low power states
    35.
    发明授权
    System and method for controlling processor low power states 有权
    用于控制处理器低功率状态的系统和方法

    公开(公告)号:US07930564B2

    公开(公告)日:2011-04-19

    申请号:US11496944

    申请日:2006-07-31

    IPC分类号: G06F1/00

    CPC分类号: G06F1/3203

    摘要: A next idle state for a processor in a system may be determined based on a previous idle period and a previous idle state. The next idle state for the processor may also be determined based on times when interrupts are generated by devices in the system.

    摘要翻译: 可以基于先前的空闲时段和先前的空闲状态来确定系统中处理器的下一个空闲状态。 处理器的下一个空闲状态也可以基于系统中的设备产生中断的时间来确定。

    Device and method for on-die temperature measurement
    36.
    发明授权
    Device and method for on-die temperature measurement 有权
    用于管芯温度测量的装置和方法

    公开(公告)号:US07878016B2

    公开(公告)日:2011-02-01

    申请号:US11025140

    申请日:2004-12-30

    IPC分类号: F25D23/12 G01K1/08 G06F1/00

    摘要: A system for measuring and managing thermal operations of a processor core on a semiconductor die using a sensor positioned in a hotspot of the processor core. A measured temperature reading is determined based upon a temperature sensed by the sensor. Interrupt signals and a software readable register indicating temperature information provide feedback about the thermal environment to the processor. Based upon the measured temperature reading, the interrupt signals direct the processor to modify operation.

    摘要翻译: 一种用于使用位于处理器核心的热点中的传感器来测量和管理半导体管芯上的处理器核心的热操作的系统。 测量的温度读数是根据传感器感测到的温度来确定的。 中断信号和指示温度信息的软件可读寄存器提供关于处理器的热环境的反馈。 基于测量的温度读数,中断信号指示处理器修改操作。

    Various Methods and Apparatuses for Power States in a Controller
    37.
    发明申请
    Various Methods and Apparatuses for Power States in a Controller 审中-公开
    控制器中功率状态的各种方法和装置

    公开(公告)号:US20100083013A1

    公开(公告)日:2010-04-01

    申请号:US12632548

    申请日:2009-12-07

    IPC分类号: G06F1/00 G06F1/32

    CPC分类号: G06F1/3203 G06F1/325

    摘要: Various methods, apparatuses, and systems are described in which a chipset controller has circuitry to control communications with a peripheral device in a computing device. The chipset controller has logic configured 1) to detect a plug-in event when the peripheral device connects to the chipset controller and 2) to transition the chipset controller from a low power consumption state to a higher power consumption state based on the logic detecting the plug-in event.

    摘要翻译: 描述了各种方法,装置和系统,其中芯片组控制器具有控制与计算设备中的外围设备的通信的电路。 芯片组控制器具有逻辑配置1)当外围设备连接到芯片组控制器时检测插件事件,以及2)基于逻辑检测来将芯片组控制器从低功耗状态转换到更高功耗状态 插件事件。

    Optimization of SMI handling and initialization
    39.
    发明授权
    Optimization of SMI handling and initialization 有权
    优化SMI处理和初始化

    公开(公告)号:US07493435B2

    公开(公告)日:2009-02-17

    申请号:US10681446

    申请日:2003-10-06

    IPC分类号: G06F13/24

    CPC分类号: G06F9/4812 G06F9/4401

    摘要: A method and apparatus for efficient memory allocation and system management interrupt (SMI) handling is herein described. Upon waking a second processor in a multiple processor system, one may use a single SMI to initialize each processor, may use the location of a single default SMI handler as a wake-up vector to the second processor, and may patch an instruction pointer to a non-aligned address during the handling of the SMI with the second processor to forgo the traditional extra aligned memory allocation. In addition, one may use unified handler code to handle software generated SMIs on both the first and second processors and may use exit SMM directly after handling a hardware SMI to save execution time.

    摘要翻译: 这里描述了用于高效存储器分配和系统管理中断(SMI)处理的方法和装置。 当在多处理器系统中唤醒第二处理器时,可以使用单个SMI来初始化每个处理器,可以将单个默认SMI处理器的位置用作到第二处理器的唤醒向量,并且可以将指令指针 在处理SMI期间使用第二处理器来放弃传统的额外对齐的存储器分配的非对齐地址。 此外,可以使用统一的处理程序代码来处理第一和第二处理器上的软件生成的SMI,并且可以在处理硬件SMI之后直接使用退出SMM来节省执行时间。

    Audio noise mitigation for power state transitions
    40.
    发明授权
    Audio noise mitigation for power state transitions 失效
    功率状态转换的音频噪声抑制

    公开(公告)号:US07472289B2

    公开(公告)日:2008-12-30

    申请号:US11019791

    申请日:2004-12-21

    IPC分类号: G06F1/00 H04B15/00

    CPC分类号: G06F1/3203

    摘要: An audio noise mitigation approach. For one aspect, a first voltage associated with a first power management state is provided. A signal responsive to an indication associated with at least a first type of periodic exit event is received and responsive to the signal, a transition to a second voltage associated with a second state is initiated, a rate of the transition to the second voltage being slower than a similar voltage transition initiated in response to a non-periodic exit event.

    摘要翻译: 音频噪声缓解方法。 一方面,提供与第一电源管理状态相关联的第一电压。 接收响应于与至少第一类型的周期性退出事件相关联的指示的信号并且响应于该信号,开始向与第二状态相关联的第二电压的转变,到第二电压的转变的速率较慢 而不是响应于非周期性退出事件而发起的类似电压转换。