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45 条记录 (耗时 0.024 秒)

    Priority encoder
    32.
    发明授权
    Priority encoder 失效
    优先编码器

    公开(公告)号：US5602545A

    公开(公告)日：1997-02-11

    申请号：US462035

    申请日：1995-06-05

    申请人： Yasuhiro Ishii ,  Shigeharu Nakata

    发明人： Yasuhiro Ishii ,  Shigeharu Nakata

    IPC分类号： G06F7/00 ,  G06F7/74 ,  H03M7/00

    CPC分类号： G06F7/74

    摘要： The carry-line comprises a plurality of MOSFETs connected in series. MOSFETs precharge each node when they receive precharge signals /PR. In the case of high-order priority designated mode, when input signals are given for turning on MOSFETs located between one end of the high-order bit side of the carry-line, the control circuit discharges the intermediate node separately from the carry-line. In the case of low-order bit priority designated mode, when input signals are given for turning on MOSFETs located between one end of the low-order bit side of the carry-line and the intermediate node, the control circuit discharges the intermediate node separately from the carry-line.

    摘要翻译： 携带线包括串联连接的多个MOSFET。 当它们接收预充电信号/ PR时，MOSFET为每个节点预充电。 在高优先级指定模式的情况下，当输入信号用于导通位于进位线的高位位一端之间的MOSFET时，控制电路将中间节点与进位线分开放电 。 在低位优先级指定模式的情况下，当输入信号用于导通位于进位线的低位位的一端与中间节点之间的MOSFET时，控制电路分别放电中间节点 从携带线。

    Semiconductor integrated circuit device comprising memory area in which structurally different memory cells are included
    33.
    发明授权
    Semiconductor integrated circuit device comprising memory area in which structurally different memory cells are included 失效
    半导体集成电路器件包括其中包括结构不同的存储器单元的存储器区域

    公开(公告)号：US5420817A

    公开(公告)日：1995-05-30

    申请号：US167152

    申请日：1993-12-16

    申请人： Nobutaka Kitagawa ,  Shigeharu Nakata ,  Yasuhiro Ishii ,  Masue Shiba

    发明人： Nobutaka Kitagawa ,  Shigeharu Nakata ,  Yasuhiro Ishii ,  Masue Shiba

    IPC分类号： G11C17/08 ,  G11C16/02 ,  G11C16/04 ,  G11C17/00 ,  G11C17/12 ,  H01L21/8247 ,  H01L27/115

    CPC分类号： G11C17/12

    摘要： The same bit lines are used in common to a fixed data cell array and a memory cell array. The output section of the fixed data cell array is connected to an output circuit, just like the output section of the memory cell array. In response to signal CON supplied from a computer, an array selector examines the states of the arrays and performs switching between the state where one of the arrays can be selected and the state where neither of them can be selected. In the case where an externally-programmable memory, such as an EPROM, is employed, a write control circuit operates with respect only to the memory cell array, and prohibits data from being written in the fixed data cell array. The fixed data cell array is pre-programmed as a nonvolatile memory by programming means different from that used for programming the cells of the memory cell array.

    摘要翻译： 固定数据单元阵列和存储单元阵列共同使用相同的位线。 固定数据单元阵列的输出部分连接到输出电路，就像存储单元阵列的输出部分一样。 响应于从计算机提供的信号CON，数组选择器检查阵列的状态，并且在可以选择其中一个阵列的状态和不能选择它们的状态之间进行切换。 在采用诸如EPROM的外部可编程存储器的情况下，写入控制电路仅对存储单元阵列进行操作，并且禁止将数据写入固定数据单元阵列。 固定数据单元阵列通过与用于对存储单元阵列的单元进行编程的编程手段不同的编程手段，被预编程为非易失性存储器。

    PARTICULATE COLLECTION FILTER STATE DETECTION DEVICE
    36.
    发明申请
    PARTICULATE COLLECTION FILTER STATE DETECTION DEVICE 有权
    颗粒收集过滤器状态检测装置

    公开(公告)号：US20140090460A1

    公开(公告)日：2014-04-03

    申请号：US14122678

    申请日：2012-03-07

    申请人： Takashi Yamakawa ,  Yasuhiro Ishii ,  Daisuke Minoura

    发明人： Takashi Yamakawa ,  Yasuhiro Ishii ,  Daisuke Minoura

    IPC分类号： F01N9/00 ,  G01M15/10

    CPC分类号： F01N9/002 ,  F01N9/007 ,  F01N11/002 ,  G01M15/106 ,  Y02T10/47

    摘要： A particulate collection filter state detection device according to the present invention includes first pressure detection means for detecting a first pressure produced at an upstream side of the filter on an exhaust gas flow path, second pressure detection means for detecting a second pressure produced at a downstream side of the filter on the exhaust gas flow path, first Fourier transformation means for applying Fourier transformation to a value of the first pressure detected by the first pressure detection means, second Fourier transformation means for applying Fourier transformation to a value of the second pressure detected by the second pressure detection means, comparison means for comparing a spectral intensity and/or a phase at a zero frequency and a spectral intensity and/or a phase at a predetermined frequency obtained by the first Fourier transformation means and a spectral intensity and/or a phase at a zero frequency and a spectral intensity and/or a phase at a predetermined frequency obtained by the second Fourier transformation means, and filter state determination means for determining a state of the filter based on a comparison result provided by the comparison means, so as to conduct determination of a state of a filter for collecting particulates in an exhaust gas at a good precision.

    摘要翻译： 根据本发明的颗粒物收集过滤器状态检测装置包括：第一压力检测装置，用于检测在排气流路上的过滤器的上游侧产生的第一压力;第二压力检测装置，用于检测在下游产生的第二压力 在第一压力检测装置检测到的第一压力的值上进行傅立叶变换的第一傅里叶变换装置，用于将傅里叶变换应用于检测到的第二压力的值的第二傅里叶变换装置， 通过第二压力检测装置，比较装置，用于将零频率处的光谱强度和/或相位与由第一傅立叶变换装置获得的预定频率的光谱强度和/或相位和/或频谱强度和/或频谱强度和/或 在零频率处的相位和光谱强度和/或预成型条件下的相位 通过第二傅里叶变换装置得到的频率的滤波器状态，以及基于由比较装置提供的比较结果来确定滤波器的状态的滤波器状态确定装置，以便进行用于收集排气中的微粒的过滤器的状态的确定 天然气精度良好。

    RESISTANCE WELDING METHOD, RESISTANCE-WELDED MEMBER AND CONTROL APPARATUS FOR RESISTANCE WELDER, RESISTANCE WELDING EVALUATION METHOD, AND RESISTANCE WELDING EVALUATION PROGRAM
    37.
    发明申请
    RESISTANCE WELDING METHOD, RESISTANCE-WELDED MEMBER AND CONTROL APPARATUS FOR RESISTANCE WELDER, RESISTANCE WELDING EVALUATION METHOD, AND RESISTANCE WELDING EVALUATION PROGRAM 审中-公开
    电阻焊接方法，电阻焊接构件和电阻焊机控制装置，电阻焊接评估方法和电阻焊接评估方案

    公开(公告)号：US20120248086A1

    公开(公告)日：2012-10-04

    申请号：US13510447

    申请日：2010-11-16

    申请人： Goro Watanabe ,  Yasuhiro Ishii ,  Yasumoto Sato ,  Tsunaji Kitayama ,  Hisaaki Takao ,  Takahiro Onda ,  Hideki Teshima ,  Keisuke Uchida

    发明人： Goro Watanabe ,  Yasuhiro Ishii ,  Yasumoto Sato ,  Tsunaji Kitayama ,  Hisaaki Takao ,  Takahiro Onda ,  Hideki Teshima ,  Keisuke Uchida

    IPC分类号： C21D1/40

    CPC分类号： B23K11/115 ,  B23K11/252 ,  B23K11/257 ,  B23K11/258

    摘要： In a resistance welding method, by controlling the power amount from a melting start time onward, the weld quality may be stabilized efficiently, even when a disturbance is present, because of the correlation between the amount of power input from the melting start start time and a resulting nugget. The resistance welding method includes: pressing an electrode against a workpiece; inputting power to the workpiece through the electrode to subject the workpiece to Joule heating; detecting the melting start time, which is the time at which at least a portion of the faying portion of a workpiece starts to melt when subjected to Joule heating; calculating a first power amount input into the workpiece from the melting start time; and determining whether the first power amount has reached a first set value; and continuing the Joule heating until the first power amount reaches the first set value.

    摘要翻译： 在电阻焊接方法中，通过从熔化开始时间开始控制功率量，即使存在干扰也可以有效地稳定焊接质量，因为从熔融开始开始时间输入的功率量与 一个结果的金块。 电阻焊接方法包括：将电极压在工件上; 通过电极向工件输入动力，对工件进行焦耳加热; 检测熔化开始时间，即当进行焦耳加热时，工件的接合部分的至少一部分开始熔化的时间; 从熔化开始时间计算输入到工件中的第一功率量; 以及确定所述第一功率量是否已经达到第一设定值; 并继续焦耳加热，直到第一功率量达到第一设定值。

    RESISTANCE WELDING METHOD, RESISTANCE WELDER, AND METHOD AND DEVICE FOR EVALUATING RESISTANCE WELDING
    38.
    发明申请
    RESISTANCE WELDING METHOD, RESISTANCE WELDER, AND METHOD AND DEVICE FOR EVALUATING RESISTANCE WELDING 有权
    电阻焊接方法，电阻焊接机，电阻焊接评估方法及装置

    公开(公告)号：US20120126780A1

    公开(公告)日：2012-05-24

    申请号：US13060363

    申请日：2010-07-20

    申请人： Goro Watanabe ,  Yasuhiro Ishii ,  Yasumoto Sato ,  Tsunaji Kitayama ,  Hisaaki Takao ,  Hideki Teshima ,  Keisuke Uchida

    发明人： Goro Watanabe ,  Yasuhiro Ishii ,  Yasumoto Sato ,  Tsunaji Kitayama ,  Hisaaki Takao ,  Hideki Teshima ,  Keisuke Uchida

    IPC分类号： G01N27/04 ,  B23K11/00

    CPC分类号： B23K11/256 ,  B23K11/115

    摘要： This invention aims to provide a resistance welding method capable of stabilizing quality or improving efficiency of resistance welding such as spot welding. This resistance welding method comprises a calculating step of calculating resistance ratio X of a second electric resistance value R2 of workpieces to be joined in residual heat after Joule heating stops to a first electric resistance value R1 of the workpieces immediately before the Joule heating stops or vice versa (R2/R1 or R1/R2); a determining step of determining whether the resistance ratio X is equal to or greater than a threshold value Xn, and a reheating step of carrying out the Joule heating again when the resistance ratio X is smaller than the threshold value Xn. Thereby at least part of a welding portion is melted and solidified to reliably form a nugget, and a stably resistance-welded member can be provided.

    摘要翻译： 本发明的目的在于提供一种电阻焊接方法，其能够稳定电阻焊接的质量或提高效率，例如点焊。 该电阻焊接方法包括以下计算步骤：在焦耳加热停止之后，在焦耳加热停止后的剩余热量中要连接的工件的第二电阻值R2的电阻比X计算到刚巧焦耳加热停止之前的工件的第一电阻值R1 （R2 / R1或R1 / R2）; 确定电阻比X是否等于或大于阈值Xn的确定步骤，以及当电阻比X小于阈值Xn时再次进行焦耳加热的再加热步骤。 由此，焊接部的至少一部分熔融固化，可靠地形成熔核，并且可以提供稳定的电阻焊接部件。

    Backup switching control system and method
    40.
    发明授权
    Backup switching control system and method 失效
    备用切换控制系统及方法

    公开(公告)号：US6148415A

    公开(公告)日：2000-11-14

    申请号：US258235

    申请日：1994-06-10

    申请人： Atuo Kobayashi ,  Yasuhiro Ishii

    发明人： Atuo Kobayashi ,  Yasuhiro Ishii

    IPC分类号： G06F11/20 ,  G06F11/34 ,  H02H3/05 ,  G11C29/00

    CPC分类号： G06F11/2028 ,  G06F11/2025 ,  G06F11/2038 ,  G06F11/2048

    摘要： One or more combinations of an operating data processing machine and a backup data processing machine are connected together to enable backup switching wherein the backup machine takes over the data processing from the operating machine when a failure occurs in the operating machine. In particular, each of the operating and backup machines is connected to one or several system resources, such as data storage or data output devices. The operating processor exclusively occupies the system resources, and when a failure occurs the operating processor is disconnected therefrom. A disconnection completion notice is sent to the backup processor, which then begins to exclusively occupy the system resources for performing ongoing data processing that would have been performed by the operating processor had the failure not occurred. When a failure occurs with the operating processor, the data being processed and the data concerning the failure are dumped to an auxiliary memory to facilitate analysis of the failure. Once the failed operating processor is returned to service, it functions as a backup processor that is switched to take over the data processing when a failure occurs in the new operating processor.

    摘要翻译： 操作数据处理机和备份数据处理机的一个或多个组合连接在一起以实现备份切换，其中当操作机器发生故障时备用机器接管来自操作机器的数据处理。 特别地，每个操作和备份机器连接到一个或多个系统资源，例如数据存储或数据输出设备。 操作处理器专门占用系统资源，并且当发生故障时，操作处理器与其断开连接。 断开完成通知被发送到备份处理器，备份处理器然后开始专门占用系统资源，用于执行正在进行的数据处理，如果没有发生故障，操作处理器将执行该处理。 当操作处理器发生故障时，正在处理的数据和有关故障的数据被转储到辅助存储器以便于故障分析。 一旦故障的操作处理器返回到服务状态，它将作为一个备份处理器，当新的操作处理器出现故障时，该处理器被切换以接管数据处理。