公开(公告)号：US20190244984A1

公开(公告)日：2019-08-08

申请号：US16388349

申请日：2019-04-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hehe HU

IPC: H01L27/12 ,  H01L27/02 ,  H01L21/82 ,  H01L21/027 ,  H01L21/3213 ,  H01L29/423

CPC classification number: H01L27/1288 ,  H01L21/0274 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/82 ,  H01L27/02 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/42356

Abstract: A thin film transistor array substrate, a method for manufacturing the same and a display device are provided. The TFT array substrate includes: a substrate, and a gate electrode, a common electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode arranged on the substrate. The TFT array substrate further includes: a pixel electrode, arranged on the gate insulation layer, overlapped with and jointed to the drain electrode; a passivation layer, arranged on the gate insulation layer and a channel between the source and drain electrodes; and a common electrode line, arranged on a plane identical to the pixel electrode.

公开(公告)号：US20180374954A1

公开(公告)日：2018-12-27

申请号：US15737031

申请日：2017-06-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei YANG ,  Ce NING ,  Hehe HU ,  Ke WANG

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423 ,  H01L21/027

Abstract: The present disclosure provides a thin film transistor, a method for fabricating the same, a display substrate, and a display apparatus, and belongs to the field of display technology. The method includes: forming a metal oxide semiconductor pattern comprising first and second metal oxide semiconductor layers, the second metal oxide semiconductor layer being above the first metal oxide semiconductor layer; depositing a source-drain metal layer on the metal oxide semiconductor pattern; etching the source-drain metal layer and the second metal oxide semiconductor layer to form source and drain electrodes and an active layer of the thin film transistor. The active layer is obtained after removing the second metal oxide semiconductor layer between the source and drain electrodes using a first etchant, and the first etchant has a higher etching rate on the second metal oxide semiconductor layer than on the first metal oxide semiconductor layer.

公开(公告)号：US20180269332A1

公开(公告)日：2018-09-20

申请号：US15542298

申请日：2016-09-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hehe HU

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  G09G3/20

CPC classification number: H01L29/78696 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2310/02 ,  H01L27/1214 ,  H01L29/423 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/7869

Abstract: A TFT, a method for driving TFT, an array substrate, and a display device are disclosed. The TFT comprises a first gate on a base plate, an active layer insulated from the first gate, a source and a drain, and a second gate arranged on a side of the active layer away from the first gate and insulated from the active layer. The second gate comprises at least two sub-gates. An orthographic projection of each sub-gate overlaps that of a channel region. The first gate is capable of controlling the complete channel region, and the second gate is capable of controlling a portion of the channel region. The first and second gates maintain an energy band of the channel region at a relatively stable state, and thus maintain stable switching characteristics. This increases reliability and electrical performance of TFT.

公开(公告)号：US20250031447A1

公开(公告)日：2025-01-23

申请号：US18279205

申请日：2022-10-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhengliang LI ,  Guangcai YUAN ,  Ce NING ,  Zhonghao HUANG ,  Zhixiang ZOU ,  Zhangtao WANG ,  Jie HUANG ,  Nianqi YAO ,  Jiayu HE ,  Hehe HU ,  Feifei LI ,  Kun ZHAO ,  Chen XU ,  Hui GUO

IPC: H01L27/12 ,  H01L23/00

Abstract: A display substrate, including: a base substrate; and a metal conductive layer, located at a side of the base substrate, and including a core conductive layer and a functional conductive layer laminated along a direction away from the base substrate; a material of the core conductive layer includes a conductive metal material; a material of the functional conductive layer includes a first diffusion barrier metal material and a first adhesion force enhancing metal material, wherein the first diffusion barrier metal material is configured to block diffusion of the conductive metal material, and the first adhesion force enhancing metal material is configured to enhance an adhesion force between the functional conductive layer and a photoresist used in a patterning process of the functional conductive layer; a surface energy of any of first adhesion force enhancing metal materials is less than or equal to 325 mJ/m2.

公开(公告)号：US20240363641A1

公开(公告)日：2024-10-31

申请号：US18028569

申请日：2022-06-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Dongfang WANG ,  Wei LIU ,  Hehe HU ,  Lizhong WANG ,  Ce NING

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1248 ,  H01L27/1259

Abstract: A display substrate, a manufacturing method therefor, and a display device are provided. The display substrate includes a base substrate and at least one transistor disposed on the base substrate, with a transistor including an active layer pattern disposed on the base substrate; a first source-drain electrode disposed on the base substrate and electrically connected with the active layer pattern; a first gate electrode disposed on a side of the active layer pattern away from the base substrate, the first gate electrode and the active layer pattern having overlapped orthographic projections on the base substrate and are not in contact with each other; a second source-drain electrode disposed on a side of the active lay pattern away from the base substrate and including a first sub-electrode and a second sub-electrode connected with each other, the second sub-electrode is located on a side of the first sub-electrode close to the first gate electrode, the first sub-electrode is electrically connected with the active layer pattern, the second sub-electrode and the active layer pattern have overlapped orthographic projections on the base substrate and are not in contact with each other.

公开(公告)号：US20240334762A1

公开(公告)日：2024-10-03

申请号：US18741629

申请日：2024-06-12

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO ,  Xue LIU

IPC: H10K59/13 ,  H10K59/12 ,  H10K59/124 ,  H10K59/126 ,  H10K59/38 ,  H10K71/00

CPC classification number: H10K59/13 ,  H10K59/124 ,  H10K59/126 ,  H10K59/38 ,  H10K71/00 ,  H10K59/1201

Abstract: An organic electroluminescent display substrate is provided, which includes a base substrate, and a light-emitting unit and a light-sensing unit arranged on the base substrate, wherein the light-sensing unit is arranged on a light-emitting side of the light-emitting unit, and configured for sensing an intensity of light emitted from the light-emitting unit; a first planarization layer is arranged between the light-sensing unit and the light-emitting unit; the light-sensing unit comprises a first thin film transistor and a photosensitive sensor arranged sequentially in that order in a direction away from the base substrate, and a second planarization layer is arranged between the photosensitive sensor and the first thin film transistor. A display panel, a display device and a method for manufacturing the organic electroluminescent display substrate are further provided.

公开(公告)号：US20240274674A1

公开(公告)日：2024-08-15

申请号：US18021778

申请日：2022-03-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jie HUANG ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Niangi YAO ,  Kun ZHAO ,  Feifei LI

IPC: H01L29/417 ,  H01L29/423

CPC classification number: H01L29/41733 ,  H01L29/42384

Abstract: Provided are a thin film transistor, a display substrate and a display device, the thin film transistor includes: a gate on a base substrate; an active layer between the gate and the base substrate, the active layer includes a source contact portion, a drain contact portion and a middle portion therebetween, orthographic projections of the middle portion and the gate on the base substrate overlaps to form a first overlapping region, a material of the middle portion includes a metal oxide containing a doped element, a dissociation energy of the doped element from an oxygen element is greater than 500 Kj/mol; a source connected to the source contact portion and a drain connected to the drain contact portion, a ratio of an area of the orthographic projection of the gate on the base substrate to an area of the first overlapping region is less than or equal to 3.

公开(公告)号：US20240250177A1

公开(公告)日：2024-07-25

申请号：US18014269

申请日：2022-03-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Dapeng XUE ,  Lizhong WANG ,  Shuilang DONG ,  Hehe HU ,  Nianqi YAO ,  Guangcai YUAN ,  Ce NING ,  Zhengliang LI ,  Dongfang WANG ,  Liping LEI ,  Chen XU ,  Jie HUANG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/78696

Abstract: A metal oxide thin film transistor is provided, which includes a metal oxide semiconductor layer, including a first semiconductor layer and a second semiconductor layer, the carrier mobility of the first semiconductor layer is higher than that of the second semiconductor layer; the metal oxide semiconductor layer includes a lower surface, an upper surface and a lateral surface, the source electrode is in contact with the lateral surface and the upper surface; the region where the lateral surface contacts the source electrode or the drain electrode includes a first contact region and a second contact region; which have the shape: a first angle between the lower surface of the metal oxide semiconductor layer and the lateral surface of the first contact region is larger than a second angle between the lower surface of the metal oxide semiconductor layer and the lateral surface of the second contact region.

公开(公告)号：US20240222445A1

公开(公告)日：2024-07-04

申请号：US17996260

申请日：2021-11-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jie HUANG ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Nianqi YAO ,  Kun ZHAO ,  Tianmin ZHOU ,  Liping LEI

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78645

Abstract: A thin film transistor, an array substrate and a manufacturing method of the thin film transistor are provided, the thin film transistor includes a base substrate; and a first active layer, a first insulating layer and a second active layer, which are sequentially arranged on the base substrate, the first active layer is in contact with the second active layer through a first via hole structure located in the first insulating layer, and non-contacted portions of the first active layer and the second active layer are separated by the first insulating layer, the thin film transistor has a plurality of active layer structures, so that the charges are gathered on two surfaces of each of the active layers, and the number of the charges gathered on the surfaces of the active layers is multiplied, and the open state current of the thin film transistor is multiplied.

公开(公告)号：US20240212639A1

公开(公告)日：2024-06-27

申请号：US17913798

申请日：2021-09-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuilang DONG ,  Ce NING ,  Guangcai YUAN ,  Hehe HU ,  Lizhong WANG ,  Nianqi YAO ,  Dapeng XUE ,  Liping LEI ,  Chen XU ,  Dongfang WANG ,  Zhengliang LI

IPC: G09G3/36

CPC classification number: G09G3/36 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2330/021

Abstract: Voltage providing unit, voltage providing method, display driving module and display device are provided. The voltage providing unit, applied to a display panel, is configured to provide a control voltage signal for a driving circuit, and the voltage providing unit includes a buck circuit and a first electrical level converting circuit. The buck circuit is configured to receive a first voltage signal and perform a buck operation on the first voltage signal to obtain a second voltage signal; and the first electrical level converting circuit is connected to the buck circuit, and is configured to receive an input control voltage, a third voltage signal and the second voltage signal, and to generate the control voltage signal in accordance with the input control voltage, the third voltage signal and the second voltage signal, a voltage value of the control voltage signal is less than a predetermined voltage value.