公开(公告)号：US20130071998A1

公开(公告)日：2013-03-21

申请号：US13234205

申请日：2011-09-16

申请人： Baozhen Li ,  Yan Zun Li ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

发明人： Baozhen Li ,  Yan Zun Li ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L21/326 ,  H01L21/28 ,  H01L23/52

CPC分类号： H01L23/5256 ,  H01L21/326 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrical fuse device is disclosed. A circuit apparatus can include the fuse device, a first circuit element and a second circuit element. The fuse includes a first contact that has a first electromigration resistance, a second contact that has a second electromigration resistance and a metal line, which is coupled to the first contact and to the second contact, that has a third electromigration resistance that is lower than the second electromigration resistance. The first circuit element is coupled to the first contact and the second circuit element coupled to the second contact. The fuse is configured to conduct a programming current from the first contact to the second contact through the metal line. Further, the programming current causes the metal line to electromigrate away from the second contact to electrically isolate the second circuit element from the first circuit element.

摘要翻译： 公开了一种电熔丝装置。 电路装置可以包括熔丝装置，第一电路元件和第二电路元件。 熔丝包括具有第一电迁移电阻的第一触点，具有第二电迁移电阻的第二触点和耦合到第一触点和第二触点的金属线，其具有低于 第二次电迁移阻力。 第一电路元件耦合到第一触点，而第二电路元件耦合到第二触点。 保险丝被配置为通过金属线将编程电流从第一触点传导到第二触点。 此外，编程电流使金属线电离远离第二触点，以将第二电路元件与第一电路元件电隔离。

公开(公告)号：US07973409B2

公开(公告)日：2011-07-05

申请号：US11625576

申请日：2007-01-22

申请人： Chih-Chao Yang ,  Thomas M. Shaw ,  Keith Kwong Hon Wong ,  Haining S. Yang

发明人： Chih-Chao Yang ,  Thomas M. Shaw ,  Keith Kwong Hon Wong ,  Haining S. Yang

IPC分类号： H01L21/00

CPC分类号： H01L21/76841 ,  H01L21/7682 ,  H01L21/76831 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides an interconnect structure (of the single or dual damascene type) and a method of forming the same, in which a dense (i.e., non-porous) dielectric spacer is present on the sidewalls of a dielectric material. More specifically, the inventive structure includes a dielectric material having a conductive material embedded within at least one opening in the dielectric material, wherein the conductive material is laterally spaced apart from the dielectric material by a diffusion barrier, a dense dielectric spacer and, optionally, an air gap. The presence of the dense dielectric spacer results in a hybrid interconnect structure that has improved reliability and performance as compared with existing prior art interconnect structures which do not include such dense dielectric spacers. Moreover, the inventive hybrid interconnect structure provides for better process control which leads to the potential for high volume manufacturing.

摘要翻译： 本发明提供了一种互连结构（单镶嵌型或双镶嵌型）及其形成方法，其中在电介质材料的侧壁上存在致密的（即非多孔的）电介质间隔物。 更具体地，本发明的结构包括介电材料，其具有嵌入介电材料中的至少一个开口中的导电材料，其中导电材料通过扩散阻挡层，致密电介质间隔物和任选地， 气隙。 与现有技术的不包括这种致密电介质间隔物的互连结构相比，密集电介质间隔物的存在导致混合互连结构具有改进的可靠性和性能。 此外，本发明的混合互连结构提供了更好的过程控制，这导致了大批量制造的潜力。

公开(公告)号：US07867895B2

公开(公告)日：2011-01-11

申请号：US11858166

申请日：2007-09-20

申请人： Chih-Chao Yang ,  Keith Kwong Hon Wong

发明人： Chih-Chao Yang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/4763

CPC分类号： H01L21/76814 ,  H01L21/32134 ,  H01L21/76805 ,  H01L21/76835 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76867 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnect structure including a gouging feature at the bottom of the via openings and a method of forming the same, which does not introduce either damages caused by Ar sputtering into the dielectric material that includes the via and line openings, nor plating voids into the structure are provided. The method includes the uses of at least one infusion process that forms an infused surface region within a conductive material of a lower interconnect level. The infused surface region has a different etch rate as compared with the conductive material and thus in a subsequent etching process, the infused surface region can be selectively removed forming a gouging feature within the structure.

摘要翻译： 包括通孔开口底部的气流特征的互连结构及其形成方法，其不引入由Ar溅射引入到包括通孔和线路开口的电介质材料中的损伤，也不会将空隙电镀到结构中 被提供。 该方法包括使用至少一个在较低互连级别的导电材料内形成输注表面区域的输注过程。 输入的表面区域与导电材料相比具有不同的蚀刻速率，因此在随后的蚀刻工艺中，可以选择性地去除输注的表面区域，从而在结构内形成气蚀特征。

公开(公告)号：US20110003473A1

公开(公告)日：2011-01-06

申请号：US12881806

申请日：2010-09-14

申请人： Chih-Chao Yang ,  Daniel C. Edelstein ,  Keith Kwong Hon Wong ,  Haining Yang

发明人： Chih-Chao Yang ,  Daniel C. Edelstein ,  Keith Kwong Hon Wong ,  Haining Yang

IPC分类号： H01L21/768

CPC分类号： H01L21/76885 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76849

摘要： An interconnect structure is provided in which the conductive features embedded within a dielectric material are capped with a metallic capping layer, yet no metallic residue is present on the surface of the dielectric material in the final structure. The inventive interconnect structure has improved dielectric breakdown strength as compared to prior art interconnect structures. Moreover, the inventive interconnect structure has better reliability and technology extendibility for the semiconductor industry. The inventive interconnect structure includes a dielectric material having at least one metallic capped conductive feature embedded therein, wherein a top portion of said at least one metallic capped conductive feature extends above an upper surface of the dielectric material. A dielectric capping layer is located on the dielectric material and it encapsulates the top portion of said at least one metallic capped conductive feature that extends above the upper surface of dielectric material.

摘要翻译： 提供了一种互连结构，其中嵌入电介质材料内的导电特征被金属覆盖层封盖，但在最终结构中绝缘材料表面上没有金属残留物。 与现有技术的互连结构相比，本发明的互连结构具有改善的介电击穿强度。 此外，本发明的互连结构对于半导体工业具有更好的可靠性和技术可扩展性。 本发明的互连结构包括具有嵌入其中的至少一个金属封盖的导电特征的电介质材料，其中所述至少一个金属封端的导电特征的顶部在电介质材料的上表面上方延伸。 电介质覆盖层位于电介质材料上，并且封装在电介质材料的上表面上方延伸的所述至少一个金属封盖导电特征的顶部。

公开(公告)号：US07851885B2

公开(公告)日：2010-12-14

申请号：US11847379

申请日：2007-08-30

申请人： Deok-kee Kim ,  Keith Kwong Hon Wong ,  Chih-Chao Yang ,  Haining S. Yang

发明人： Deok-kee Kim ,  Keith Kwong Hon Wong ,  Chih-Chao Yang ,  Haining S. Yang

IPC分类号： H01L21/82

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrically programmable fuse comprising a cathode member, an anode member, and a link member, wherein the cathode member, the anode member, and the link member each comprise one of a plurality of materials operative to localize induced electromigration in the programmable fuse.

摘要翻译： 一种电可编程保险丝，包括阴极构件，阳极构件和连接构件，其中所述阴极构件，所述阳极构件和所述连接构件各自包括可操作地定位所述可编程熔丝中的感应电迁移的多种材料中的一种。

公开(公告)号：US07851321B2

公开(公告)日：2010-12-14

申请号：US12348707

申请日：2009-01-05

申请人： Lawrence Clevenger ,  Timothy Joseph Dalton ,  Louis Hsu ,  Carl Radens ,  Vidhya Ramachandran ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

发明人： Lawrence Clevenger ,  Timothy Joseph Dalton ,  Louis Hsu ,  Carl Radens ,  Vidhya Ramachandran ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01L21/20

CPC分类号： H01L21/84 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5223 ,  H01L27/1203 ,  H01L2924/0002 ,  Y10S438/957 ,  H01L2924/00

摘要： Methods are provided for fabricating semiconductor IC (integrated circuit) chips having high-Q on-chip capacitors formed on the chip back-side and connected to integrated circuits on the chip front-side using through-wafer interconnects. In one aspect, a semiconductor device includes a semiconductor substrate having a front side, a back side, and a buried insulating layer interposed between the front and back sides of the substrate. An integrated circuit is formed on the front side of the semiconductor substrate, an integrated capacitor is formed on the back side of the semiconductor substrate, and an interconnection structure is formed through the buried insulating layer to connect the integrated capacitor to the integrated circuit.

摘要翻译： 提供了用于制造半导体IC（集成电路）芯片的半导体IC（集成电路）芯片，其具有形成在芯片背面的高Q片上电容器，并使用晶片间互连连接到芯片正面的集成电路。 在一个方面，半导体器件包括一个半导体衬底，该半导体衬底具有介于衬底的正面和背面之间的正面，背面和掩埋绝缘层。 在半导体基板的正面形成有集成电路，在半导体基板的背面形成有集成电容器，通过埋入绝缘层形成互连结构，将集成电容器与集成电路连接起来。

公开(公告)号：US20100237460A9

公开(公告)日：2010-09-23

申请号：US11847379

申请日：2007-08-30

申请人： Deok-kee Kim ,  Keith Kwong Hon Wong ,  Chih-Chao Yang ,  Haining S. Yang

发明人： Deok-kee Kim ,  Keith Kwong Hon Wong ,  Chih-Chao Yang ,  Haining S. Yang

IPC分类号： H01L29/00

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrically programmable fuse comprising a cathode member, an anode member, and a link member, wherein the cathode member, the anode member, and the link member each comprise one of a plurality of materials operative to localize induced electromigration in the programmable fuse.

摘要翻译： 一种电可编程保险丝，包括阴极构件，阳极构件和连接构件，其中所述阴极构件，所述阳极构件和所述连接构件各自包括可操作地定位所述可编程熔丝中的感应电迁移的多种材料中的一种。

公开(公告)号：US07772119B2

公开(公告)日：2010-08-10

申请号：US12186923

申请日：2008-08-06

申请人： Chih-Chao Yang ,  Haining Yang ,  Keith Kwong Hon Wong

发明人： Chih-Chao Yang ,  Haining Yang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/768

CPC分类号： H01L21/76829 ,  H01L21/76834 ,  Y10S438/927

摘要： A high tensile stress capping layer on Cu interconnects in order to reduce Cu transport and atomic voiding at the Cu/dielectric interface. The high tensile dielectric film is formed by depositing multiple layers of a thin dielectric material, each layer being under approximately 50 angstroms in thickness. Each dielectric layer is plasma treated prior to depositing each succeeding dielectric layer such that the dielectric cap has an internal tensile stress.

公开(公告)号：US07749890B2

公开(公告)日：2010-07-06

申请号：US12464348

申请日：2009-05-12

申请人： Keith Kwong Hon Wong ,  Chih-Chao Yang ,  Haining S. Yang

发明人： Keith Kwong Hon Wong ,  Chih-Chao Yang ,  Haining S. Yang

IPC分类号： H01L21/4763

CPC分类号： H01L21/76802 ,  H01L21/28518 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/823418 ,  H01L21/823475 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure and methods of making the same. The semiconductor structure includes a substrate having a silicide region disposed above a doped region, and a metal contact extending through the silicide region and being in direct contact with the doped region.

摘要翻译： 半导体结构及其制作方法。 半导体结构包括具有设置在掺杂区域上方的硅化物区域的衬底和延伸穿过硅化物区域并与掺杂区域直接接触的金属接触。

公开(公告)号：US07726010B2

公开(公告)日：2010-06-01

申请号：US11968896

申请日：2008-01-03

申请人： Louis C. Hsu ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Carl J. Radens ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

发明人： Louis C. Hsu ,  Lawrence A. Clevenger ,  Timothy J. Dalton ,  Carl J. Radens ,  Keith Kwong Hon Wong ,  Chih-Chao Yang

IPC分类号： H01H11/00 ,  H01H65/00

CPC分类号： H01H50/005 ,  H01H2050/007 ,  Y10T29/4902 ,  Y10T29/49105 ,  Y10T29/49147

摘要： A method of fabricating a MEMS switch having a free moving inductive element within in micro-cavity guided by at least one inductive coil. The switch consists of an upper inductive coil at one end of a micro-cavity; optionally, a lower inductive coil; and a free-moving inductive element preferably made of magnetic material. The coils are provided with an inner permalloy core. Switching is achieved by passing a current through the upper coil, inducing a magnetic field unto the inductive element. The magnetic field attracts the free-moving inductive element upwards, shorting two open conductive wires, closing the switch. When the current flow stops or is reversed, the free-moving magnetic element drops back by gravity to the bottom of the micro-cavity and the conductive wires open. When the chip is not mounted with the correct orientation, the lower coil pulls the free-moving inductive element back at its original position.

摘要翻译： 一种制造具有由至少一个感应线圈引导的微腔内的自由运动的感应元件的MEMS开关的方法。 开关由微腔一端的上感应线圈组成; 可选地，下感应线圈; 以及优选由磁性材料制成的自由移动的电感元件。 线圈设有内坡道合金芯。 通过使电流通过上部线圈，从而产生电感元件的磁场来实现切换。 磁场向上吸引自由移动的感应元件，短路两根开放的导线，闭合开关。 当电流停止或反转时，自由移动的磁性元件通过重力返回到微腔的底部并且导线打开。 当芯片没有以正确的方向安装时，下线圈将自由移动的感应元件拉回其原始位置。