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    THERMALLY OPTIMIZED POWER DELIVERY
    31.
    发明申请
    THERMALLY OPTIMIZED POWER DELIVERY 有权

    公开(公告)号：US20220091644A1

    公开(公告)日：2022-03-24

    申请号：US17540550

    申请日：2021-12-02

    Applicant: Intel Corporation

    Inventor： Samantha Rao ,  Zhongsheng Wang ,  Somvir Singh Dahiya ,  Chee Lim Nge ,  Siang Yeong Tan ,  Chia-Hung S. Kuo

    IPC: G06F1/20 ,  G06F1/3296 ,  G01R19/165 ,  G06F1/324

    Abstract: A first circuit to receive from a sensor a thermal condition of a voltage regulator while circuitry comprising the voltage regulator is to regulate delivery of power to a power domain having first and second components. The circuitry is to control a first power consumption rate of the first component based on a first parameter and control a second power consumption rate of the second component based on a second parameter. The first circuit monitors the thermal condition and generates an evaluation result based on a test criterion. A second circuit receives from the first circuit a signal based on the evaluation result. Based on the signal, the second circuit is to signal the circuitry to change the first parameter. An amount of any change to the second parameter based on the evaluation result is different than an amount of change to the first parameter based on the evaluation result.

    SERIAL BUS ELECTRICAL TERMINATION CONTROL
    35.
    发明申请
    SERIAL BUS ELECTRICAL TERMINATION CONTROL 有权
    串行总线终端控制

    公开(公告)号：US20160092393A1

    公开(公告)日：2016-03-31

    申请号：US14497925

    申请日：2014-09-26

    Applicant: Intel Corporation

    Inventor： Chee Lim Nge ,  Tod Schiff ,  Vijayakumar Dibbad ,  Alan Hallberg

    IPC: G06F13/42 ,  G06F13/38 ,  G06F13/40

    CPC classification number: G06F13/385 ,  G06F13/382 ,  G06F13/4068 ,  G06F13/4282

    Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.

    Abstract translation: 一些实施例包括具有耦合到串行总线的节点的装置和方法，以及控制器，以向第一电路路径和第二电路路径之一提供控制信号，以便改变位于第一电路路径和第二电路路径之间的节点处的信号的电终端 在控制器的第一模式期间通过第一电路路径进行第一电终接，并且在控制器的第二模式期间通过第二电路路径进行第二电终接。 控制器可以被布置为在第一和第二模式期间向第一和第二电路路径提供控制信号，而不在第一和第二模式期间从控制器向第一和第二电路路径提供另一个控制信号。

    Highly configurable power-delivery management policy
    38.
    发明授权
    Highly configurable power-delivery management policy 有权

    公开(公告)号：US11592888B2

    公开(公告)日：2023-02-28

    申请号：US17306778

    申请日：2021-05-03

    Applicant: Intel Corporation

    Inventor： Chee Lim Nge ,  James Hermerding, II ,  Zhongsheng Wang ,  Pranava Alekal

    IPC: G06F1/00 ,  G06F1/3203 ,  H04W92/18

    Abstract: Described are mechanisms and methods for implementing highly configurable power delivery management policies. An apparatus may comprise a first circuitry, a second circuitry, a third circuitry, and a fourth circuitry. The first circuitry may include a memory to store a first table having one or more first entries and to store a second table having one or more respectively corresponding second entries. The second circuitry may, upon the occurrence of an event, test a condition specified by an entry in the first table. The third circuitry may, upon the test of the condition having a positive result, evaluate a set of one or more parameters as specified by an entry in a second table corresponding with the entry in the first table. The fourth circuitry may initiate a power-management action based upon the evaluation of the set of one or more parameters.

    BATTERY HEAT BALANCING APPARATUS AND METHOD DURING PEAK MODE
    39.
    发明申请
    BATTERY HEAT BALANCING APPARATUS AND METHOD DURING PEAK MODE 有权

    公开(公告)号：US20220300051A1

    公开(公告)日：2022-09-22

    申请号：US17832370

    申请日：2022-06-03

    Applicant: Intel Corporation

    Inventor： Naoki Matsumura ,  Tod F. Schiff ,  Brian Fritz ,  Chee Lim Nge ,  Jorge Rodriguez

    IPC: G06F1/20 ,  G06F1/26 ,  H01M10/617 ,  H01M10/63 ,  H02J7/00

    Abstract: Techniques are provided for operating a computing system in a peak power mode while avoiding increased degradation of a battery. The peak power mode include cycles with peak and off-peak currents. The amplitude and duration of the peak and off-peak currents are governed by a thermal/heat budget of the battery. A processor can read the battery information during usage and calculate one or more parameters which are derived from heat. If a parameter is smaller than a reference value, the processor can update the peak power parameters to provide an increase in peak current/power and/or duration. If a parameter is larger than the reference value, no heat budget is available to provide an increase in peak current/power and/or duration. The thermal/heat budget can be enforced over each cycle of the peak power mode or in a summation over multiple cycles.

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