公开(公告)号：US07852151B2

公开(公告)日：2010-12-14

申请号：US12130453

申请日：2008-05-30

申请人： Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nickolls

发明人： Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nickolls

IPC分类号： H03F1/14

CPC分类号： H03F3/45475 ,  H03F1/0277 ,  H03F3/211 ,  H03F3/45179 ,  H03F3/72 ,  H03F2203/45138 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/001 ,  H03G2201/103 ,  H03G2201/504

摘要： A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212). The gain of the amplifier array has a range from a low gain setting with a first amplifier stage (202) enabled, through increasing gain settings as the gain of the first amplifier stage is increased from a minimum to a maximum gain, a second amplifier stage (201) can then be enabled in addition to the first amplifier stage and the gain of the second amplifier stage increased from a minimum to a maximum gain, further amplifier stages are enabled as available up to a maximum gain setting for the amplifier array. Each amplifier stage that is enabled has a decreasingly attenuated input signal and a final amplifier stage to be enabled has a full input signal (203).

摘要翻译： 提供了改变放大器和放大器阵列的增益的方法。 放大器阵列包括与具有增益控制装置的每个放大器级并联连接的两个或更多个放大器级（201,202）。 为每个放大器级提供输入信号装置（203,204），放大器级的输入信号具有不同的幅度。 提供了用于启用和禁用放大器级（216）的装置，用于对使能的放大器级的输出进行求和以获得输出信号（212）的装置。 放大器阵列的增益具有从具有第一放大级（202）使能的低增益设置的范围，通过当第一放大器级的增益从最小增益增加到最大增益时增加增益设置，第二放大器级 （201）除了第一放大器级以及第二放大器级的增益从最小增益增加到最大增益之外，还可以使能另外的放大器级，直至达到放大器阵列的最大增益设置。 启用的每个放大器级具有递减衰减的输入信号，并且待使能的最终放大器级具有完整输入信号（203）。

公开(公告)号：US07719302B2

公开(公告)日：2010-05-18

申请号：US12215732

申请日：2008-06-30

申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

IPC分类号： G01R31/02

CPC分类号： G01R31/2858 ,  G01R31/2884 ,  G01R31/318533

摘要： A method is provided for monitoring interconnect resistance within a semiconductor chip assembly, A semiconductor chip assembly can include a semiconductor chip having contacts exposed at a surface of the semiconductor chip and a substrate having exposed terminals in conductive communication with the contacts. A plurality of monitored elements of the semiconductor chip can include conductive interconnects, each interconnecting a respective pair of nodes of the semiconductor chip through wiring within the semiconductor chip. In an example of such method, a voltage drop across each monitored element is compared with a reference voltage drop across a respective reference element on the semiconductor chip at a plurality of different times during a lifetime of the semiconductor chip assembly. In that way, it can be detected when a resistance of such monitored element is over threshold. Based on a result of such comparison, a decision can be made whether to indicate an action condition.

摘要翻译： 提供了一种用于监测半导体芯片组件内的互连电阻的方法。半导体芯片组件可以包括具有在半导体芯片的表面处露出的触点的半导体芯片和具有与触点导电连通的露出端子的基板。 半导体芯片的多个受监测元件可以包括导电互连，每个导体互连通过半导体芯片内的布线互连半导体芯片的相应的一对节点。 在这种方法的示例中，在半导体芯片组件的寿命期间，跨越每个被监测元件的电压降与在半导体芯片上的相应参考元件上的参考电压降在多个不同时间进行比较。 以这种方式，当这种被监视的元件的电阻超过阈值时，可以检测它。 基于这种比较的结果，可以做出是否指示动作条件的决定。

公开(公告)号：US07519130B2

公开(公告)日：2009-04-14

申请号：US10905705

申请日：2005-01-18

申请人： Louis L. Hsu ,  Matt R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Karl D. Selander ,  Michael A. Sorna ,  Huihao Xu

发明人： Louis L. Hsu ,  Matt R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Karl D. Selander ,  Michael A. Sorna ,  Huihao Xu

IPC分类号： H04L25/34

CPC分类号： H04L25/0274 ,  H04L25/0296

摘要： A data receiver is provided which includes a front end interface circuit having an alternating current (AC) transmission receiving mode and a direct current (DC) transmission receiving mode. The front end interface circuit includes an offset compensation circuit operable to compensate a DC voltage offset between a pair of differential signals input to the data receiver. The front end interface circuit further includes an AC/DC selection unit operable to switch between (a) the DC transmission receiving mode, and (b) the AC transmission receiving mode, such that the data receiver is operable in (i) the DC transmission mode in which the offset compensation circuit is disabled, (ii) the DC transmission mode in which the offset compensation circuit is enabled, (iii) the AC transmission mode in which the offset compensation circuit is disabled, and (iv) the AC transmission receiving mode in which the offset compensation circuit is enabled.

摘要翻译： 提供一种数据接收器，其包括具有交流（AC）发送接收模式和直流（DC）发送接收模式的前端接口电路。 前端接口电路包括偏移补偿电路，其可操作以补偿输入到数据接收器的一对差分信号之间的直流电压偏移。 前端接口电路还包括可操作以在（a）直流发送接收模式和（b）交流发送接收模式之间切换的AC / DC选择单元，使得数据接收器可操作于（i）直流传输 偏移补偿电路被禁用的模式，（ii）使能偏移补偿电路的直流传输模式，（iii）偏移补偿电路被禁用的AC传输模式，以及（iv）AC传输接收 偏移补偿电路使能的模式。

公开(公告)号：US07466156B2

公开(公告)日：2008-12-16

申请号：US10708788

申请日：2004-03-25

申请人： Joseph O. Marsh ,  Jeremy Stephens ,  Charlie C. Hwang ,  James S. Mason ,  Huihao Xu ,  Matthew B. Baecher ,  Thomas J. Bardsley ,  Mark R. Taylor

发明人： Joseph O. Marsh ,  Jeremy Stephens ,  Charlie C. Hwang ,  James S. Mason ,  Huihao Xu ,  Matthew B. Baecher ,  Thomas J. Bardsley ,  Mark R. Taylor

IPC分类号： G01R31/02

CPC分类号： G01R31/3167 ,  G01R31/318544

摘要： A circuit of testing an analog driver circuit using digital scan-based test methodologies. The circuit of the present invention includes a control circuit for generating signals in response to a test enable signal, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal in response to the differential input signal and the signals generated by the control circuit, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit in response the signals generated by the control circuit, and a differential receiver circuit for receiving the differential output from the differential driver circuit, convert the differential output signal to a single ended signal and transmitting the single ended signal, all in response to the test enable signal.

摘要翻译： 使用基于数字扫描的测试方法测试模拟驱动器电路的电路。 本发明的电路包括用于响应于测试使能信号产生信号的控制电路，用于接收差分输入信号的差分驱动器电路，放大差分输入信号并响应差分输入信号发送差分输出信号 以及由所述控制电路产生的信号，用于响应于由所述控制电路产生的信号而在所述差分驱动器电路的输出节点处产生差分终端阻抗的可编程终端阻抗电路以及用于从所述差分接收电路接收所述差分输出的差分接收电路 差分驱动器电路将差分输出信号转换为单端信号并传输单端信号，全部是响应于测试使能信号。

公开(公告)号：US08651023B2

公开(公告)日：2014-02-18

申请号：US11946559

申请日：2007-11-28

申请人： James S. Mason ,  James S. Wilson ,  Jonathan Schmidt ,  Joseph Robson ,  Angel Crespo ,  Rafael Quintero

发明人： James S. Mason ,  James S. Wilson ,  Jonathan Schmidt ,  Joseph Robson ,  Angel Crespo ,  Rafael Quintero

IPC分类号： F42B15/34

CPC分类号： F42B39/00 ,  F41F3/042 ,  F41F3/073

摘要： In one embodiment, a hermetic covering system includes a projectile and at least one bag. The projectile has a body and a component that houses moisture-sensitive equipment. The at least one bag may be coupled to the body such that the projectile protrudes through the opening and the component is disposed in the inner cavity to protect the component during storage of the projectile.

摘要翻译： 在一个实施例中，气密性覆盖系统包括射弹和至少一个袋。 抛射体具有容纳湿气敏感设备的身体和部件。 所述至少一个袋可以联接到所述主体，使得所述弹丸突出穿过所述开口，并且所述部件设置在所述内腔中，以在所述弹丸储存期间保护所述部件。

公开(公告)号：US08089404B2

公开(公告)日：2012-01-03

申请号：US12283373

申请日：2008-09-11

申请人： Richard W. Nichols ,  James S. Mason ,  Gilbert M. Shows ,  Joel C. Roper ,  Raymond D. Eppich ,  Gustavo A. Burnum

发明人： Richard W. Nichols ,  James S. Mason ,  Gilbert M. Shows ,  Joel C. Roper ,  Raymond D. Eppich ,  Gustavo A. Burnum

IPC分类号： H01Q3/00 ,  G01S19/46 ,  H04B7/185

CPC分类号： H01Q21/0025 ,  G01S19/36

摘要： A partitioned aperture array antenna. The novel antenna includes a first subarray having a first number of antenna elements equipped with transmit functionality and a second subarray having a second number of antenna elements equipped with receive functionality, wherein the first and second numbers are not equal and the first and second subarrays have at least one common antenna element. In an illustrative embodiment, the first subarray includes a transmit circuit coupled to each antenna element in the first subarray for controlling a relative transmit phase of the antenna element to steer an overall antenna transmit beam, and the second subarray includes a receive circuit coupled to each antenna element in the second subarray for controlling a relative receive phase of the antenna element to steer an overall antenna receive beam.

摘要翻译： 分区孔阵列天线。 新颖天线包括具有配备有发送功能的第一数量的天线元件的第一子阵列和具有配备有接收功能的第二数量的天线元件的第二子阵列，其中第一和第二数字不相等，并且第一和第二子阵列具有 至少一个公共天线元件。 在说明性实施例中，第一子阵列包括耦合到第一子阵列中的每个天线元件的发射电路，用于控制天线元件的相对发射相位以引导整个天线发射波束，并且第二子阵列包括耦合到每个天线元件的接收电路 第二子阵列中的天线元件，用于控制天线元件的相对接收相位以控制整个天线接收波束。

公开(公告)号：US08059057B2

公开(公告)日：2011-11-15

申请号：US12368492

申请日：2009-02-10

申请人： James S. Mason ,  John Michael Bedinger ,  Raj Rajendran

发明人： James S. Mason ,  John Michael Bedinger ,  Raj Rajendran

IPC分类号： H01Q21/00 ,  H01L23/02 ,  H01L23/34

CPC分类号： H01L23/66 ,  H01L24/83 ,  H01L2223/6611 ,  H01L2224/2919 ,  H01L2224/45014 ,  H01L2224/48101 ,  H01L2224/73265 ,  H01L2224/83851 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1616 ,  H01L2924/19051 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/0665 ,  H01L2924/00014

摘要： According to one embodiment of the present invention, a microwave or millimeter wave module includes a dielectric layer having a pocket formed substantially through the dielectric layer. The dielectric is attached to a metal substrate. The pocket has substantially vertical sidewalls. An integrated circuit is disposed in the pocket. Opposing sides of the integrated circuit are substantially parallel to the sidewalls of the pocket. An interconnect electrically couples the integrated circuit to a bond pad disposed on the outer surface of the dielectric layer. The interconnect has a length that is minimized to result in reduced inductance of the semiconductor device.

摘要翻译： 根据本发明的一个实施例，微波或毫米波模块包括具有基本上通过介电层形成的口袋的电介质层。 电介质附着在金属基底上。 口袋具有基本垂直的侧壁。 集成电路设置在口袋中。 集成电路的相对侧基本上平行于口袋的侧壁。 互连将集成电路电耦合到设置在电介质层的外表面上的接合焊盘。 互连具有最小化的长度，导致半导体器件的电感降低。

公开(公告)号：US08027415B2

公开(公告)日：2011-09-27

申请号：US11737319

申请日：2007-04-19

申请人： James S. Mason ,  Louis C. Hsu ,  Phil J. Murfet ,  Gareth J. Nicholls

发明人： James S. Mason ,  Louis C. Hsu ,  Phil J. Murfet ,  Gareth J. Nicholls

IPC分类号： H04L27/08

CPC分类号： H04L25/0292 ,  H04L25/063

摘要： A receiver for a data communications system comprises: a data path for receiving a data signal from a data channel, the data path comprising an automatic gain control (AGC) loop; and, a signal detector for generating a data valid signal indicative of the validity of the data signal in response to detection of the data signal on the channel exceeding a threshold and in dependence upon gain information from the AGC loop in the data path.

摘要翻译： 用于数据通信系统的接收机包括：用于从数据信道接收数据信号的数据路径，所述数据路径包括自动增益控制（AGC）环路; 以及信号检测器，用于响应于在信道上的数据信号的检测超过阈值并且根据来自数据路径中的AGC循环的增益信息，产生指示数据信号的有效性的数据有效信号。

公开(公告)号：US20100225380A1

公开(公告)日：2010-09-09

申请号：US12396512

申请日：2009-03-03

申请人： Louis L. Hsu ,  David W. Kruger ,  James S. Mason ,  Richard W. Oldrey

发明人： Louis L. Hsu ,  David W. Kruger ,  James S. Mason ,  Richard W. Oldrey

IPC分类号： H03K17/78

CPC分类号： H01L23/576 ,  H01L2224/48091 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method and tamper resistant circuit for resisting tampering including reverse engineering in a semiconductor chip, and a design structure on which the subject circuit resides are provided. A sensing device for detecting a chip tampering state is formed with the semiconductor chip including the circuitry to be protected. A tamper resistant control signal generator is coupled to the sensing unit for generating a tamper resistant control signal responsive to a detected chip tampering state. A functional operation inhibit circuit is coupled to the tamper resistant control signal generator for inhibiting functional operation of the circuitry to be protected responsive to the tamper resistant control signal.

摘要翻译： 提供一种用于抵抗篡改的方法和防篡改电路，包括半导体芯片中的逆向工程，以及设置有被摄体电路的设计结构。 用于检测芯片篡改状态的感测装置由包括待保护电路的半导体芯片形成。 防篡改控制信号发生器耦合到感测单元，用于响应于检测到的芯片篡改状态产生防篡改控制信号。 功能操作禁止电路耦合到防篡改控制信号发生器，用于响应于防篡改控制信号而禁止要被保护的电路的功能操作。

公开(公告)号：US20100099370A1

公开(公告)日：2010-04-22

申请号：US12288635

申请日：2008-10-22

申请人： Richard W. Nichols ,  James S. Mason ,  Gilbert M. Shows ,  Joel C. Roper ,  Raymond D. Eppich ,  Gustavo A. Burnum ,  Ike Chang

发明人： Richard W. Nichols ,  James S. Mason ,  Gilbert M. Shows ,  Joel C. Roper ,  Raymond D. Eppich ,  Gustavo A. Burnum ,  Ike Chang

IPC分类号： H04B1/04 ,  H01Q21/00 ,  H01Q1/50

CPC分类号： H01Q1/3275 ,  H01Q3/24 ,  H01Q3/26 ,  H01Q21/0025 ,  H01Q21/065 ,  H01Q21/20 ,  H01Q21/29

摘要： An electronically scanned array antenna. The novel antenna includes a first planar array of antenna elements and one or more side planar arrays of antenna elements, each side array adjacent to the first array and tilted at a predetermined angle relative to the first array. In an illustrative embodiment, the antenna also includes a plurality of transmit/receive modules, each module coupled to one antenna element. Each transmit/receive module includes phase shifters for varying the relative phases of the antenna elements to form a desired overall beam pattern, and a low noise amplifier and high power amplifier for amplifying signals received and transmitted by the antenna element, respectively. In an illustrative embodiment, a processor provides individual phase and channel enable control signals for independently controlling the phase shifters and amplifiers, respectively, of each module.

摘要翻译： 电子扫描阵列天线。 新型天线包括天线元件的第一平面阵列和天线元件的一个或多个侧平面阵列，每个侧阵列与第一阵列相邻并相对于第一阵列以预定角度倾斜。 在说明性实施例中，天线还包括多个发射/接收模块，每个模块耦合到一个天线元件。 每个发射/接收模块包括用于改变天线元件的相对相位以形成期望的总波束图案的移相器，以及用于分别放大由天线元件接收和发射的信号的低噪声放大器和高功率放大器。 在说明性实施例中，处理器提供单独的相位和通道使能控制信号，用于分别独立地控制每个模块的移相器和放大器。