公开(公告)号：US08575740B2

公开(公告)日：2013-11-05

申请号：US13617483

申请日：2012-09-14

申请人： Yasuyuki Arai ,  Yuko Tachimura ,  Yohei Kanno ,  Mai Akiba

发明人： Yasuyuki Arai ,  Yuko Tachimura ,  Yohei Kanno ,  Mai Akiba

IPC分类号： H01L23/02

CPC分类号： H01L27/1266 ,  G06K19/025 ,  G06K19/07728 ,  G06K19/07749 ,  H01L27/1214 ,  H01L27/13 ,  H01L2221/6835 ,  H01L2224/73204

摘要： An object of the present invention is providing a semiconductor device that is capable of improving the reliability of a semiconductor element and enhancing the mechanical strength without suppressing the scale of a circuit. The semiconductor device includes an integrated circuit sandwiched between first and second sealing films, an antenna electrically connected to the integrated circuit, the first sealing film sandwiched between a substrate and the integrated circuit, which includes a plurality of first insulating films and at least one second insulating film sandwiched therebetween, the second sealing film including a plurality of third insulating films and at least one fourth insulating film sandwiched therebetween. The second insulating film has lower stress than the first insulting film and the fourth insulating film has lower stress than the third insulating film. The first and third insulating films are inorganic insulating films.

摘要翻译： 本发明的目的在于提供一种能够提高半导体元件的可靠性并提高机械强度而不抑制电路规模的半导体装置。 半导体器件包括夹在第一和第二密封膜之间的集成电路，与集成电路电连接的天线，夹在基板和集成电路之间的第一密封膜，其包括多个第一绝缘膜和至少一个第二绝缘膜 夹在其间的绝缘膜，所述第二密封膜包括多个第三绝缘膜和夹在其间的至少一个第四绝缘膜。 第二绝缘膜具有比第一绝缘膜低的应力，并且第四绝缘膜具有比第三绝缘膜更低的应力。 第一和第三绝缘膜是无机绝缘膜。

公开(公告)号：US20120282717A1

公开(公告)日：2012-11-08

申请号：US13552845

申请日：2012-07-19

申请人： Shunpei YAMAZAKI ,  Shinji Maekawa ,  Yohei Kanno

发明人： Shunpei YAMAZAKI ,  Shinji Maekawa ,  Yohei Kanno

IPC分类号： H01L33/44

CPC分类号： H01L21/288 ,  H01L21/28008 ,  H01L21/76838 ,  H01L27/1292 ,  H01L29/66765 ,  H01L29/78669 ,  H01L29/78678 ,  H01L2224/73265

摘要： As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole.

摘要翻译： 随着布线变厚，覆盖布线的绝缘膜的不连续性成为问题。 对于用于当前的高分辨率显示装置的薄膜晶体管，难以形成宽度足够薄的布线。 由于布线变薄，由于布线电阻引起的信号延迟已经成为问题。 鉴于上述问题，本发明提供一种在绝缘膜的孔中形成导电膜，并且导电膜和绝缘膜的表面平坦的结构。 结果，可以防止覆盖导电膜和绝缘膜的薄膜的不连续性。 通过控制孔的宽度可以使布线更薄。 此外，通过控制孔的深度，可以使布线变厚。

公开(公告)号：US08305213B2

公开(公告)日：2012-11-06

申请号：US10586049

申请日：2005-01-20

申请人： Yasuyuki Arai ,  Mai Akiba ,  Yohei Kanno ,  Yuko Tachimura

发明人： Yasuyuki Arai ,  Mai Akiba ,  Yohei Kanno ,  Yuko Tachimura

IPC分类号： G08B13/14

CPC分类号： H01L27/1266 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/13

摘要： Since the chip formed from a silicon wafer is thick, the chip is protruded from the surface or the chip is so large that it can be seen through the eyes, which affects the design of a business card or the like. Hence, it is an object of the present invention to provide a new integrated circuit which has a structure by which the design is not affected. In view of the above problems, it is a feature of the invention to equip a film-like article with a thin film integrated circuit. It is another feature of the invention that the IDF chip has a semiconductor film of 0.2 mm or less, as an active region. Therefore, the IDF chip can be made thinner as compared with a chip formed from a silicon wafer. In addition, such an integrated circuit can have light transmitting characteristic unlike a chip formed from a silicon wafer.

摘要翻译： 由于由硅晶片形成的芯片较厚，所以芯片从表面突出，或者芯片大到可以通过眼睛看到，影响到名片的设计等。 因此，本发明的目的是提供一种新的集成电路，其具有不影响设计的结构。 鉴于上述问题，本发明的一个特征是为薄膜集成电路配备薄膜状制品。 本发明的另一个特征是IDF芯片具有0.2mm以下的半导体膜作为活性区域。 因此，与由硅晶片形成的芯片相比，可以使IDF芯片更薄。 此外，这种集成电路可以具有与由硅晶片形成的芯片不同的透光特性。

公开(公告)号：US08053780B2

公开(公告)日：2011-11-08

申请号：US10577057

申请日：2004-11-05

申请人： Yohei Kanno ,  Gen Fujii

发明人： Yohei Kanno ,  Gen Fujii

IPC分类号： H01L31/036 ,  G02F1/1333

CPC分类号： H01L29/66765 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/78696

摘要： In case that a conventional TFT is formed to have an inversely staggered type, a resist mask is required to be formed by an exposing, developing, and droplet discharging in forming an island-like semiconductor region. It resulted in the increase in the number of processes and the number of materials. According to the present invention, a process can be simplified since after forming a source region and a drain region, a portion serving as a channel region is covered by an insulating film serving as a channel protecting film to form an island-like semiconductor film, and so a semiconductor element can be manufactured by using only metal mask without using a resist mask.

摘要翻译： 在常规TFT形成为具有反交错型的情况下，需要通过在形成岛状半导体区域中的曝光，显影和液滴放电来形成抗蚀剂掩模。 这导致过程数量和材料数量的增加。 根据本发明，由于在形成源极区域和漏极区域之后，由于作为沟道区域的部分被用作沟道保护膜的绝缘膜覆盖以形成岛状半导体膜，因此可以简化工艺， 因此可以仅使用金属掩模而不使用抗蚀剂掩模来制造半导体元件。

公开(公告)号：US20110026240A1

公开(公告)日：2011-02-03

申请号：US12743466

申请日：2009-09-18

申请人： Hiroshi Hayashi ,  Eiji Ohta ,  Ken Hosoya ,  Yasuyuki Kudo ,  Shigehiro Yamakita ,  Masayasu Kakinuma ,  Taku Ishimori ,  Shogo Shinkai ,  Yoshiyuki Maekawa ,  Masami Miyake ,  Yohei Kanno ,  Fumiko Sasaki ,  Akihiro Horii

发明人： Hiroshi Hayashi ,  Eiji Ohta ,  Ken Hosoya ,  Yasuyuki Kudo ,  Shigehiro Yamakita ,  Masayasu Kakinuma ,  Taku Ishimori ,  Shogo Shinkai ,  Yoshiyuki Maekawa ,  Masami Miyake ,  Yohei Kanno ,  Fumiko Sasaki ,  Akihiro Horii

IPC分类号： G09F13/04 ,  B32B3/02 ,  B32B7/04 ,  G02B1/04 ,  B32B37/00

CPC分类号： G02B6/0065 ,  B29D11/0073 ,  G02B6/0081 ,  G02B6/0088 ,  G02B6/0093 ,  G02F1/133606 ,  G02F1/133615 ,  G02F1/13362 ,  G02F2001/133317 ,  G02F2001/133322 ,  G02F2001/133607 ,  G02F2201/083 ,  G02F2201/086 ,  G02F2201/54 ,  G02F2202/023 ,  G02F2202/025 ,  G02F2202/28 ,  G02F2203/68 ,  Y10T428/1036 ,  Y10T428/23 ,  Y10T428/24777

摘要： An optical element laminate is provided which, while an increase in thickness of a liquid crystal display device is suppressed, improves insufficient rigidity of an optical element and, in addition, which does not degrade display characteristics of the liquid crystal display device. The optical element laminate includes a plate-shaped support member having a first primary surface and a second primary surface and an optical element which is laminated on at least one of the first primary surface and the second primary surface of the support member and, in addition, which has a film shape or a sheet shape. The periphery of the laminated optical element is at least bonded to facing two sides of the support member, the optical element and the support member are placed in close contact with each other, and a thickness t of the support member, a length L of the support member, and a tensile force F of the optical element satisfy the relational expression of 0≦F≦1.65×104×t/L in an environment at a temperature of 70° C.

摘要翻译： 提供一种光学元件层叠体，其在抑制液晶显示装置的厚度增加的同时，提高光学元件的刚性不足，并且不会降低液晶显示装置的显示特性。 光学元件层叠体包括具有第一主表面和第二主表面的板状支撑构件和层叠在支撑构件的第一主表面和第二主表面中的至少一个上的光学元件，另外 ，其具有膜形状或片状。 层叠光学元件的周边至少与支撑构件的两侧面接合，光学元件和支撑构件彼此紧密接触，并且支撑构件的厚度t为 支撑构件和光学元件的拉伸力F在温度为70℃的环境中满足关系式0＆lt; nlE; F＆nlE; 1.65×104×t / L。

公开(公告)号：US07561052B2

公开(公告)日：2009-07-14

申请号：US11044609

申请日：2005-01-28

申请人： Yasuyuki Arai ,  Mai Akiba ,  Yuko Tachimura ,  Yohei Kanno

发明人： Yasuyuki Arai ,  Mai Akiba ,  Yuko Tachimura ,  Yohei Kanno

IPC分类号： G08B13/14 ,  G06K19/02

CPC分类号： G06K19/07722 ,  G06K19/07749 ,  G08B13/2417 ,  G08B13/2437

摘要： In commercial products to which a non-contact type or contact type ID label or ID tag is attached and ID cards, there is fear that, due to a difference between coefficients of thermal expansion between an antenna for communication and a resin provided around the antenna, stress is applied to the resin with the larger coefficient of thermal expansion to break the resin. This contributes to decrease in manufacturing yield, lifetime, and reliability of an ID label or the like. In an article such as an ID label, an ID tag, and an ID card according to the present invention, a filler is included in a filling layer provided around an antenna forming an ID label, an ID tag, and an ID card so that the difference in coefficient of thermal expansion between the antenna and the filling layer can be reduced. This makes it possible to ease generation of stress due to the difference in coefficient of thermal expansion and prevent peeling and cracks of the filling layer.

摘要翻译： 在与非接触型或接触型ID标签或ID标签相连的商业产品中，ID卡有恐惧，由于通信用天线与设置在天线周围的树脂之间的热膨胀系数之间的差异 对具有较大的热膨胀系数的树脂施加应力以破坏树脂。 这导致ID标签等的制造产量，寿命和可靠性的降低。 在根据本发明的诸如ID标签，ID标签和ID卡的物品中，在形成ID标签，ID标签和ID卡的天线周围的填充层中包括填充物，使得 可以降低天线与填充层之间的热膨胀系数的差异。 这使得可以缓解由于热膨胀系数的差异导致的应力的产生，并且防止填充层的剥离和裂纹。

公开(公告)号：US20080224831A1

公开(公告)日：2008-09-18

申请号：US10594308

申请日：2005-04-06

申请人： Yasuyuki Arai ,  Mai Akiba ,  Yuko Tachimura ,  Yohei Kanno

发明人： Yasuyuki Arai ,  Mai Akiba ,  Yuko Tachimura ,  Yohei Kanno

IPC分类号： H04Q5/22

CPC分类号： H04B5/0012 ,  G06K7/10178 ,  G06K17/00 ,  G06K19/07758 ,  G06K2017/0051 ,  H04B5/0056 ,  H04B5/0081

摘要： When a product attached with an ID tag is placed inside a package body, there is a risk that communication with an ID tag using a reader/writer is blocked. Then, it is difficult to manage products in a distribution process of products, which leads to lose convenience of ID tags. One feature of the present invention is a product management system that includes a package body for packing a product attached with an ID tag, and a reader/writer. The ID tag includes a thin film integrated circuit portion and an antenna, the package body includes a resonance circuit portion having an antenna coil and a capacitor, and the resonance circuit portion can communicate with the reader/writer and the ID tag. Accordingly, the stability of communication between an ID tag attached to a product and an R/W can be secured, and management of products can be conducted simply and efficiently, even if a product is packed by a package body.

摘要翻译： 当附有ID标签的产品放置在包装体内时，存在与使用读写器的ID标签进行通信的风险。 然后，在产品分销过程中难以管理产品，导致ID标签的便利性不足。 本发明的一个特征是产品管理系统，其包括用于打包附有ID标签的产品的包装体和读取器/写入器。 ID标签包括薄膜集成电路部分和天线，封装主体包括具有天线线圈和电容器的谐振电路部分，并且谐振电路部分可以与读取器/写入器和ID标签通信。 因此，即使产品被包装体包装，也可以确保附着在产品上的ID标签与R / W之间的通信的稳定性，并且可以简单有效地进行产品的管理。

公开(公告)号：US07271076B2

公开(公告)日：2007-09-18

申请号：US11007645

申请日：2004-12-09

申请人： Shunpei Yamazaki ,  Toru Takayama ,  Yohei Kanno

发明人： Shunpei Yamazaki ,  Toru Takayama ,  Yohei Kanno

IPC分类号： H01L21/46 ,  H01L21/30 ,  H01L21/762

CPC分类号： H01L21/6835 ,  G06K19/0704 ,  G06K19/0723 ,  G06K19/07703 ,  G06K19/07718 ,  G06K19/07745 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07758 ,  G06K19/07779 ,  G06K19/07781 ,  G06K19/07783 ,  H01L23/49855 ,  H01L2221/68318 ,  H01L2221/68359 ,  H01L2221/68368 ,  H01L2224/45147 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2924/00011

摘要： A method of manufacturing a thin film integrated circuit device according to the present invention includes steps of forming a peel-off layer over a thermally oxidized silicon substrate, forming a plurality of thin film integrated circuit devices over the peel-off layer with a base film interposed therebetween, forming a groove between the plurality of thin film integrated circuit devices, and separating the plurality of thin film integrated circuit devices by introducing one of a gas and a liquid including halogen fluoride into the groove to remove the peel-off layer.

摘要翻译： 根据本发明的制造薄膜集成电路器件的方法包括以下步骤：在热氧化硅衬底上形成剥离层，在剥离层上形成多个薄膜集成电路器件，底片 在所述多个薄膜集成电路器件之间形成沟槽，并且通过将包含卤素氟化物的气体和液体中的一种引入到所述沟槽中以去除所述剥离层来分离所述多个薄膜集成电路器件。

公开(公告)号：US20070131976A1

公开(公告)日：2007-06-14

申请号：US10577057

申请日：2004-11-05

申请人： Yohei Kanno ,  Gen Fujii

发明人： Yohei Kanno ,  Gen Fujii

IPC分类号： H01L27/148 ,  H01L29/768 ,  H01L29/74

CPC分类号： H01L29/66765 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/78696

摘要： In case that a conventional TFT is formed to have an inversely staggered type, a resist mask is required to be formed by an exposing, developing, and droplet discharging in forming an island-like semiconductor region. It resulted in the increase in the number of processes and the number of materials. According to the present invention, a process can be simplified since after forming a source region and a drain region, a portion serving as a channel region is covered by an insulating film serving as a channel protecting film to form an island-like semiconductor film, and so a semiconductor element can be manufactured by using only metal mask without using a resist mask.

摘要翻译： 在常规TFT形成为具有反交错型的情况下，需要通过在形成岛状半导体区域中的曝光，显影和液滴放电来形成抗蚀剂掩模。 这导致过程数量和材料数量的增加。 根据本发明，由于在形成源极区域和漏极区域之后，由于作为沟道区域的部分被用作沟道保护膜的绝缘膜覆盖以形成岛状半导体膜，因此可以简化工艺， 因此可以仅使用金属掩模而不使用抗蚀剂掩模来制造半导体元件。

公开(公告)号：US20050230752A1

公开(公告)日：2005-10-20

申请号：US11092773

申请日：2005-03-30

申请人： Yohei Kanno ,  Yasuko Watanabe

发明人： Yohei Kanno ,  Yasuko Watanabe

IPC分类号： H01L21/268 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/10 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/42384 ,  H01L21/268 ,  H01L27/1292 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621

摘要： In the case of providing an LDD region for a TFT, it is necessary to form separately an insulating film to be a mask or to contrive the shape of a gate electrode layer in order to have the concentration difference in impurities injected in a semiconductor film; therefore, the number of patterning steps has increased as a matter of course and the step has become complicated. A semiconductor device according to one feature of the invention comprises a semiconductor layer including a channel region, a pair of impurity regions, and a pair of low-concentration impurity regions; and a gate electrode layer having a single layer structure or a laminated structure, of which film thickness is not even, which is formed to be in contact with the semiconductor layer by sandwiching a gate insulating film therebetween. Particularly, the gate electrode layer, of which film thickness is not even, can be formed easily by employing a droplet discharging method; thus, the convenience of the droplet discharging method can be taken with full advantage.

摘要翻译： 在为TFT提供LDD区域的情况下，需要分别形成作为掩模的绝缘膜或者为了使注入半导体膜中的杂质的浓度差成为栅极电极层的形状; 因此，图案化步骤的数量当然增加，并且步骤变得复杂。 根据本发明的一个特征的半导体器件包括：半导体层，包括沟道区，一对杂质区和一对低浓度杂质区; 以及通过在其间夹有栅极绝缘膜而形成为与半导体层接触的膜厚不均匀的单层结构或层叠结构的栅极电极层。 特别地，通过采用液滴喷射法可以容易地形成膜厚不均匀的栅电极层; 因此，可以充分利用液滴喷射方法的方便性。