公开(公告)号：US06593759B2

公开(公告)日：2003-07-15

申请号：US10116595

申请日：2002-04-02

申请人： Terry Gilton

发明人： Terry Gilton

IPC分类号： G01R2708

CPC分类号： G01N27/205

摘要： In one aspect, the invention includes an apparatus having a semiconductor substrate receiving device with at least one extension configured to hold a semiconductor substrate within a liquid bath. The device is configured to have at least a portion of the extension at least periodically placed within the liquid bath. The extension includes a conductive material at least partially coated with an insulative protective material. The insulative protective material is configured to protect the portion of the conductive material which is in the bath from physically contacting the liquid of the bath. The apparatus also includes an electrode within the bath, and an electrical connection between the electrode and the conductive material of the extension. Additionally, the apparatus has a monitor configured to monitor a current flow state of a circuit that includes the electrode, conductive material of the extension, and liquid bath to determine if the circuit is in a closed state or in an open state. In another aspect, the invention includes methods for determining if a protective coating on a semiconductor substrate receiving device has been compromised.

摘要翻译： 在一个方面，本发明包括一种具有半导体衬底接收装置的装置，该半导体衬底接收装置具有至少一个用于将半导体衬底保持在液槽内的延伸部分。 该装置构造成使至少一部分延伸部至少周期性地放置在液槽内。 该延伸部包括至少部分地涂有绝缘保护材料的导电材料。 绝缘保护材料被配置为保护在浴中的导电材料的部分与液体的液体物理接触。 该设备还包括在浴内的电极以及电极与延伸部的导电材料之间的电连接。 此外，该装置具有监视器，其被配置为监视包括电极，延伸部的导电材料和液体浴的电路的电流流动状态，以确定电路是处于闭合状态还是处于打开状态。 另一方面，本发明包括用于确定半导体衬底接收装置上的保护涂层是否已被破坏的方法。

公开(公告)号：US06391793B2

公开(公告)日：2002-05-21

申请号：US09385197

申请日：1999-08-30

申请人： Whonchee Lee ,  Pai Pan ,  Terry Gilton

发明人： Whonchee Lee ,  Pai Pan ,  Terry Gilton

IPC分类号： H01L21302

CPC分类号： H01L21/30604 ,  H01L21/76224

摘要： A silicon etching method includes providing a substrate assembly including an exposed silicon region and an exposed oxide region. An etch composition including an ammonium fluoride component, an inorganic acid component, and an oxidizing agent is also provided. The etch composition has a pH in the range of about 7.0 to about 8.0. The substrate assembly is exposed to the etch composition. Exposing the substrate assembly to the etch composition may result in etching the exposed silicon region at an etching rate that is greater than about 3 times the etching rate of the exposed oxide region and/or etching the silicon region at an etch rate greater than about 9 Å/minute. The etching method may be used in forming isolation structures. Further, etch compositions for performing the desired etch are provided.

摘要翻译： 硅蚀刻方法包括提供包括暴露的硅区域和暴露的氧化物区域的衬底组件。 还提供了包含氟化铵组分，无机酸组分和氧化剂的蚀刻组合物。 蚀刻组合物的pH值在约7.0至约8.0的范围内。 衬底组件暴露于蚀刻组合物。 将衬底组件暴露于蚀刻组合物可导致以大于暴露氧化物区域的蚀刻速率的约3倍的蚀刻速率蚀刻暴露的硅区域和/或以大于约9的蚀刻速率蚀刻硅区域 一分钟。 蚀刻方法可用于形成隔离结构。 此外，提供用于执行所需蚀刻的蚀刻组合物。

公开(公告)号：US06379981B2

公开(公告)日：2002-04-30

申请号：US09050218

申请日：1998-03-27

申请人： Terry Gilton

发明人： Terry Gilton

IPC分类号： H01L21302

CPC分类号： H01L22/26

摘要： In one aspect, the invention includes a method of etching, comprising: a) forming a material over a substrate, the material comprising a lower portion near the substrate and an upper portion above the lower portion; b) providing a quantity of detectable atoms within the material, the detectable atoms being provided at a different concentration in the lower portion than in the upper portion; c) etching into the material and forming etching debris; and d) detecting the detectable atoms in the debris. In another aspect, the invention includes a method of etching, comprising: a) providing a semiconductor wafer substrate, the substrate having a center and an edge; b) forming a material over the substrate, the material comprising detectable atoms; c) etching into the material and forming etching debris; d) detecting the detectable atoms in the debris; and e) estimating a degree of center-to-edge uniformity of the etching from the detecting.

摘要翻译： 一方面，本发明包括蚀刻方法，包括：a）在衬底上形成材料，所述材料包括在衬底附近的下部和在下部上方的上部; b）在材料内提供一定量的可检测原子，可检测的原子在下部分中提供的浓度不同于上部; c）蚀刻到材料中并形成蚀刻碎片; 和d）检测碎片中的可检测原子。 另一方面，本发明包括一种蚀刻方法，包括：a）提供半导体晶片衬底，所述衬底具有中心和边缘; b）在衬底上形成材料，该材料包含可检测的原子; c）蚀刻到材料中并形成蚀刻碎片; d）检测碎片中的可检测原子; 以及e）从所述检测估计所述蚀刻的中心到边缘均匀度的程度。

公开(公告)号：US06090707A

公开(公告)日：2000-07-18

申请号：US389535

申请日：1999-09-02

申请人： Sujit Sharan ,  Gurtej S. Sandhu ,  Terry Gilton

发明人： Sujit Sharan ,  Gurtej S. Sandhu ,  Terry Gilton

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L21/44

CPC分类号： H01L21/76877 ,  H01L21/28518 ,  Y10S438/906

摘要： The invention includes methods of forming a conductive silicide layers on silicon comprising substrates, and methods of forming conductive silicide contacts. In one implementation, a method of forming a conductive silicide layer on a silicon comprising substrate includes reacting oxygen with silicon of a silicon comprising substrate to form oxides of silicon from silicon of the substrate. The oxides of silicon include stoichiometric silicon dioxide and substoichiometric silicon dioxide. The stoichiometric silicon dioxide and substoichiometric silicon dioxide are exposed to ozone to transform at least some of the substoichiometric silicon dioxide to stoichiometric silicon dioxide. After the exposing, a conductive metal silicide is formed in electrical connection with silicon of the silicon comprising substrate. In one implementation, a method of forming a conductive silicide layer on a silicon comprising substrate includes reacting oxygen with silicon of a silicon comprising substrate to form oxides of silicon from silicon of the substrate. The oxides of silicon include stoichiometric silicon dioxide and substoichiometric silicon dioxide. The stoichiometric silicon dioxide and substoichiometric silicon dioxide are exposed to O.sub.2 plasma to transform at least some of the substoichiometric silicon dioxide to stoichiometric silicon dioxide. After the exposing, a metal is reacted with silicon of the substrate to form a conductive metal silicide.

摘要翻译： 本发明包括在含硅衬底上形成导电硅化物层的方法，以及形成导电硅化物接触的方法。 在一个实施方案中，在包含硅的衬底上形成导电硅化物层的方法包括使氧与含硅衬底的硅反应以从衬底​​的硅形成硅的氧化物。 硅的氧化物包括化学计量的二氧化硅和亚化学计量的二氧化硅。 将化学计量的二氧化硅和亚化学计量的二氧化硅暴露于臭氧以将至少一些亚化学计量的二氧化硅转化为化学计量的二氧化硅。 暴露后，形成导电金属硅化物与含硅衬底的硅电连接。 在一个实施方案中，在包含硅的衬底上形成导电硅化物层的方法包括使氧与含硅衬底的硅反应以从衬底​​的硅形成硅的氧化物。 硅的氧化物包括化学计量的二氧化硅和亚化学计量的二氧化硅。 将化学计量的二氧化硅和亚化学计量的二氧化硅暴露于O 2等离子体中以将至少一些亚化学计量的二氧化硅转化为化学计量的二氧化硅。 暴露后，金属与基板的硅反应形成导电金属硅化物。

公开(公告)号：US20080012083A1

公开(公告)日：2008-01-17

申请号：US11484706

申请日：2006-07-12

申请人： Terry Gilton

发明人： Terry Gilton

IPC分类号： H01L31/0232 ,  H01L31/00

CPC分类号： G01N21/75 ,  B01L3/5027 ,  G01N21/253 ,  G01N21/274 ,  G01N21/77

摘要： An analytical system-on-a-chip can be used as an analytical imaging device, for example, for detecting the presence of a chemical compound. A layer of analytical material is formed on a transparent layer overlying a solid state image sensor. The analytical material can react in known ways with at least one reactant to block light or to allow light to pass through to the array. The underlying sensor array, in turn, can process the presence, absence or amount of light into a digitized signal output. The system-on-a-chip may also include software that can detect and analyze the output signals of the device.

摘要翻译： 分析片上系统可用作分析成像装置，例如用于检测化合物的存在。 在覆盖固态图像传感器的透明层上形成分析材料层。 分析材料可以以已知方式与至少一种反应物反应以阻挡光或允许光通过阵列。 底层传感器阵列又可以将光的存在，不存在或数量处理成数字化的信号输出。 片上系统还可以包括可以检测和分析设备的输出信号的软件。

公开(公告)号：US20060104142A1

公开(公告)日：2006-05-18

申请号：US11287488

申请日：2005-11-28

申请人： Terry Gilton

发明人： Terry Gilton

IPC分类号： G11C7/00

CPC分类号： G11C5/005 ,  G11C11/406 ,  G11C11/40603 ,  G11C11/40622 ,  G11C13/0004 ,  G11C13/0011 ,  G11C13/0033 ,  G11C13/0069 ,  G11C16/3431

摘要： A software refreshed memory device comprises a plurality of memory cells that must be periodically refreshed to avoid losing data. Preferably, the memory cells can avoid losing data even though the time interval between successive memory refresh operations is relatively long, as compared to the time interval between successive memory refresh operations in a conventional volatile memory device, such as a DRAM. A processor can perform periodic memory refresh operations by executing a set of memory refresh instructions implemented in software, rather than in hardware. Accordingly, the memory device can advantageously be simplified, because the need for memory refresh circuitry and for a unique refresh control signal are advantageously eliminated. Moreover, the processor executing the memory refresh instructions can typically perform more sophisticated algorithms, as compared to memory refresh circuitry implemented in hardware, for determining when to perform a memory refresh operation. For example, the processor can determine whether each individual memory cell needs to be refreshed, thereby advantageously avoiding performing unnecessary refresh operations on memory cells that do not need to be refreshed.

公开(公告)号：US20050157567A1

公开(公告)日：2005-07-21

申请号：US11080442

申请日：2005-03-16

申请人： Terry Gilton

发明人： Terry Gilton

IPC分类号： H01L27/105 ,  G11C11/56 ,  G11C17/14 ,  H01L45/00 ,  G11C5/00

CPC分类号： G11C13/0004 ,  G11C11/56 ,  G11C11/5678 ,  G11C17/14 ,  H01L45/085 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144

摘要： A programmable multiple data state memory cell including a first electrode layer formed from a first conductive material, a second electrode layer formed from a second conductive material, and a first layer of a metal-doped chalcogenide material disposed between the first and second electrode layers. The first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The memory cell further includes a third electrode layer formed from a third conductive material, and a second layer of a metal-doped chalcogenide material disposed between the second and third electrode layers, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers.

摘要翻译： 一种可编程多数据状态存储单元，包括由第一导电材料形成的第一电极层，由第二导电材料形成的第二电极层，以及设置在第一和第二电极层之间的金属掺杂的硫族化物材料的第一层。 第一层提供其中可以形成导电生长以将第一和第二电极层电耦合在一起的介质。 存储单元还包括由第三导电材料形成的第三电极层和设置在第二和第三电极层之间的金属掺杂硫族化物材料的第二层，第二层提供可形成导电生长的介质 以将第二和第三电极层电耦合在一起。

公开(公告)号：US20050145834A1

公开(公告)日：2005-07-07

申请号：US11056483

申请日：2005-02-11

申请人： Terry Gilton

发明人： Terry Gilton

IPC分类号： H01L21/84 ,  H01L27/10 ,  H01L27/12 ,  H01L27/28 ,  H01L47/00

CPC分类号： H01L21/84 ,  H01L27/10 ,  H01L27/1203 ,  H01L27/285

摘要： The invention includes a switchable circuit device. The device comprises a first conductive layer and a porous silicon matrix over the first conductive layer. A material is dispersed within pores of the porous silicon matrix, and the material has two stable states. A second conductive layer is formed over the porous silicon matrix. A current flow between the first and second conductive layers is influenced by which of the stable states the material is in.

摘要翻译： 本发明包括可切换电路装置。 该器件包括在第一导电层上的第一导电层和多孔硅基质。 材料分散在多孔硅基质的孔内，该材料具有两种稳定状态。 在多孔硅基体上形成第二导电层。 第一和第二导电层之间的电流流动受材料所处的稳定状态的影响。

公开(公告)号：US20050118831A1

公开(公告)日：2005-06-02

申请号：US11034903

申请日：2005-01-13

申请人： Terry Gilton

发明人： Terry Gilton

IPC分类号： B05D1/00 ,  B08B3/00 ,  C03C15/00 ,  G03F7/42 ,  H01L21/00 ,  H01L21/302 ,  H01L21/306 ,  H01L21/311 ,  H01L21/338 ,  H01L21/461

CPC分类号： H01L21/6715 ,  G03F7/423 ,  G03F7/427 ,  H01L21/02054 ,  H01L21/31133 ,  H01L21/6708 ,  Y10S438/948

摘要： A method for moving resist stripper across the surface of a semiconductor substrate that includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned over the semiconductor substrate. A carrier fluid, such as a gas, is then directed toward the semiconductor substrate so as to move the resist stripper across the substrate. The carrier fluid may be directed toward the substrate as the resist stripper is being applied thereto or following application of the resist stripper. A system for effecting the method is also disclosed.

摘要翻译： 一种将抗蚀剂剥离剂移动穿过半导体衬底的表面的方法，包括将湿化学抗蚀剂剥离剂（例如有机或氧化性湿化学抗蚀剂剥离剂）施加到位于半导体衬底上的光掩模的至少一部分上。 然后将诸如气体的载体流体引向半导体衬底，以使抗蚀剂剥离剂跨越衬底移动。 当抗蚀剂剥离器施加到其上或者在施加抗蚀剂剥离器之后，载体流体可以被引向衬底。 还公开了一种用于实现该方法的系统。

公开(公告)号：US06660180B2

公开(公告)日：2003-12-09

申请号：US09997928

申请日：2001-11-30

申请人： Whonchee Lee ,  Pai Pan ,  Terry Gilton

发明人： Whonchee Lee ,  Pai Pan ,  Terry Gilton

IPC分类号： C09K1300

CPC分类号： H01L21/30604 ,  H01L21/76224

摘要： A silicon etching method includes providing a substrate assembly including an exposed silicon region and an exposed oxide region. An etch composition including an ammonium fluoride component, an inorganic acid component, and an oxidizing agent is also provided. The etch composition has a pH in the range of about 7.0 to about 8.0. The substrate assembly is exposed to the etch composition. Exposing the substrate assembly to the etch composition may result in etching the exposed silicon region at an etching rate that is greater than about 3 times the etching rate of the exposed oxide region and/or etching the silicon region at an etch rate greater than about 9 Å/minute. The etching method may be used in forming isolation structures. Further, etch compositions for performing the desired etch are provided.