公开(公告)号：US20150221731A1

公开(公告)日：2015-08-06

申请号：US14616395

申请日：2015-02-06

Applicant: MaxPower Semiconductor, Inc.

Inventor： Jun Zeng ,  Mohamed N. Darwish ,  Kui Pu ,  Shih-Tzung Su

IPC: H01L29/40 ,  H01L29/78 ,  H01L29/739 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/407 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813

Abstract: A power MOSFET cell includes an N+ silicon substrate having a drain electrode. A low dopant concentration N-type drift layer is grown over the substrate. An N-type layer, having a higher dopant concentration than the drift region, is then formed and etched to have sidewalls. A P-well is formed in the N-type layer, and an N+ source region is formed in the P-well. A gate is formed over the P-well's lateral channel and has a vertical extension next to the top portion of the sidewalls. A positive gate voltage inverts the lateral channel and increases the conduction along the sidewalls to reduce on-resistance. A vertical shield field plate is also located next to the sidewalls and extends virtually the entire length of the sidewalls. The field plate laterally depletes the N-type layer when the device is off to increase the breakdown voltage.

Abstract translation: 功率MOSFET单元包括具有漏电极的N +硅衬底。 在衬底上生长低掺杂浓度的N型漂移层。 然后形成具有比漂移区更高的掺杂剂浓度的N型层并蚀刻以具有侧壁。 在N型层中形成P阱，在P阱中形成N +源极区。 栅极形成在P阱的横向通道上，并且具有靠近侧壁顶部的垂直延伸。 正栅极电压反转横向沟道并增加沿侧壁的导通以降低导通电阻。 垂直屏蔽场板也位于侧壁旁边，几乎延伸到侧壁的整个长度上。 当设备关闭时，场板横向耗尽N型层以增加击穿电压。

公开(公告)号：US09093522B1

公开(公告)日：2015-07-28

申请号：US14338303

申请日：2014-07-22

Applicant: MaxPower Semiconductor, Inc.

Inventor： Jun Zeng ,  Mohamed N. Darwish ,  Kui Pu ,  Shih-Tzung Su

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/732 ,  H01L29/739 ,  H01L29/40 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/7813 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0834 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811

Abstract: A power MOSFET cell includes an N+ silicon substrate having a drain electrode. A low dopant concentration N-type drift layer is grown over the substrate. Alternating N and P-type columns are formed over the drift layer with a higher dopant concentration. An N-type layer, having a higher dopant concentration than the drift region, is then formed and etched to have sidewalls. A P-well is formed in the N-type layer, and an N+ source region is formed in the P-well. A gate is formed over the P-well's lateral channel and next to the sidewalls as a vertical field plate. A source electrode contacts the P-well and source region. A positive gate voltage inverts the lateral channel and increases the conduction along the sidewalls. Current between the source and drain flows laterally and then vertically through the various N layers. On resistance is reduced and the breakdown voltage is increased.

Abstract translation: 功率MOSFET单元包括具有漏电极的N +硅衬底。 在衬底上生长低掺杂浓度的N型漂移层。 在漂移层上形成交替的N型和P型列，掺杂浓度较高。 然后形成具有比漂移区更高的掺杂剂浓度的N型层并蚀刻以具有侧壁。 在N型层中形成P阱，在P阱中形成N +源极区。 在P阱的横向通道上形成一个栅极，并且在侧壁上形成一个垂直场板。 源电极接触P阱和源极区。 正栅极电压反转横向沟道并增加沿着侧壁的导电。 源极和漏极之间的电流横向流动，然后垂直穿过各种N层。 导通电阻降低，击穿电压增加。

公开(公告)号：US20150076593A1

公开(公告)日：2015-03-19

申请号：US14027873

申请日：2013-09-16

Applicant: MaxPower Semiconductor, Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng

IPC: H01L29/78

CPC classification number: H01L29/7816 ,  H01L21/26586 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7835 ,  H01L29/78624 ,  H03K17/04106

Abstract: Lateral power devices where immobile electrostatic charge is emplaced in dielectric material adjoining the drift region. A shield gate is interposed between the gate electrode and the drain, to reduce the Miller charge. In some embodiments the gate electrode is a trench gate, and in such cases the shield electrode too is preferably vertically extended.

Abstract translation: 侧向功率器件，其中静电静电电荷放置在与漂移区相邻的电介质材料中。 屏蔽栅极介于栅电极和漏极之间，以减少米勒电荷。 在一些实施例中，栅电极是沟槽栅极，并且在这种情况下，屏蔽电极也优选地垂直延伸。

公开(公告)号：US08890238B2

公开(公告)日：2014-11-18

申请号：US13770011

申请日：2013-02-19

Applicant: MaxPower Semiconductor, Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/66 ,  H01L29/40 ,  H01L29/06 ,  H01L29/739 ,  H01L29/78 ,  H01L21/265 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L29/7393 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/7816

Abstract: Power semiconductor devices, and related methods, where majority carrier flow is divided into paralleled flows through two drift regions of opposite conductivity types.

Abstract translation: 功率半导体器件和相关方法，其中多数载流子流通过相反导电类型的两个漂移区域分成并联流。

公开(公告)号：US20140252463A1

公开(公告)日：2014-09-11

申请号：US14202471

申请日：2014-03-10

Applicant: MaxPower Semiconductor, Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/78

CPC classification number: H01L29/7806 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/872

Abstract: Power devices which include trench Schottky barrier diodes and also (preferably) trench-gate transistors. Isolation trenches flank both the gate regions and the diode mesas, and have an additional diffusion below the bottom of the isolation trenches. The additional diffusion helps to reduce the electric field (and leakage), when the device is in the OFF state, at both the Schottky barrier and at the body diode.

Abstract translation: 功率器件包括沟道肖特基势垒二极管和（优选）沟槽栅极晶体管。 隔离沟槽面对栅极区域和二极管台面两侧，并且在隔离沟槽底部具有另外的扩散。 当器件处于OFF状态时，附加扩散有助于在肖特基势垒和二极管二极管的同时减小电场（和泄漏）。

公开(公告)号：US20140054741A1

公开(公告)日：2014-02-27

申请号：US13693714

申请日：2012-12-04

Applicant: MAXPOWER SEMICONDUCTOR, INC.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/06

CPC classification number: H01L29/0611 ,  H01L21/26586 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/0873 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/8611

Abstract: Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.

Abstract translation: 使用重新焊接的沟槽的功率器件在其侧壁处或附近具有永久电荷。 这些沟槽垂直延伸到漂移区域。

公开(公告)号：US11289596B2

公开(公告)日：2022-03-29

申请号：US16782996

申请日：2020-02-05

Applicant: MaxPower Semiconductor Inc.

Inventor： Jun Zeng ,  Kui Pu ,  Mohamed N. Darwish ,  Shih-Tzung Su

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/66 ,  H01L29/08 ,  H01L29/417

Abstract: A split gate power device is disclosed having a trench containing a U-shaped gate that, when biased above a threshold voltage, creates a conductive channel in a p-well. Below the gate is a field plate in the trench, coupled to the source electrode, for spreading the electric field along the trench to improve the breakdown voltage. The top gate poly is initially formed relatively thin so that it can be patterned using non-CMP techniques, such as dry etching or wet etching. As such, the power device can be fabricated in conventional fabs not having CMP capability. In one embodiment, the thin gate has vertical and lateral portions that create conductive vertical and lateral channels in a p-well. In another embodiment, the thin gate has only vertical portions along the trench sidewalls for minimizing surface area and gate capacitance.

公开(公告)号：US10593813B2

公开(公告)日：2020-03-17

申请号：US16016510

申请日：2018-06-22

Applicant: MaxPower Semiconductor Inc.

Inventor： Richard A. Blanchard ,  Mohamed N. Darwish ,  Jun Zeng

IPC: H01L29/06 ,  H01L29/861 ,  H01L29/40 ,  H01L29/66 ,  H01L21/265 ,  H01L29/04 ,  H01L29/16 ,  H01L29/417

Abstract: A new semiconductor rectifier structure. In general, a MOS-transistor-like structure is located above a JFET-like deeper structure. The present application teaches ways to combine and optimize these two structures in a merged device so that the resulting combined structure achieves both a low forward voltage and a high reverse breakdown voltage in a relatively small area. In one class of innovative implementations, an insulated (or partially insulated) trench is used to define a vertical channel in a body region along the sidewall of a trench, so that majority carriers from a “source” region (typically n+) can flow through the channel. An added “pocket” diffusion, of the same conductivity type as the body region (p-type in this example), provides an intermediate region around the bottom of the trench. This intermediate diffusion, and an additional deep region of the same conductivity type, define a deep JFET-like device which is in series with the MOS channel portion of the diode. This advantageously permits the MOS channel portion to be reasonably short, and to have a reasonably low threshold voltage, since the high-voltage withstand characteristics are defined by the deep JFET-like device.

公开(公告)号：US20190115464A1

公开(公告)日：2019-04-18

申请号：US16013376

申请日：2018-06-20

Applicant: MaxPower Semiconductor Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng

IPC: H01L29/78 ,  H01L29/49 ,  H01L29/10 ,  H01L29/06 ,  H01L29/40

Abstract: MOS-gated devices, related methods, and systems for vertical power and RF devices including an insulated trench and a gate electrode. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. Permanent electrostatic charges are included in said insulation material. A conductive shield layer is positioned above the insulated trench, to reduce parasitic capacitances.

公开(公告)号：US10014365B2

公开(公告)日：2018-07-03

申请号：US14445942

申请日：2014-07-29

Applicant: MaxPower Semiconductor, Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/861 ,  H01L29/423 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L21/265

CPC classification number: H01L29/0611 ,  H01L21/26586 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/0873 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/8611

Abstract: Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.