公开(公告)号：US11289596B2

公开(公告)日：2022-03-29

申请号：US16782996

申请日：2020-02-05

申请人： MaxPower Semiconductor Inc.

发明人： Jun Zeng ,  Kui Pu ,  Mohamed N. Darwish ,  Shih-Tzung Su

IPC分类号： H01L29/78 ,  H01L29/40 ,  H01L29/66 ,  H01L29/08 ,  H01L29/417

摘要： A split gate power device is disclosed having a trench containing a U-shaped gate that, when biased above a threshold voltage, creates a conductive channel in a p-well. Below the gate is a field plate in the trench, coupled to the source electrode, for spreading the electric field along the trench to improve the breakdown voltage. The top gate poly is initially formed relatively thin so that it can be patterned using non-CMP techniques, such as dry etching or wet etching. As such, the power device can be fabricated in conventional fabs not having CMP capability. In one embodiment, the thin gate has vertical and lateral portions that create conductive vertical and lateral channels in a p-well. In another embodiment, the thin gate has only vertical portions along the trench sidewalls for minimizing surface area and gate capacitance.

公开(公告)号：US10593813B2

公开(公告)日：2020-03-17

申请号：US16016510

申请日：2018-06-22

申请人： MaxPower Semiconductor Inc.

发明人： Richard A. Blanchard ,  Mohamed N. Darwish ,  Jun Zeng

IPC分类号： H01L29/06 ,  H01L29/861 ,  H01L29/40 ,  H01L29/66 ,  H01L21/265 ,  H01L29/04 ,  H01L29/16 ,  H01L29/417

摘要： A new semiconductor rectifier structure. In general, a MOS-transistor-like structure is located above a JFET-like deeper structure. The present application teaches ways to combine and optimize these two structures in a merged device so that the resulting combined structure achieves both a low forward voltage and a high reverse breakdown voltage in a relatively small area. In one class of innovative implementations, an insulated (or partially insulated) trench is used to define a vertical channel in a body region along the sidewall of a trench, so that majority carriers from a “source” region (typically n+) can flow through the channel. An added “pocket” diffusion, of the same conductivity type as the body region (p-type in this example), provides an intermediate region around the bottom of the trench. This intermediate diffusion, and an additional deep region of the same conductivity type, define a deep JFET-like device which is in series with the MOS channel portion of the diode. This advantageously permits the MOS channel portion to be reasonably short, and to have a reasonably low threshold voltage, since the high-voltage withstand characteristics are defined by the deep JFET-like device.

公开(公告)号：US20190123210A1

公开(公告)日：2019-04-25

申请号：US16042855

申请日：2018-07-23

申请人： MaxPower Semiconductor Inc.

发明人： Amit Paul ,  Mohamed N. Darwish

IPC分类号： H01L29/786 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78

摘要： A lateral SOI device may include a semiconductor channel region connected to a drain region by a drift region. An insulation region on the drift layer is positioned between the channel region and the drain region. Permanent charges may be embedded in the insulation region sufficient to cause inversion in the insulation region. The semiconductor layer also overlies a global insulation layer, and permanent charges are preferably embedded in at least selected areas of this insulation layer too.

公开(公告)号：US20190115464A1

公开(公告)日：2019-04-18

申请号：US16013376

申请日：2018-06-20

申请人： MaxPower Semiconductor Inc.

发明人： Mohamed N. Darwish ,  Jun Zeng

IPC分类号： H01L29/78 ,  H01L29/49 ,  H01L29/10 ,  H01L29/06 ,  H01L29/40

摘要： MOS-gated devices, related methods, and systems for vertical power and RF devices including an insulated trench and a gate electrode. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. Permanent electrostatic charges are included in said insulation material. A conductive shield layer is positioned above the insulated trench, to reduce parasitic capacitances.

公开(公告)号：US20190051743A1

公开(公告)日：2019-02-14

申请号：US15414454

申请日：2017-01-24

申请人： MaxPower Semiconductor, Inc.

发明人： Mohamed N. Darwish

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L21/20 ,  H01L21/265 ,  H01L21/28 ,  H01L21/306 ,  H01L21/324 ,  H01L21/762 ,  H01L29/06 ,  H01L29/40 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/08 ,  H01L29/10

摘要： A semiconductor device includes a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed thereon. The semiconductor device also includes a body layer extending a first predetermined distance into the semiconductor layer of the second conductivity type and a pair of trenches extending a second predetermined distance into the semiconductor layer of the second conductivity type. Each of the pair of trenches consists essentially of a dielectric material disposed therein and a concentration of doping impurities present in the semiconductor layer of the second conductivity type and a distance between the pair of trenches define an electrical characteristic of the semiconductor device. The semiconductor device further includes a control gate coupled to the semiconductor layer of the second conductivity type and a source region coupled to the semiconductor layer of the second conductivity type.

公开(公告)号：US10186573B2

公开(公告)日：2019-01-22

申请号：US15202227

申请日：2016-07-05

申请人： MaxPower Semiconductor, Inc.

发明人： Hamza Yilmaz ,  Mohamed N. Darwish ,  Richard A. Blanchard

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L27/02 ,  H01L27/06 ,  H01L29/739 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40 ,  H01L29/417 ,  H01L29/08 ,  H01L27/07

摘要： In one embodiment, a RESURF structure between a source and a drain in a lateral MOSFET is formed in a trench having a flat bottom surface and angled sidewalls toward the source. Alternating P and N-type layers are epitaxially grown in the trench, and their charges balanced to achieve a high breakdown voltage. In the area of the source, the ends of the P and N-layers angle upward to the surface under the lateral gate and contact the body region. Thus, for an N-channel MOSFET, a positive gate voltage above the threshold forms a channel between the source and the N-layers in the RESURF structure as well as creates an inversion of the ends of the P-layers near the surface for low on-resistance. In another embodiment, the RESURF structure is vertically corrugated by being formed around trenches, thus extending the length of the RESURF structure for a higher breakdown voltage.

公开(公告)号：US10014365B2

公开(公告)日：2018-07-03

申请号：US14445942

申请日：2014-07-29

申请人： MaxPower Semiconductor, Inc.

发明人： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/861 ,  H01L29/423 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L21/265

CPC分类号： H01L29/0611 ,  H01L21/26586 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/0873 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/8611

摘要： Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.

公开(公告)号：US09859400B2

公开(公告)日：2018-01-02

申请号：US14677511

申请日：2015-04-02

申请人： MaxPower Semiconductor, Inc.

发明人： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC分类号： H01L27/088 ,  H01L29/66 ,  H01L29/417 ,  H01L29/739 ,  H01L29/78 ,  H01L29/40 ,  H01L29/10 ,  H01L21/265 ,  H01L21/8234 ,  H01L29/16 ,  H01L29/36 ,  H01L29/423 ,  H01L29/06 ,  H01L29/08

CPC分类号： H01L29/66734 ,  H01L21/26506 ,  H01L21/823412 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1033 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/36 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/7395 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7831 ,  H01L29/7835

摘要： Methods and systems for power semiconductor devices integrating multiple trench transistors on a single chip. Multiple power transistors (or active regions) are paralleled, but one transistor has a lower threshold voltage. This reduces the voltage drop when the transistor is forward-biased. In an alternative embodiment, the power device with lower threshold voltage is simply connected as a depletion diode, to thereby shunt the body diodes of the active transistors, without affecting turn-on and ON-state behavior.

公开(公告)号：US09852910B2

公开(公告)日：2017-12-26

申请号：US15590286

申请日：2017-05-09

申请人： MaxPower Semiconductor, Inc.

发明人： Hamza Yilmaz

IPC分类号： H01L29/49 ,  H01L21/225 ,  H01L21/265 ,  H01L21/304 ,  H01L21/306 ,  H01L21/324 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78 ,  H01L29/10

CPC分类号： H01L29/0634 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/324 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813

摘要： Various improvements in vertical transistors, such as IGBTs, are disclosed. The improvements include forming periodic highly-doped p-type emitter dots in the top surface region of a growth substrate, followed by growing the various transistor layers, followed by grounding down the bottom surface of the substrate, followed by a wet etch of the bottom surface to expose the heavily doped p+ layer. A metal contact is then formed over the p+ layer. In another improvement, edge termination structures utilize p-dopants implanted in trenches to create deep p-regions for shaping the electric field, and shallow p-regions between the trenches for rapidly removing holes after turn-off. In another improvement, a dual buffer layer using an n-layer and distributed n+ regions improves breakdown voltage and saturation voltage. In another improvement, p-zones of different concentrations in a termination structure are formed by varying pitches of trenches. In another improvement, beveled saw streets increase breakdown voltage.

公开(公告)号：US09847413B2

公开(公告)日：2017-12-19

申请号：US15230307

申请日：2016-08-05

申请人： MaxPower Semiconductor Inc.

发明人： Mohamed N. Darwish ,  Jun Zeng

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/16 ,  H03K17/687 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0856 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/404 ,  H01L29/407 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/7813 ,  H01L29/7823 ,  H01L29/7827 ,  H01L29/7835 ,  H03K17/687

摘要： N-channel power semiconductor devices in which an insulated field plate is coupled to the drift region, and immobile electrostatic charge is also present at the interface between the drift region and the insulation around the field plate. The electrostatic charge permits OFF-state voltage drop to occur near the source region, in addition to the voltage drop which occurs near the drain region (due to the presence of the field plate).