公开(公告)号：US08637946B2

公开(公告)日：2014-01-28

申请号：US13228852

申请日：2011-09-09

申请人： Yoshiaki Saito ,  Hideyuki Sugiyama ,  Tomoaki Inokuchi ,  Takao Marukame ,  Mizue Ishikawa

发明人： Yoshiaki Saito ,  Hideyuki Sugiyama ,  Tomoaki Inokuchi ,  Takao Marukame ,  Mizue Ishikawa

IPC分类号： H01L29/82

CPC分类号： H01L43/02 ,  B01D53/1493 ,  B01D53/62 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1695 ,  H01L28/00 ,  H01L29/0843 ,  H01L29/0895 ,  H01L29/66984 ,  H01L43/10

摘要： A spin MOSFET includes: a first ferromagnetic layer provided on a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower and upper faces; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on the second ferromagnetic layer; a third ferromagnetic layer provided on the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween.

摘要翻译： 自旋MOSFET包括：设置在半导体衬底上并具有与膜平面垂直的固定磁化方向的第一铁磁层; 设置在所述第一铁磁层上的半导体层，包括与所述第一铁磁层的上表面相对的下表面，与所述下表面相对的上表面，以及与所述下表面和所述上表面不同的侧面; 第二铁磁层，设置在所述半导体层的上表面上，并且具有与膜平面垂直的可变磁化方向; 设置在第二铁磁层上的第一隧道势垒; 设置在第一隧道屏障上的第三铁磁层; 设置在所述半导体层的侧面上的栅极绝缘膜; 以及设置在半导体层的侧面上的栅电极，其间插入有栅极绝缘膜。

公开(公告)号：US08611143B2

公开(公告)日：2013-12-17

申请号：US13403308

申请日：2012-02-23

申请人： Hideyuki Sugiyama ,  Masato Oda ,  Shinobu Fujita ,  Tetsufumi Tanamoto ,  Mizue Ishikawa ,  Takao Marukame ,  Tomoaki Inokuchi ,  Yoshiaki Saito

发明人： Hideyuki Sugiyama ,  Masato Oda ,  Shinobu Fujita ,  Tetsufumi Tanamoto ,  Mizue Ishikawa ,  Takao Marukame ,  Tomoaki Inokuchi ,  Yoshiaki Saito

IPC分类号： G11C11/00

CPC分类号： G11C5/148 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675

摘要： A memory circuit according to an embodiment includes: a first transistor including a first source/drain electrode, a second source/drain electrode, and a first gate electrode; a second transistor including a third source/drain electrode connected to the second source/drain electrode, a fourth source/drain electrode, and a second gate electrode; a third transistor and a fourth transistor forming an inverter circuit, the third transistor including a fifth source/drain electrode, a sixth source/drain electrode, and a third gate electrode connected to the second source/drain electrode, the fourth transistor including a seventh source/drain electrode connected to the sixth source/drain electrode, an eighth source/drain electrode, and a fourth gate electrode connected to the second source/drain electrode; and an output terminal connected to the sixth source/drain electrode. At least one of the third transistor and the fourth transistor is a spin MOSFET, and an output of the inverter circuit is sent from the output terminal.

摘要翻译： 根据实施例的存储器电路包括：第一晶体管，包括第一源极/漏极，第二源极/漏极和第一栅电极; 第二晶体管，包括连接到第二源极/漏极的第三源极/漏极，第四源极/漏极和第二栅极; 第三晶体管和形成逆变器电路的第四晶体管，所述第三晶体管包括第五源极/漏极，第六源极/漏极和连接到所述第二源极/漏极的第三栅电极，所述第四晶体管包括第七 连接到第六源极/漏极的源极/漏极电极，连接到第二源极/漏极的第八源极/漏极电极和第四栅极电极; 以及连接到第六源极/漏极的输出端子。 第三晶体管和第四晶体管中的至少一个是自旋MOSFET，并且从输出端子发送反相器电路的输出。

公开(公告)号：US08576601B2

公开(公告)日：2013-11-05

申请号：US13403398

申请日：2012-02-23

申请人： Takao Marukame ,  Tomoaki Inokuchi ,  Hideyuki Sugiyama ,  Mizue Ishikawa ,  Yoshiaki Saito ,  Atsuhiro Kinoshita ,  Kosuke Tatsumura

发明人： Takao Marukame ,  Tomoaki Inokuchi ,  Hideyuki Sugiyama ,  Mizue Ishikawa ,  Yoshiaki Saito ,  Atsuhiro Kinoshita ,  Kosuke Tatsumura

IPC分类号： G11C15/02

CPC分类号： G11C15/02 ,  G11C11/161 ,  G11C15/046 ,  H01L27/228

摘要： One embodiment provides a content addressable memory, including: a pair of spin MOSFETs including: a first spin MOSFET whose magnetization state is set in accordance with stored data; and a second spin MOSFET whose magnetization state is set in accordance with the stored data, the second spin MOSFET being connected in parallel with the first spin MOSFET; a first wiring configured to apply a gate voltage so that any one of the first spin MOSFET and the second spin MOSFET becomes electrically conductive in accordance with search data; and a second wiring configured to apply a current to both of the first spin MOSFET and the second spin MOSFET.

摘要翻译： 一个实施例提供一种内容可寻址存储器，包括：一对自旋MOSFET，其包括：第一自旋MOSFET，其磁化状态根据存储的数据设置; 以及第二自旋MOSFET，其磁化状态根据存储的数据设定，第二自旋MOSFET与第一自旋MOSFET并联连接; 第一布线，被配置为施加栅极电压，使得第一自旋MOSFET和第二自旋MOSFET中的任何一个根据搜索数据变为导电; 以及配置为向第一自旋MOSFET和第二自旋MOSFET两者施加电流的第二布线。

公开(公告)号：US20130077388A1

公开(公告)日：2013-03-28

申请号：US13532981

申请日：2012-06-26

申请人： Tomoaki Inokuchi ,  Takao Marukame ,  Mizue Ishikawa ,  Hideyuki Sugiyama ,  Masahiko Nakayama ,  Tatsuya Kishi ,  Hiroaki Yoda ,  Yoshiaki Saito

发明人： Tomoaki Inokuchi ,  Takao Marukame ,  Mizue Ishikawa ,  Hideyuki Sugiyama ,  Masahiko Nakayama ,  Tatsuya Kishi ,  Hiroaki Yoda ,  Yoshiaki Saito

IPC分类号： G11C11/16

CPC分类号： G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  H01L27/224 ,  H01L29/0657 ,  H01L29/66984 ,  H01L43/08

摘要： One embodiment provides a magnetic memory element, including: a first ferromagnetic layer whose magnetization is variable; a second ferromagnetic layer which has a first band split into a valence band and a conduction band and a second band being continuous at least from the valence band to the conduction band; and a nonmagnetic layer provided between the first ferromagnetic layer and the second ferromagnetic layer.

摘要翻译： 一个实施例提供了一种磁存储元件，包括：其磁化可变的第一铁磁层; 第二铁磁层，其具有分裂成价带的第一带和导带，以及至少从价带至导带连续的第二带; 以及设置在第一铁磁层和第二铁磁层之间的非磁性层。

公开(公告)号：US20130075843A1

公开(公告)日：2013-03-28

申请号：US13526007

申请日：2012-06-18

申请人： Tomoaki Inokuchi ,  Takao Marukame ,  Tetsufumi Tanamoto ,  Hideyuki Sugiyama ,  Mizue Ishikawa ,  Yoshiaki Saito

发明人： Tomoaki Inokuchi ,  Takao Marukame ,  Tetsufumi Tanamoto ,  Hideyuki Sugiyama ,  Mizue Ishikawa ,  Yoshiaki Saito

IPC分类号： H01L29/82

CPC分类号： H01L43/08 ,  H01L29/66984

摘要： A spin transistor according to an embodiment includes: a first magnetic layer formed above a substrate and serving as one of a source and a drain; an insulating film having a lower face facing to an upper face of the first magnetic layer, an upper face opposed to the lower face, and a side face different from the lower and upper faces, the insulating film being formed on the upper face of the first magnetic layer and serving as a channel; a second magnetic layer formed on the upper face of the insulating film and serving as the other one of the source and the drain; a gate electrode formed along the side face of the insulating film; and a gate insulating film located between the gate electrode and the side face of the insulating film.

摘要翻译： 根据实施例的自旋晶体管包括：形成在衬底上并用作源极和漏极之一的第一磁性层; 绝缘膜，其具有面向第一磁性层的上表面的下表面，与下表面相对的上表面，以及不同于下表面和上表面的侧面，绝缘膜形成在第一磁性层的上表面上 第一磁性层，作为通道; 第二磁性层，形成在绝缘膜的上表面上并用作源极和漏极中的另一个; 沿绝缘膜的侧面形成的栅电极; 以及位于绝缘膜的栅极和侧面之间的栅极绝缘膜。

公开(公告)号：US08385114B2

公开(公告)日：2013-02-26

申请号：US13360904

申请日：2012-01-30

申请人： Hideyuki Sugiyama ,  Tetsufumi Tanamoto ,  Takao Marukame ,  Mizue Ishikawa ,  Tomoaki Inokuchi ,  Yoshiaki Saito

发明人： Hideyuki Sugiyama ,  Tetsufumi Tanamoto ,  Takao Marukame ,  Mizue Ishikawa ,  Tomoaki Inokuchi ,  Yoshiaki Saito

IPC分类号： G11C11/14

CPC分类号： G11C14/0081

摘要： Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.

摘要翻译： 某些实施例提供了其中第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管串联连接的非易失性存储器电路，第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管串联连接 第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管的栅极连接，第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管的栅极连接，第一n沟道晶体管包括 连接到第一p沟道晶体管的漏极和第二p沟道晶体管的栅极的漏极，第二n沟道晶体管包括连接到第二p沟道晶体管的漏极和第一p沟道晶体管的栅极的漏极 p沟道晶体管，第一和第二n沟道晶体管的栅极连接。

公开(公告)号：US07943974B2

公开(公告)日：2011-05-17

申请号：US12662100

申请日：2010-03-31

申请人： Mizue Ishikawa ,  Yoshiaki Saito ,  Hideyuki Sugiyama ,  Tomoaki Inokuchi

发明人： Mizue Ishikawa ,  Yoshiaki Saito ,  Hideyuki Sugiyama ,  Tomoaki Inokuchi

IPC分类号： H01L29/76 ,  H01L29/94

CPC分类号： G11B5/3909 ,  B82Y10/00 ,  B82Y25/00 ,  G11B5/3929 ,  G11C11/161 ,  G11C11/1659 ,  H01L27/228 ,  H01L29/66984 ,  H01L43/08

摘要： A spin MOS field effect transistor includes a source electrode and a drain electrode each having a structure obtained by stacking an impurity diffusion layer, a (001)-oriented MgO layer and a Heusler alloy. The impurity diffusion layer is formed in a surface region of a semiconductor layer. The (001)-oriented MgO layer is formed on the impurity diffusion layer. The Heusler alloy is formed on the MgO layer.

摘要翻译： 自旋MOS场效应晶体管包括源电极和漏电极，每个源极和漏极具有通过层叠杂质扩散层，（001）取向的MgO层和Heusler合金而获得的结构。 杂质扩散层形成在半导体层的表面区域中。 （001）取向的MgO层形成在杂质扩散层上。 Heusler合金形成在MgO层上。

公开(公告)号：US20100244897A1

公开(公告)日：2010-09-30

申请号：US12725561

申请日：2010-03-17

申请人： Yoshiaki Saito ,  Hideyuki Sugiyama ,  Tomoaki Inokuchi ,  Takao Marukame ,  Mizue Ishikawa

发明人： Yoshiaki Saito ,  Hideyuki Sugiyama ,  Tomoaki Inokuchi ,  Takao Marukame ,  Mizue Ishikawa

IPC分类号： H03K19/173 ,  H01L29/78

CPC分类号： H01L43/02 ,  B01D53/1493 ,  B01D53/62 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1695 ,  H01L28/00 ,  H01L29/0843 ,  H01L29/0895 ,  H01L29/66984 ,  H01L43/10

摘要： A spin MOSFET includes: a first ferromagnetic layer provided on an upper face of a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on an upper face of the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower face and the upper face; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on an upper face of the second ferromagnetic layer; a third ferromagnetic layer provided on an upper face of the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween.

摘要翻译： 自旋MOSFET包括：设置在半导体衬底的上表面上并且具有与膜平面垂直的固定磁化方向的第一铁磁层; 设置在所述第一铁磁层的上表面上的半导体层，包括与所述第一铁磁层的上表面相对的下表面，与所述下表面相对的上表面，以及与所述下表面和所述上表面不同的侧面 ; 第二铁磁层，设置在所述半导体层的上表面上，并且具有与膜平面垂直的可变磁化方向; 设置在所述第二铁磁层的上表面上的第一隧道势垒; 设置在所述第一隧道屏障的上表面上的第三铁磁层; 设置在所述半导体层的侧面上的栅极绝缘膜; 以及设置在半导体层的侧面上的栅电极，其间插入有栅极绝缘膜。

公开(公告)号：US07796423B2

公开(公告)日：2010-09-14

申请号：US12339638

申请日：2008-12-19

申请人： Hideyuki Sugiyama ,  Mizue Ishikawa ,  Tomoaki Inokuchi ,  Yoshiaki Saito ,  Tetsufumi Tanamoto

发明人： Hideyuki Sugiyama ,  Mizue Ishikawa ,  Tomoaki Inokuchi ,  Yoshiaki Saito ,  Tetsufumi Tanamoto

IPC分类号： G11C11/00

CPC分类号： H03K19/1733 ,  G11C11/161 ,  G11C11/1675 ,  G11C11/1697

摘要： It is made possible to provide a reconfigurable logic circuit with which high integration can be achieved. A reconfigurable logic circuit includes: a multiplexer which includes a plurality of spin MOSFETs each having a source and drain containing a magnetic material, and a selecting portion including a plurality of MOSFETs and selecting a spin MOSFET from the plurality of spin MOSFETs, based on control data transmitted from control lines; a determining circuit which determines whether magnetization of the magnetic material of the source and drain of a selected spin MOSFET, which is selected by the selecting portion, is in a first state or in a second state; and a first and second write circuits which put the magnetization of the magnetic material of the source and drain of the selected spin MOSFET into the second and first states respectively by supplying a write current flowing between the source and drain of the selected spin MOSFET.

摘要翻译： 可以提供可实现高集成度的可重构逻辑电路。 可重配置逻辑电路包括：多路复用器，其包括多个自旋MOSFET，每个具有包含磁性材料的源极和漏极，以及包括多个MOSFET的选择部分，并且基于控制从多个自旋MOSFET中选择自旋MOSFET 从控制线传输的数据; 确定电路，其确定由选择部分选择的所选择的自旋MOSFET的源极和漏极的磁性材料的磁化是处于第一状态还是处于第二状态; 以及第一和第二写入电路，其通过提供在选定的自旋MOSFET的源极和漏极之间流动的写入电流，将所选自旋MOSFET的源极和漏极的磁性材料的磁化分别置于第二和第一状态。

公开(公告)号：US20100072528A1

公开(公告)日：2010-03-25

申请号：US12561475

申请日：2009-09-17

申请人： Tomoaki INOKUCHI ,  Takao Marukame ,  Mizue Ishikawa ,  Hideyuki Sugiyama ,  Yoshiaki Saito

发明人： Tomoaki INOKUCHI ,  Takao Marukame ,  Mizue Ishikawa ,  Hideyuki Sugiyama ,  Yoshiaki Saito

IPC分类号： H01L29/82

CPC分类号： H01L29/66984 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693

摘要： A spin transistor includes a first ferromagnetic layer, a second ferromagnetic layer, a semiconductor layer between the first and second ferromagnetic layers, and a gate electrode on or above a surface of the semiconductor layer, the surface being between the first and second ferromagnetic layers. The first ferromagnetic layer comprises a ferromagnet which has a first minority spin band located at a high energy side and a second minority spin band located at a low energy side, and has a Fermi level in an area of the high energy side higher than a middle of a gap between the first and second minority spin bands.

摘要翻译： 自旋晶体管包括第一铁磁层，第二铁磁层，第一和第二铁磁层之间的半导体层，以及在半导体层的表面上或上方的栅电极，该表面位于第一和第二铁磁层之间。 第一铁磁层包括具有位于高能侧的第一少数自旋带和位于低能侧的第二少数自旋带的铁磁体，并且在高能量侧的区域中的费米能级高于中间 第一和第二少数自旋带之间的间隙。