Display device and method of manufacturing the same

    公开(公告)号:US11824061B2

    公开(公告)日:2023-11-21

    申请号:US16783002

    申请日:2020-02-05

    CPC classification number: H01L27/1225 H01L27/124 H01L27/127 H01L27/1251

    Abstract: A display device includes a plurality of pixels respectively coupled to scan lines and data lines intersecting the scan lines, wherein at least some of the pixels includes a driving transistor including a substrate, a first insulating layer disposed on the substrate, a first active layer disposed on the first insulating layer, a first gate electrode disposed on the first active layer, and a first source electrode and a first drain electrode electrically connected to the first active layer, the first drain electrode being spaced apart from the first source electrode by a first distance, and a switching transistor including a second gate electrode disposed between the substrate and the first insulating layer, a second active layer disposed on the same layer as the first active layer, and a second source electrode and a second drain electrode electrically connected to the second active layer, the second drain electrode being spaced apart from the second source electrode by a second distance different from the first distance.

    Display device and method of fabricating the same

    公开(公告)号:US11626426B2

    公开(公告)日:2023-04-11

    申请号:US17109601

    申请日:2020-12-02

    Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.

    Display device and method of manufacturing the same

    公开(公告)号:US11594559B2

    公开(公告)日:2023-02-28

    申请号:US17157184

    申请日:2021-01-25

    Abstract: A display device may include a first gate electrode disposed on a substrate, a buffer layer disposed on the first gate electrode, a first active pattern on the buffer layer, the first active pattern overlapping the first gate electrode and including an oxide semiconductor, a second active pattern on the buffer layer, spaced apart from the first active pattern, and including an oxide semiconductor, the second active pattern including a channel region, and a source region and a drain region, a source pattern and a drain pattern respectively at ends of the first active pattern, a first insulation pattern disposed on the first active pattern, a second insulation pattern disposed on the channel region, a first oxygen supply pattern on the first insulation pattern, a second oxygen supply pattern on the second insulation pattern, and a second gate electrode on the second oxygen supply pattern.

    Display device and method for manufacturing the same

    公开(公告)号:US11469283B2

    公开(公告)日:2022-10-11

    申请号:US16952762

    申请日:2020-11-19

    Abstract: A display device is provided. The display device includes a substrate, a first active layer of a first transistor and a second active layer of a second transistor which are disposed on the substrate, a first gate insulating layer disposed on the first active layer, an oxide layer disposed on the first gate insulating layer and including an oxide semiconductor, a first gate electrode disposed on the oxide layer, a second gate insulating layer disposed on the first gate electrode and the second active layer, and a second gate electrode which overlaps the second active layer in a thickness direction of the substrate and is disposed on the second gate insulating layer, where the oxide layer overlaps the first active layer and does not overlap the second active layer in the thickness direction.

    Display device for driving at high speed

    公开(公告)号:US11430859B2

    公开(公告)日:2022-08-30

    申请号:US16885598

    申请日:2020-05-28

    Abstract: A display device includes a first pixel, a second pixel, a first data line connected to the first pixel, and a second data line connected to the second pixel. Each of the first pixel and the second pixel includes a transistor including a conductive layer, a semiconductor layer on the conductive layer, a gate electrode on the semiconductor layer, and a source/drain electrode connected to the semiconductor layer, a capacitor including a first capacitor electrode in a same layer as the gate electrode and a second capacitor electrode on the first capacitor electrode, and a light emitting device on the transistor and the capacitor. The first data line is in a same layer as the source/drain electrode, and the second data line is in a same layer as one of the conductive layer and the second capacitor electrode.

    Thin film transistor and display device including the same
    38.
    发明授权
    Thin film transistor and display device including the same 有权
    薄膜晶体管和包括其的显示装置

    公开(公告)号:US09553197B2

    公开(公告)日:2017-01-24

    申请号:US14931172

    申请日:2015-11-03

    Abstract: A thin film transistor includes: a lower gate electrode on a substrate; a gate insulating layer on the lower gate electrode; a first semiconductor layer on the gate insulating layer; a source electrode on the first semiconductor layer, a drain electrode on the first semiconductor layer and spaced apart form the source electrode; a second semiconductor layer on a channel region of the first semiconductor layer and on the source electrode and the drain electrode; a passivation layer on the second semiconductor layer; and an upper gate electrode disposed on the passivation layer, corresponding to the channel region.

    Abstract translation: 薄膜晶体管包括:在基板上的下栅电极; 下栅电极上的栅极绝缘层; 栅极绝缘层上的第一半导体层; 在所述第一半导体层上的源电极,在所述第一半导体层上的漏电极,并且与所述源电极间隔开; 在所述第一半导体层的沟道区上以及所述源电极和所述漏电极上的第二半导体层; 第二半导体层上的钝化层; 以及对应于沟道区域设置在钝化层上的上栅电极。

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