公开(公告)号：US08996961B2

公开(公告)日：2015-03-31

申请号：US13798696

申请日：2013-03-13

Applicant: Seagate Technology LLC

Inventor： Zhengang Chen ,  Jeremy Werner ,  Earl T. Cohen ,  Ning Chen ,  AbdelHakim S. Alhussien ,  Erich F. Haratsch

IPC: G11C29/10 ,  G06F11/10

CPC classification number: G06F11/1012

Abstract: An apparatus having an interface and a circuit is shown. The interface is coupled to a memory that is nonvolatile. The circuit is configured to (i) read a plurality of codewords from a block in the memory based on a program/erase count associated with the block, (ii) count a number of iterations used to decode the codewords and (iii) decrease a code rate of an error correction coding used to program the block in response to the number of iterations exceeding a threshold.

Abstract translation: 示出了具有接口和电路的装置。 该接口耦合到非易失性存储器。 电路被配置为（i）基于与该块相关联的编程/擦除计数，从存储器中的块读取多个码字，（ii）对用于解码码字的迭代次数进行计数，以及（iii）减少一个 用于响应于超过阈值的迭代次数来编程块的纠错编码的码率。

公开(公告)号：US11144389B2

公开(公告)日：2021-10-12

申请号：US16580361

申请日：2019-09-24

Applicant: Seagate Technology LLC

Inventor： Jeremy Isaac Nathaniel Werner ,  Earl T. Cohen

IPC: G06F11/10 ,  G06F3/06 ,  G06F11/20 ,  G11C29/52

Abstract: Methods, systems and computer-readable storage media for requesting programming of N portions of a plurality of non-volatile memories (NVMs) in accordance with received data. Redundancy information sufficient to recover from failures of M of the N portions for which programming was requested is updated in response to the requesting programming. Upon identifying one to M of the N portions that have failed the programming, re-programming of the one to M of the N portions is requested in accordance with data calculated based at least in part on the redundancy information.

公开(公告)号：US10230406B2

公开(公告)日：2019-03-12

申请号：US14594165

申请日：2015-01-11

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Hao Zhong ,  Yan Li ,  Radoslav Danilak ,  Earl T. Cohen

IPC: H03M13/00 ,  H03M13/37 ,  G11C11/56 ,  G11C16/10 ,  G11C16/26 ,  H03M13/11 ,  G06F11/10 ,  G06F3/06 ,  G11C29/52

Abstract: A Solid-State Disk (SSD) controller uses LDPC decoding to enable flash memory accesses with improved latency and/or error correction capabilities. With SLC flash memory having a BER less than a predetermined value, the SSD controller uses a 1-bit read (single read) hard-decision LDPC decoder to access the flash memory. If the hard-decision LDPC decoder detects an uncorrectable error, then the SSD controller uses a 1.5-bit read (two reads) erasure-decision LDPC decoder to access the flash memory. With flash memory having a raw BER between two other predetermined values, the SSD controller omits the use of the hard-decision LDPC decoder and uses only the erasure-decision LDPC decoder to access the flash memory. Variations of the SSD controller similarly access MLC flash memory. Some SSD controllers dynamically switch between hard-decision and erasure-based decoders based on dynamic decoder selection criteria.

公开(公告)号：US10073734B2

公开(公告)日：2018-09-11

申请号：US14697904

申请日：2015-04-28

Applicant: Seagate Technology LLC

Inventor： Erich F. Haratsch ,  Jeremy Werner ,  Zhengang Chen ,  Earl T. Cohen ,  Yunxiang Wu ,  Ning Chen

IPC: G11C29/00 ,  G06F11/10 ,  H03M13/37 ,  H03M13/00 ,  G11C29/52 ,  H03M13/45 ,  H03M13/11 ,  H03M13/39 ,  H03M13/41

CPC classification number: G06F11/1068 ,  G06F11/1012 ,  G11C29/52 ,  H03M13/1102 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3707 ,  H03M13/3905 ,  H03M13/41 ,  H03M13/45 ,  H03M13/6561

Abstract: An apparatus comprising a memory and a controller. The memory may be configured to store data. The controller may process a plurality of input/output requests to read/write to/from the memory. The controller may generate read data by performing a hard-decision decode on a codeword received from the memory. If the hard-decision decode fails, the controller may enter an error-recovery process comprising a plurality of recovery procedures. At least one of the recovery procedures may apply an inter-cell interference cancellation technique. The error-recovery process may (a) determine parameters for a soft-decision decode by performing one of the recovery procedures on the codeword, (b) execute the soft-decision decode using the parameters from the recovery procedure performed to generate the read data and (c) if the soft-decision decode fails, repeat (a) and (b) using a next one of the recovery procedures.

公开(公告)号：US20180232179A1

公开(公告)日：2018-08-16

申请号：US15946891

申请日：2018-04-06

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen

IPC: G06F3/06

Abstract: Methods for determining, by a storage controller, a read unit address and encoded length information of one of the plurality of read units of a non-volatile memory (NVM) based at least in part on a page address of a particular one of a plurality of pages in a storage space address. The encoded length information may be decoded. The storage controller may determine a span specifying an integer number of the read units and a length in units having a finer granularity than the read units based at least in part on the page address. The storage controller may read data associated with the particular page based at least in part on the read unit address and the span. The storage controller may update space usage information of the NVM based at least in part on the length.

公开(公告)号：US10048879B2

公开(公告)日：2018-08-14

申请号：US15298636

申请日：2016-10-20

Applicant: Seagate Technology LLC

Inventor： Zhengang Chen ,  Earl T. Cohen ,  Alex G. Tang

IPC: G06F3/06 ,  G11C7/24 ,  G11C8/20 ,  G11C11/56 ,  G11C16/10 ,  G11C16/22 ,  G11C16/26

Abstract: A method for recovery after a power failure. The method generally includes a step of searching at least some of a plurality of pages of a memory to find a first erased page in response to an unsafe power down. A step may move stored data located between a particular word line in the memory that contains the first erased page and a previous word line that is at least two word lines before the particular word line. Another step may write new data starting in a subsequent word line that is the at least two word lines after the particular word line that contains the first erased page.

公开(公告)号：US09817708B2

公开(公告)日：2017-11-14

申请号：US15297574

申请日：2016-10-19

Applicant: Seagate Technology LLC

Inventor： AbdelHakim S. Alhussien ,  Earl T. Cohen ,  Erich F. Haratsch

IPC: H03M13/00 ,  G06F11/07 ,  G06F11/10 ,  G11B20/18 ,  G06F11/30 ,  H03M13/11 ,  H03M13/37

CPC classification number: G06F11/076 ,  G06F11/0727 ,  G06F11/079 ,  G06F11/1068 ,  G06F11/3037 ,  G06F11/3065 ,  G11B20/1833 ,  G11B2020/185 ,  H03M13/1108 ,  H03M13/1128 ,  H03M13/114 ,  H03M13/3753 ,  H03M13/612 ,  H03M13/6516

Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of read/write operations to/from the memory, receive a codeword from the memory, generate a plurality of syndromes of the codeword at a plurality of possible code rates, generate a plurality of count values by counting a number of unsatisfied parity checks in each of the plurality of syndromes, generate a plurality of normalized values by dividing the plurality of count values by a plurality of lengths of the plurality of possible code rates respectively, and determine a bit error rate value of the memory based on a lowest value among the plurality of normalized values.

公开(公告)号：US20170206979A1

公开(公告)日：2017-07-20

申请号：US15472793

申请日：2017-03-29

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Hao Zhong

IPC: G11C16/34 ,  G11C16/28

CPC classification number: G11C16/3495 ,  G01R19/0084 ,  G11C7/14 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/28 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/349 ,  G11C29/021 ,  G11C29/028

Abstract: Methods, systems and computer-readable storage media for selecting a retention drift predictor scheme, reading retention drift history associated with reference cells of a plurality of groups of pages of a non-volatile memory (NVM), and predicting values for an optimal read threshold voltage of at least some of the plurality of groups of pages. The predicting of values for an optimal read threshold voltage may be based at least on the selected retention drift predictor scheme and the read retention drift history.

公开(公告)号：US20170160967A1

公开(公告)日：2017-06-08

申请号：US15439459

申请日：2017-02-22

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Robert F. Quinn

IPC: G06F3/06 ,  G06F12/0842

CPC classification number: G06F3/0619 ,  G06F3/0607 ,  G06F3/0613 ,  G06F3/0629 ,  G06F3/065 ,  G06F3/067 ,  G06F3/0685 ,  G06F3/0689 ,  G06F11/1076 ,  G06F12/0842 ,  G06F2211/1028 ,  G06F2212/62 ,  G11B20/1803

Abstract: The disclosure is directed to protecting data of a scalable storage system. A scalable storage system includes a plurality of nodes, each of the nodes having directly-attached storage (DAS), such as one or more hard-disk drives and/or solid-state disk drives. The nodes are coupled via an inter-node communication network, and a substantial entirety of the DAS is globally accessible by each of the nodes. The DAS is protected utilizing intra-node protection to keep data stored in the DAS reliable and globally accessible in presence of a failure within one of the nodes. The DAS is further protected utilizing inter-node protection to keep data stored in the DAS reliable and globally accessible if at least one of the nodes fails.

公开(公告)号：US09552290B2

公开(公告)日：2017-01-24

申请号：US14602481

申请日：2015-01-22

Applicant: Seagate Technology LLC

Inventor： Leonid Baryudin ,  Alex G. Tang ,  Earl T. Cohen

IPC: G06F11/00 ,  G06F12/02 ,  G06F11/07 ,  G06F11/10 ,  G11C29/04 ,  G11C16/34 ,  G11C29/00

CPC classification number: G06F12/0246 ,  G06F11/0793 ,  G06F11/1008 ,  G06F12/02 ,  G06F2211/109 ,  G06F2212/7205 ,  G11C16/3418 ,  G11C29/82 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of R-blocks. The controller is coupled to the non-volatile memory. The controller is configured to (i) write data using the R-blocks as a unit of allocation and (ii) perform recycling operations selectively on either an entire one of the R-blocks or a portion less than all of one of the R-blocks.

Abstract translation: 一种装置包括非易失性存储器和控制器。 非易失性存储器包括多个R块。 控制器耦合到非易失性存储器。 控制器被配置为（i）使用R块作为分配单元来写入数据，以及（ii）选择性地在R块中的整个R块或小于全部R块中的一部分执行再循环操作 块。