公开(公告)号：US09831101B2

公开(公告)日：2017-11-28

申请号：US15149464

申请日：2016-05-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Junichiro Sakata ,  Hiroki Ohara ,  Shunpei Yamazaki

IPC: H01L21/00 ,  H01L21/477 ,  H01L21/02 ,  H01L21/383 ,  H01L21/46 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L21/477 ,  H01L21/02565 ,  H01L21/02664 ,  H01L21/383 ,  H01L21/46 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.

公开(公告)号：US09768281B2

公开(公告)日：2017-09-19

申请号：US14666753

申请日：2015-03-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki Ohara ,  Toshinari Sasaki

IPC: H01L21/324 ,  H01L29/66 ,  C01G15/00 ,  C01G45/00 ,  C01G49/00 ,  C01G51/00 ,  C01G53/00 ,  H01L27/12 ,  H01L29/786 ,  H01L21/441 ,  H01L21/477 ,  H01L21/02

CPC classification number: H01L29/66969 ,  C01G15/006 ,  C01G45/006 ,  C01G49/009 ,  C01G51/006 ,  C01G53/006 ,  C01P2002/52 ,  C01P2006/40 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02183 ,  H01L21/02266 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/441 ,  H01L21/477 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.

公开(公告)号：US09741779B2

公开(公告)日：2017-08-22

申请号：US15161363

申请日：2016-05-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichiro Sakata ,  Hiroki Ohara ,  Hideaki Kuwabara

IPC: H01L29/00 ,  H01L27/00 ,  H01L27/32 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  G06F1/16 ,  H01L29/04 ,  H01L29/24 ,  H04B1/16 ,  H01L21/02

CPC classification number: H01L27/3262 ,  G06F1/163 ,  H01L21/02614 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L29/78696 ,  H04B1/16

Abstract: One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.

公开(公告)号：US09412768B2

公开(公告)日：2016-08-09

申请号：US15057445

申请日：2016-03-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Junichiro Sakata ,  Hiroki Ohara ,  Shunpei Yamazaki

IPC: H01L27/12

CPC classification number: H01L29/66969 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.

公开(公告)号：US09331208B2

公开(公告)日：2016-05-03

申请号：US14635199

申请日：2015-03-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Masashi Tsubuku ,  Kengo Akimoto ,  Hiroki Ohara ,  Tatsuya Honda ,  Takatsugu Omata ,  Yusuke Nonaka ,  Masahiro Takahashi ,  Akiharu Miyanaga

IPC: H01L29/88 ,  H01L29/786 ,  H01L29/04 ,  H01L29/10

CPC classification number: H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm−1 and less than or equal to 0.7 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm−1 and less than or equal to 4.1 nm−1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm−1 and less than or equal to 1.4 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm−1 and less than or equal to 7.1 nm−1.

公开(公告)号：US09299807B2

公开(公告)日：2016-03-29

申请号：US14867636

申请日：2015-09-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Junichiro Sakata ,  Hiroki Ohara ,  Shunpei Yamazaki

IPC: H01L29/24 ,  H01L29/66 ,  H01L29/786 ,  H01L29/423 ,  H01L27/12

CPC classification number: H01L29/66969 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.

公开(公告)号：US09269794B2

公开(公告)日：2016-02-23

申请号：US13969808

申请日：2013-08-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroki Ohara ,  Junichiro Sakata ,  Toshinari Sasaki ,  Miyuki Hosoba

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L27/127 ,  H01L21/477 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1274 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78693

Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.

公开(公告)号：US20140302622A1

公开(公告)日：2014-10-09

申请号：US14311902

申请日：2014-06-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime Kimura ,  Hiroki Ohara ,  Masayo Kayama

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/7869

Abstract: A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer. Each of the layers of the first thin film transistor has a light-transmitting property. Materials of the gate electrode layer, the source electrode layer and the drain electrode layer of the first thin film transistor are different from those of the second transistor, and each of the resistances of the second thin film transistor is lower than that of the first thin film transistor.

Abstract translation: 半导体器件包括具有第一薄膜晶体管的像素部分和具有第二薄膜晶体管的驱动器电路。 第一薄膜晶体管和第二薄膜晶体管中的每一个包括栅极电极层，栅极绝缘层，半导体层，源极电极层和漏极电极层。 第一薄膜晶体管的每个层具有透光性。 第一薄膜晶体管的栅极电极层，源电极层和漏电极层的材料与第二晶体管的材料不同，第二薄膜晶体管的电阻低于第一薄膜晶体管的电阻 薄膜晶体管。

公开(公告)号：US08822990B2

公开(公告)日：2014-09-02

申请号：US13751189

申请日：2013-01-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroki Ohara ,  Toshinari Sasaki ,  Kosei Noda ,  Hideaki Kuwabara

IPC: H01L29/10 ,  H01L29/786 ,  H01L27/12 ,  H01L29/51

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/136227 ,  G02F1/136277 ,  G02F1/1368 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/24 ,  H01L29/517 ,  H01L29/78609 ,  H01L29/7869

Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.

Abstract translation: 目的在于提供一种半导体器件，其具有可以充分降低布线之间的寄生电容的结构。 用作沟道保护层的氧化物绝缘层形成在与栅电极层重叠的氧化物半导体层的一部分上。 在与氧化物绝缘层的形成相同的步骤中，形成覆盖氧化物半导体层的周边部分的氧化物绝缘层。 设置覆盖氧化物半导体层的周边部分的氧化物绝缘层以增加栅极电极层与形成在栅电极层的上方或周围的布线层之间的距离，从而降低寄生电容。

公开(公告)号：US08759132B2

公开(公告)日：2014-06-24

申请号：US13692723

申请日：2012-12-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime Kimura ,  Hiroki Ohara ,  Masayo Kayama

IPC: H01L21/00

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/7869

Abstract: A semiconductor device includes a pixel portion having a first thin film transistor and a driver circuit having a second thin film transistor. Each of the first thin film transistor and the second thin film transistor includes a gate electrode layer, a gate insulating layer, a semiconductor layer, a source electrode layer, and a drain electrode layer. Each of the layers of the first thin film transistor has a light-transmitting property. Materials of the gate electrode layer, the source electrode layer and the drain electrode layer of the first thin film transistor are different from those of the second transistor, and each of the resistances of the second thin film transistor is lower than that of the first thin film transistor.

Abstract translation: 半导体器件包括具有第一薄膜晶体管的像素部分和具有第二薄膜晶体管的驱动器电路。 第一薄膜晶体管和第二薄膜晶体管中的每一个包括栅极电极层，栅极绝缘层，半导体层，源极电极层和漏极电极层。 第一薄膜晶体管的每个层具有透光性。 第一薄膜晶体管的栅极电极层，源电极层和漏电极层的材料与第二晶体管的材料不同，第二薄膜晶体管的电阻低于第一薄膜晶体管的电阻 薄膜晶体管。