公开(公告)号：US20240210497A1

公开(公告)日：2024-06-27

申请号：US18146447

申请日：2022-12-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Daiki Komatsu ,  Masamitsu Matsuura

IPC: G01R33/07 ,  H10N52/00 ,  H10N52/01

CPC classification number: G01R33/077 ,  H10N52/01 ,  H10N52/101

Abstract: An integrated circuit (IC) package comprises a semiconductor die having a first surface with a Hall-effect sensor circuit and a second surface. A plurality of through substrate vias (TSV) each having a metal layer extend from the first surface of the semiconductor die to the second surface. The IC package includes a portion of a leadframe having a first set of leads and a second set of leads. The first set of leads provide a field generating current path for directing a magnetic field toward the Hall-effect sensor circuit. The second set of leads are attached to bond pads on the semiconductor die. A first side of an insulator is attached to the leadframe using a die attach material, and a second side of the insulator is attached to the first side of the semiconductor die using a bonding material.

公开(公告)号：US11942384B2

公开(公告)日：2024-03-26

申请号：US17515234

申请日：2021-10-29

Applicant: Texas Instruments Incorporated

Inventor： Makoto Shibuya ,  Masamitsu Matsuura ,  Kengo Aoya ,  Hideaki Matsunaga ,  Anindya Poddar

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L23/3107 ,  H01L23/4952 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/16245 ,  H01L2224/48245

Abstract: A semiconductor package including a leadframe has a plurality of leads, and a semiconductor die including bond pads attached to the leadframe with the bond pads electrically coupled to the plurality of leads. The semiconductor die includes a substrate having a semiconductor surface including circuitry having nodes coupled to the bond pads. A mold compound encapsulates the semiconductor die. The mold compound is interdigitated having alternating extended mold regions over the plurality of leads and recessed mold regions in between adjacent ones of the plurality of leads.

公开(公告)号：US11923320B2

公开(公告)日：2024-03-05

申请号：US17139417

申请日：2020-12-31

Applicant: Texas Instruments Incorporated

Inventor： Tomoko Noguchi ,  Mutsumi Masumoto ,  Kengo Aoya ,  Masamitsu Matsuura

IPC: H01L21/78 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/48245

Abstract: A semiconductor device includes a semiconductor die having a top side surface comprising a semiconductor material including circuitry therein having bond pads connected to nodes in the circuitry, a bottom side surface, and sidewall surfaces between the top side surface and the bottom side surface. A metal coating layer including a bottom side metal layer is over the bottom side surface that extends continuously to a sidewall metal layer on the sidewall surfaces. The sidewall metal layer defines a sidewall plane that is at an angle from 10° to 60° relative to a normal projected from a bottom plane defined by the bottom side metal layer.

公开(公告)号：US20230275007A1

公开(公告)日：2023-08-31

申请号：US17683074

申请日：2022-02-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Makoto SHIBUYA ,  Masamitsu Matsuura ,  Kengo Aoya ,  Anindya Poddar

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/49555 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/85 ,  H01L21/565 ,  H01L21/4842 ,  H01L2224/48245 ,  H01L24/32 ,  H01L2224/32245 ,  H01L24/73 ,  H01L2224/73265

Abstract: In some examples, a semiconductor package comprises a semiconductor die including a device side having a circuit; a mold compound covering the semiconductor die and the circuit; a first lead coupled to the circuit, the first lead having a gullwing shape and emerging from the mold compound in a first horizontal plane, the first lead having a distal end coincident with a second horizontal plane lower than a bottom surface of the mold compound; and a second lead coupled to the circuit, the second lead emerging from the mold compound in the first horizontal plane, the second lead having a distal end coincident with a third horizontal plane higher than a topmost surface of the mold compound, the distal end of the second lead vertically coincident with the mold compound.

公开(公告)号：US10580715B2

公开(公告)日：2020-03-03

申请号：US16008119

申请日：2018-06-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Woochan Kim ,  Masamitsu Matsuura ,  Mutsumi Masumoto ,  Kengo Aoya ,  Hau Thanh Nguyen ,  Vivek Kishorechand Arora ,  Anindya Poddar

IPC: H01L23/10 ,  H01L23/34 ,  H01L23/367 ,  H01L21/56 ,  H01L23/00 ,  H01L23/373

Abstract: The disclosed principles provide a stress buffer layer between an IC die and heat spreader used to dissipate heat from the die. The stress buffer layer comprises distributed pairs of conductive pads and a corresponding set of conductive posts formed on the conductive pads. In one embodiment, the stress buffer layer may comprise conductive pads laterally distributed over non-electrically conducting surfaces of an embedded IC die to thermally conduct heat from the IC die. In addition, such a stress buffer layer may comprise conductive posts laterally distributed and formed directly on each of the conductive pads. Each of the conductive posts thermally conduct heat from respective conductive pads. In addition, each conductive post may have a lateral width less than a lateral width of its corresponding conductive pad. A heat spreader is then formed over the conductive posts which thermally conducts heat from the conductive posts through the heat spreader.