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77 条记录 (耗时 0.036 秒)

    NON-VOLATILE MEMORY WITH RESISTIVE ACCESS COMPONENT
    32.
    发明申请
    NON-VOLATILE MEMORY WITH RESISTIVE ACCESS COMPONENT 有权
    具有电阻访问组件的非易失性存储器

    公开(公告)号：US20110233504A1

    公开(公告)日：2011-09-29

    申请号：US13158794

    申请日：2011-06-13

    申请人： Jun Liu ,  Michael P. Violette

    发明人： Jun Liu ,  Michael P. Violette

    IPC分类号： H01L45/00 ,  H01L21/8239

    CPC分类号： H01L45/143 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/142 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1675

    摘要： Some embodiments include apparatus and methods having a memory element configured to store information and an access component configured to allow conduction of current through the memory element when a first voltage difference in a first direction across the memory element and the access component exceeds a first voltage value and to prevent conduction of current through the memory element when a second voltage difference in a second direction across the memory element and the access component exceeds a second voltage value, wherein the access component includes a material excluding silicon.

    摘要翻译： 一些实施例包括具有被配置为存储信息的存储器元件的设备和方法以及被配置为当存储元件和存取组件之间的第一方向上的第一电压差超过第一电压值时允许通过存储元件的电流的导通 并且当所述存储元件和所述存取组件之间的第二方向上的第二电压差超过第二电压值时，防止通过所述存储元件的电流传导，其中所述存取组件包括不包括硅的材料。

    Floating Body Field-Effect Transistors, And Methods Of Forming Floating Body Field-Effect Transistors
    33.
    发明申请
    Floating Body Field-Effect Transistors, And Methods Of Forming Floating Body Field-Effect Transistors 有权
    浮体场效应晶体管，以及形成浮体场效应晶体管的方法

    公开(公告)号：US20110193165A1

    公开(公告)日：2011-08-11

    申请号：US13088531

    申请日：2011-04-18

    申请人： Jun Liu ,  Michael P. Violette ,  Chandra Mouli ,  Howard Kirsch ,  Di Li

    发明人： Jun Liu ,  Michael P. Violette ,  Chandra Mouli ,  Howard Kirsch ,  Di Li

    IPC分类号： H01L27/12 ,  H01L21/336

    CPC分类号： H01L27/1203 ,  H01L27/10802 ,  H01L29/66477 ,  H01L29/7841 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In one embodiment, a floating body field-effect transistor includes a pair of source/drain regions having a floating body channel region received therebetween. The source/drain regions and the floating body channel region are received over an insulator. A gate electrode is proximate the floating body channel region. A gate dielectric is received between the gate electrode and the floating body channel region. The floating body channel region has a semiconductor SixGe(1-x)-comprising region. The floating body channel region has a semiconductor silicon-comprising region received between the semiconductor SixGe(1-x)-comprising region and the gate dielectric. The semiconductor SixGe(1-x)-comprising region has greater quantity of Ge than any quantity of Ge within the semiconductor silicon-comprising region. Other embodiments are contemplated, including methods of forming floating body field-effect transistors.

    摘要翻译： 在一个实施例中，浮体场效应晶体管包括一对在其间容纳浮体通道区的源/漏区。 源极/漏极区域和浮体沟道区域被接纳在绝缘体上。 栅电极靠近浮体通道区域。 门电介质被接收在栅电极和浮体沟道区之间。 浮体通道区域具有半导体SixGe（1-x）区域。 浮体通道区域具有容纳在半导体SixGe（1-x）区域和栅极电介质之间的半导体硅包覆区域。 半导体SixGe（1-x）含量区域在含半导体硅的区域内具有比任何Ge量更大的Ge量。 考虑了其他实施例，包括形成浮体场效应晶体管的方法。

    Floating body field-effect transistors, and methods of forming floating body field-effect transistors
    34.
    发明授权
    Floating body field-effect transistors, and methods of forming floating body field-effect transistors 有权
    浮体场效应晶体管，以及形成浮体场效应晶体管的方法

    公开(公告)号：US07948008B2

    公开(公告)日：2011-05-24

    申请号：US11925573

    申请日：2007-10-26

    申请人： Jun Liu ,  Michael P. Violette ,  Chandra Mouli ,  Howard Kirsch ,  Di Li

    发明人： Jun Liu ,  Michael P. Violette ,  Chandra Mouli ,  Howard Kirsch ,  Di Li

    IPC分类号： H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L27/01 ,  H01L27/12 ,  H01L31/0392

    CPC分类号： H01L27/1203 ,  H01L27/10802 ,  H01L29/66477 ,  H01L29/7841 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In one embodiment, a floating body field-effect transistor includes a pair of source/drain regions having a floating body channel region received therebetween. The source/drain regions and the floating body channel region are received over an insulator. A gate electrode is proximate the floating body channel region. A gate dielectric is received between the gate electrode and the floating body channel region. The floating body channel region has a semiconductor SixGe(1-x)-comprising region. The floating body channel region has a semiconductor silicon-comprising region received between the semiconductor SixGe(1-x)-comprising region and the gate dielectric. The semiconductor SixGe(1-x)-comprising region has greater quantity of Ge than any quantity of Ge within the semiconductor silicon-comprising region. Other embodiments are contemplated, including methods of forming floating body field-effect transistors.

    摘要翻译： 在一个实施例中，浮体场效应晶体管包括一对在其间容纳浮体通道区的源/漏区。 源极/漏极区域和浮体沟道区域被接纳在绝缘体上。 栅电极靠近浮体通道区域。 门电介质被接收在栅电极和浮体沟道区之间。 浮体通道区域具有半导体SixGe（1-x）区域。 浮体通道区域具有容纳在半导体SixGe（1-x）区域和栅极电介质之间的半导体硅包覆区域。 半导体SixGe（1-x）含量区域在含半导体硅的区域内具有比任何Ge量更大的Ge量。 考虑了其他实施例，包括形成浮体场效应晶体管的方法。

    3D MEMORY DEVICES DECODING AND ROUTING SYSTEMS AND METHODS
    35.
    发明申请
    3D MEMORY DEVICES DECODING AND ROUTING SYSTEMS AND METHODS 有权
    3D存储器件解码和路由系统和方法

    公开(公告)号：US20110051512A1

    公开(公告)日：2011-03-03

    申请号：US12547337

    申请日：2009-08-25

    申请人： Michael P. Violette

    发明人： Michael P. Violette

    IPC分类号： G11C16/04 ,  G11C5/02 ,  G11C8/00

    CPC分类号： G11C5/025 ,  G11C5/02 ,  G11C5/063 ,  G11C8/10 ,  H01L25/0657 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

    摘要： 3D memory devices are disclosed, such as those that include multiple two-dimensional tiers of memory cells. Each tier may be fully or partially formed over a previous tier to form a memory device having two or more tiers. Each tier may include strings of memory cells where each of the strings are coupled between a source select gate and a drain select gate such that each tier is decoded using the source/drain select gates. Additionally, the device can include a wordline decoder for each tier that is only coupled to the wordlines for that tier.

    摘要翻译： 公开了3D存储器件，例如包括多个二维存储器单元的那些器件。 每个层可以在先前层上完全或部分地形成，以形成具有两层或多层的存储器件。 每个层可以包括存储器单元串，其中每个串耦合在源极选择栅极和漏极选择栅极之间，使得使用源极/漏极选择栅极对每个层进行解码。 此外，该设备可以包括仅耦合到该层的字线的每个层的字线解码器。

    Phase change memory cell with constriction structure
    37.
    发明授权
    Phase change memory cell with constriction structure 有权
    具有收缩结构的相变记忆体

    公开(公告)号：US07852658B2

    公开(公告)日：2010-12-14

    申请号：US12049056

    申请日：2008-03-14

    申请人： Jun Liu ,  Michael P. Violette

    发明人： Jun Liu ,  Michael P. Violette

    IPC分类号： G11C11/00

    CPC分类号： H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1608 ,  H01L45/1675 ,  H01L45/1683

    摘要： Some embodiments include apparatus and methods having a memory cell with a first electrode and a second electrode, and a memory element directly contacting the first and second electrodes. The memory element may include a programmable portion having a material configured to change between multiple phases. The programmable portion may be isolated from the first electrode by a first portion of the memory element and isolated from the second electrode by a second portion of the memory element.

    摘要翻译： 一些实施例包括具有具有第一电极和第二电极的存储单元的设备和方法，以及直接接触第一和第二电极的存储元件。 存储元件可以包括具有被配置为在多个相之间变化的材料的可编程部分。 可编程部分可以通过存储元件的第一部分与第一电极隔离，并且通过存储元件的第二部分与第二电极隔离。