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    METHOD AND APPARATUS FOR CARBON FIBER FIXED ON A SUBSTRATE
    31.
    发明申请
    METHOD AND APPARATUS FOR CARBON FIBER FIXED ON A SUBSTRATE 审中-公开
    固定在基材上的碳纤维的方法和装置

    公开(公告)号：US20100173099A1

    公开(公告)日：2010-07-08

    申请号：US11926711

    申请日：2007-10-29

    申请人： Yasuyuki Saito ,  Junri Ishikura

    发明人： Yasuyuki Saito ,  Junri Ishikura

    IPC分类号： C23C14/28

    CPC分类号： B82Y30/00 ,  B01J19/088 ,  B01J2219/0809 ,  B01J2219/0839 ,  B82Y40/00 ,  C01B32/162 ,  D01F9/12 ,  Y10S977/89 ,  Y10S977/892

    摘要： Evaporation and condensation of carbon is effected by arc discharge between an anode formed of a carbon electrode and a cathode disposed facing the carbon electrode 2 in an inert gas atmosphere, and at the same time, the generated carbon nanotubes are dispersed into an inert gas and transported along with the inert gas through a transporting tube, and a jet of the inert gas containing the carbon nanotubes is emitted from a nozzle, thereby forming carbon nanotubes on a target substrate. This provides a carbon nanotube manufacturing method wherein carbon nanotubes are generated with a simple process, and the CNT patterning process is simplified by forming a carbon nanotube film on a substrate, thereby reducing costs.

    摘要翻译： 碳的蒸发和冷凝通过在由碳电极形成的阳极和在惰性气体气氛中与碳电极2相对设置的阴极之间的电弧放电来实现，同时将生成的碳纳米管分散在惰性气体中， 通过输送管与惰性气体一起输送，并且从喷嘴喷射含有碳纳米管的惰性气体的射流，从而在靶基板上形成碳纳米管。 这提供了通过简单的工艺生成碳纳米管的碳纳米管制造方法，并且通过在基板上形成碳纳米管膜来简化CNT图案化工艺，从而降低成本。

    Piezoelectric element and manufacturing method thereof, electronic device, ink jet device
    32.
    发明授权
    Piezoelectric element and manufacturing method thereof, electronic device, ink jet device 失效
    压电元件及其制造方法，电子装置，喷墨装置

    公开(公告)号：US07732997B2

    公开(公告)日：2010-06-08

    申请号：US11723224

    申请日：2007-03-19

    申请人： Junri Ishikura ,  Naoari Shibata ,  Katsumi Aoki ,  Yasuyuki Saito

    发明人： Junri Ishikura ,  Naoari Shibata ,  Katsumi Aoki ,  Yasuyuki Saito

    IPC分类号： H01L41/047

    CPC分类号： B41J2/161 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1632 ,  B41J2/1642 ,  B41J2/1646 ,  H01L41/0478 ,  H01L41/0973 ,  H01L41/316 ,  Y10T29/42 ,  Y10T29/49155

    摘要： Providing a manufacturing method of a piezoelectric element by which even if an electrode and a piezoelectric film stacked on a substrate are baked at a high temperature, the electrode does not oxidize and mutual diffusion between the substrate, the electrode and the piezoelectric film may be suppressed. The electrode is adapted as a laminated layer body which includes an electroconductive oxide layer, a mixture layer having an electroconductive oxide and electroconductive metal, and an electroconductive metal layer including the electroconductive metal from a substrate side, and the mixture layer above is adapted as a graded composition structure in which a ration of the electroconductive oxide is highest in an interface with the electroconductive oxide layer and lowest in an interface with the electroconductive metal layer.

    摘要翻译： 提供一种压电元件的制造方法，其中即使在高温下堆积在基板上的电极和压电膜也能够被氧化，并且可以抑制基板，电极和压电膜之间的相互扩散 。 该电极适合作为层压层体，其包括导电氧化物层，具有导电氧化物和导电金属的混合层，以及包含来自衬底侧的导电金属的导电金属层，并且上述混合层适于作为 分级组成结构，其中导电氧化物的比例在与导电氧化物层的界面中最高，并且在与导电金属层的界面中最低。

    Microcomputer and microprocessor having flash memory operable from single external power supply
    33.
    发明申请
    Microcomputer and microprocessor having flash memory operable from single external power supply 失效
    具有从单个外部电源可操作的闪存的微计算机和微处理器

    公开(公告)号：US20060164889A1

    公开(公告)日：2006-07-27

    申请号：US11365499

    申请日：2006-03-02

    申请人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

    发明人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

    IPC分类号： G11C16/04

    CPC分类号： G11C16/12 ,  G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C16/30

    摘要： A semiconductor processing device is provided which includes a nonvolatile memory unit, a voltage generating unit, and a first terminal. The voltage generating unit generates a first voltage generated from an operation voltage provided from outside of the semiconductor processing device and provides the first voltage to the nonvolatile memory unit for storing data therein. The first terminal provides the first voltage generated by the voltage generating unit to outside of the semiconductor processing device. This first voltage provided to outside of the semiconductor processing device via the first terminal permits checking a voltage level of the first voltage and correcting this voltage level.

    摘要翻译： 提供一种半导体处理装置，其包括非易失性存储单元，电压产生单元和第一端子。 电压产生单元产生由从半导体处理装置的外部提供的操作电压产生的第一电压，并将第一电压提供给用于在其中存储数据的非易失性存储单元。 第一端子将由电压产生单元产生的第一电压提供给半导体处理装置的外部。 通过第一端子提供到半导体处理装置外部的第一电压允许检查第一电压的电压电平并校正该电压电平。

    Semiconductor integrated circuit
    34.
    发明授权
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号：US07061825B2

    公开(公告)日：2006-06-13

    申请号：US10867013

    申请日：2004-06-15

    申请人： Naoki Yada ,  Yasuyuki Saito ,  Yasushi Shibatsuka ,  Katsunori Koike ,  Mitsuhiko Okutsu

    发明人： Naoki Yada ,  Yasuyuki Saito ,  Yasushi Shibatsuka ,  Katsunori Koike ,  Mitsuhiko Okutsu

    IPC分类号： G11C8/00

    CPC分类号： H03L7/08 ,  G06F1/08 ,  G11C7/04 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/2254 ,  H03K3/0315 ,  H03K5/133 ,  H03K5/2481 ,  H03K2005/00039 ,  H03K2005/00143 ,  H03L7/085

    摘要： A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

    摘要翻译： 半导体集成电路包括存储电路，基于存储电路中保存的控制信息产生内部时钟信号的振荡电路，以及产生控制信息的逻辑电路，该控制信息使内部时钟信号的频率与 外部时钟信号的频率。 内部时钟信号用于内部电路的同步操作。 即使由于过程变化而在振荡电路的振荡特性中出现误差（不期望的变化），也可能使内部时钟信号频率与对应于目标频率的外部时钟信号频率一致，而不需要外部 晶体振荡器的附件和外部时钟信号的输入。

    Microcomputer and microprocessor having flash memory operable from single external power supply
    36.
    发明授权
    Microcomputer and microprocessor having flash memory operable from single external power supply 失效
    具有从单个外部电源可操作的闪存的微计算机和微处理器

    公开(公告)号：US06845046B1

    公开(公告)日：2005-01-18

    申请号：US10623538

    申请日：2003-07-22

    申请人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

    发明人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

    IPC分类号： G11C5/14 ,  G11C16/30 ,  G11C16/04

    CPC分类号： G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C16/30

    摘要： A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations. The microcomputer comprises a voltage clamp unit including a reference voltage generating circuit and a constant voltage generating circuit. In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished. This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.

    摘要翻译： 微型计算机包括闪存，其在相对较宽的外部电源电压范围内以稳定的方式被电擦除和编程，包括用于低电压操作的外部电源电压。 该微型计算机包括一个包括一个参考电压产生电路和一个恒压发生电路的电压钳位单元。 在操作中，电压钳位单元产生对电源电压的低依赖性的电压，并将所产生的电压钳位到在可容忍范围内低于外部单个电源电压的电压电平。 这可防止由钳位电压工作的升压电路（即编程和擦除电压）由外部提供的电压而提升的电压。

    Engine-driven power generating system
    38.
    发明授权
    Engine-driven power generating system 失效
    发动机驱动发电系统

    公开(公告)号：US5195007A

    公开(公告)日：1993-03-16

    申请号：US706966

    申请日：1991-05-29

    申请人： Shinji Kikuchi ,  Toshihiko Tanuma ,  Yasuyuki Saito

    发明人： Shinji Kikuchi ,  Toshihiko Tanuma ,  Yasuyuki Saito

    IPC分类号： G01R31/00 ,  F02P15/00 ,  H02H3/20 ,  H02H7/06 ,  H02H9/04 ,  H02H11/00 ,  H02P9/30

    CPC分类号： H02H7/06 ,  H02H11/002 ,  H02H3/202

    摘要： An engine-driven power generating system comprising a bridge circuit section in which a low-frequency switching elements driven alternately by low-frequency drive signals, and high-frequency switching elements driven by high-frequency drive signals during the ON period of the low-frequency switching elements are connected in a bridge network, and an inverter circuit section having a drive signal supply circuit for supplying low-frequency and high-frequency drive signals are each supplied to the low-frequency and high-frequency switching elements that form a pair; the a-c voltage generated by an engine-driven a-c generator is converted into d-c voltage that is in turn converted into a predetermined level of low-frequency a-c voltage; characterized in that an emergency relay circuit device for protecting the engine-driven power generating system against abnormal operating condition.

    摘要翻译： 一种发动机驱动的发电系统，包括桥式电路部分，其中通过低频驱动信号交替驱动的低频开关元件和由低频开关元件在低频驱动信号的导通期间由高频驱动信号驱动的高频开关元件， 频率开关元件连接在桥接网络中，并且具有用于提供低频和高频驱动信号的驱动信号提供电路的逆变器电路部分被提供给形成一对的低频和高频开关元件 ; 由发动机驱动的a-c发电机产生的a-c电压被转换成d-c电压，其又转换成预定水平的低频a-c电压; 其特征在于，用于保护发动机驱动的发电系统免于异常工作状态的紧急继电器电路装置。