公开(公告)号：US20110013457A1

公开(公告)日：2011-01-20

申请号：US12830903

申请日：2010-07-06

申请人： Jinman Han

发明人： Jinman Han

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C16/10 ,  G11C2211/5621 ,  G11C2211/5642

摘要： Provided are nonvolatile memory devices and programming methods thereof. A non-volatile memory device is programmed by performing a plurality of programming loops on memory cells in a memory cell array and changing a program inhibit voltage applied to bit lines of the memory cells that have completed programming while performing the plurality of programming loops.

摘要翻译： 提供了非易失性存储器件及其编程方法。 通过在存储单元阵列中的存储器单元上执行多个编程循环并改变在执行多个编程循环时施加到已完成编程的存储器单元的位线的程序禁止电压来编程非易失性存储器件。

公开(公告)号：US09892796B2

公开(公告)日：2018-02-13

申请号：US15398602

申请日：2017-01-04

申请人： Dongsup Jin ,  Pilsang Yoon ,  Hong Rak Son ,  Junjin Kong ,  Young-Seop Shim ,  Jinman Han

发明人： Dongsup Jin ,  Pilsang Yoon ,  Hong Rak Son ,  Junjin Kong ,  Young-Seop Shim ,  Jinman Han

IPC分类号： G11C7/00 ,  G11C16/26 ,  G06F3/06 ,  G11C16/04

CPC分类号： G11C16/26 ,  G06F3/061 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G11C7/02 ,  G11C11/5642 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/28 ,  G11C29/021 ,  G11C29/028 ,  G11C29/50004 ,  G11C2029/0409

摘要： A method for controlling a nonvolatile memory device includes requesting a plurality of first sampling values from the nonvolatile memory device, each of the first sampling values representing the number of memory cells having a threshold voltage between a first sampling read voltage and a second sampling read voltage. The first sampling values are processed through a non-linear filtering operation to estimate the number of memory cells having the threshold voltage between the first sampling read voltage and the second sampling read voltage.

公开(公告)号：US09864682B2

公开(公告)日：2018-01-09

申请号：US14664125

申请日：2015-03-20

申请人： Doohyun Kim ,  BoGeun Kim ,  Kitae Park ,  Jinman Han

发明人： Doohyun Kim ,  BoGeun Kim ,  Kitae Park ,  Jinman Han

IPC分类号： G06F12/02 ,  G11C11/56 ,  G11C16/04

CPC分类号： G06F12/0246 ,  G06F2212/7201 ,  G11C11/5621 ,  G11C16/0483

摘要： According to example embodiments, a method of operating a storage device includes reading a process capability index using a memory controller, adjusting at least one operation condition based on the process capability index, and operating one of at least one nonvolatile memory device according to the at least one operation condition adjusted. The process capability index indicates how a structure associated with a memory cell to be operated deviates from a target shape.

公开(公告)号：US08929145B2

公开(公告)日：2015-01-06

申请号：US14043256

申请日：2013-10-01

申请人： Changhyun Lee ,  Jinman Han ,  Doogon Kim ,  Sunghoi Hur ,  Jongin Yun

发明人： Changhyun Lee ,  Jinman Han ,  Doogon Kim ,  Sunghoi Hur ,  Jongin Yun

IPC分类号： G11C16/04 ,  H01L27/115 ,  G11C16/10 ,  H01L29/792

CPC分类号： G11C16/107 ,  G11C16/0483 ,  G11C16/10 ,  G11C2213/71 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7926

摘要： Provided is a programming method of a nonvolatile memory device. The nonvolatile memory device includes a substrate and a plurality of memory cells which are stacked in the direction perpendicular to the substrate. The programming method applies a first voltage to a selected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be programmed, applies a second voltage to an unselected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be program-prohibited, applies a third voltage to a selected string selection line connected to at least two memory strings in same row, applies a fourth voltage to an unselected string selection line connected to at least two memory strings in same row, and applies a program operation voltage to a plurality of word lines, each word line connected to each corresponding memory cell in the memory string, wherein the first to third voltages are positive voltages.

摘要翻译： 提供了一种非易失性存储器件的编程方法。 非易失性存储器件包括基板和沿垂直于基板的方向堆叠的多个存储单元。 编程方法将第一电压施加到连接到包括要编程的多个存储器单元的存储单元的同一列中的至少两个存储器串的选定位线，将第二电压施加到连接至少两个的未选定位线 包含要被编程禁止的多个存储单元的存储单元的同一列中的存储器串向同一行中连接到至少两个存储器串的所选择的串选择线施加第三电压，将第四电压施加到未选择的串 选择线连接到同一行中的至少两个存储器串，并且将编程操作电压施加到多个字线，每个字线连接到存储器串中的每个对应的存储单元，其中第一至第三电压是正电压。

公开(公告)号：US08923053B2

公开(公告)日：2014-12-30

申请号：US14029100

申请日：2013-09-17

申请人： Jinman Han ,  Sunil Shim ,  Hansoo Kim ,  Jae-Hoon Jang ,  Byoungkeun Son

发明人： Jinman Han ,  Sunil Shim ,  Hansoo Kim ,  Jae-Hoon Jang ,  Byoungkeun Son

IPC分类号： G11C16/04 ,  G11C16/34 ,  H01L27/115 ,  G11C16/16 ,  G11C16/10 ,  H01L29/792

CPC分类号： G11C16/04 ,  G11C16/10 ,  G11C16/16 ,  G11C16/3418 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7926

摘要： Provided is a method of operating a nonvolatile memory device that includes a substrate and memory blocks having a plurality of memory cells stacked along a direction perpendicular to the substrate. The method includes: reading data from a selected sub block among sub blocks of a selected memory block and selectively refreshing each sub block of the selected memory block in response to the reading of the selected sub block, wherein each sub block of the selected memory block is separately erased.

摘要翻译： 提供了一种操作包括基板的非易失性存储器件的方法和具有沿着垂直于衬底的方向堆叠的多个存储单元的存储器块。 该方法包括：响应于所选择的子块的读取，从所选择的存储器块的子块中读取选定的子块的数据并选择刷新所选存储块的每个子块，其中所选存储块的每个子块 被单独擦除。

公开(公告)号：US08917558B2

公开(公告)日：2014-12-23

申请号：US12985695

申请日：2011-01-06

申请人： Jinman Han ,  Donghyuk Chae

发明人： Jinman Han ,  Donghyuk Chae

IPC分类号： G11C16/14 ,  G11C16/16

CPC分类号： G11C16/16 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/14 ,  G11C16/26

摘要： Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.

摘要翻译： 非易失性存储器件，其操作方法和包括该非易失性存储器件的存储器系统。 在操作方法中，连接到位线的第一串的接地选择线可以浮置。 可以将擦除禁止电压施加到连接到位线的第二串的接地选择线。 可以将擦除操作电压施加到第一和第二串。

公开(公告)号：US08553466B2

公开(公告)日：2013-10-08

申请号：US13023934

申请日：2011-02-09

申请人： Jinman Han ,  Doogon Kim

发明人： Jinman Han ,  Doogon Kim

IPC分类号： G11C11/34

CPC分类号： G11C16/14 ,  G11C16/04 ,  G11C16/08 ,  G11C16/16 ,  H01L27/1157 ,  H01L27/11582

摘要： Provided is an erasing method of a nonvolatile memory device. The erasing method applies a word line erase voltage to a plurality of word lines connected to the memory cells respectively, applies a specific voltage to a ground selection line connected to the ground selection transistor, applies an erase voltage to a substrate in which the memory string formed during the step applying the specific voltage to the ground selection line, and floats the ground selection line in response to a voltage change of the substrate.

摘要翻译： 提供了一种非易失性存储器件的擦除方法。 擦除方法将字线擦除电压分别施加到连接到存储器单元的多个字线，向连接到接地选择晶体管的接地选择线施加特定电压，将擦除电压施加到其中存储器串 在施加特定电压到地选择线的步骤期间形成，并且响应于衬底的电压变化漂浮地选择线。

公开(公告)号：US08355280B2

公开(公告)日：2013-01-15

申请号：US13040295

申请日：2011-03-04

申请人： Sangyong Yoon ,  Kitae Park ,  Jinman Han ,  Wonseok Lee

发明人： Sangyong Yoon ,  Kitae Park ,  Jinman Han ,  Wonseok Lee

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/56 ,  G11C11/5628 ,  G11C14/0018 ,  G11C16/0483 ,  G11C16/26 ,  G11C2211/5641 ,  G11C2211/5642 ,  G11C2211/5643

摘要： A data storage device includes a non-volatile memory device which includes a memory cell array; and a memory controller which includes a buffer memory and which controls the non-volatile memory device. The operating method of the data storage device includes storing data in the buffer memory according to an external request, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of the memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to the multi-bit memory device based on the determined program pattern.

摘要翻译： 数据存储装置包括：非易失性存储装置，其包括存储单元阵列; 以及包括缓冲存储器并且控制非易失性存储器件的存储器控​​制器。 数据存储装置的操作方法包括根据外部请求将数据存储在缓冲存储器中，并且确定存储在缓冲存储器中的数据是否是与存储单元阵列的缓冲器程序操作相关的数据。 当存储在缓冲存储器中的数据是与缓冲器程序操作相关的数据时，该方法还包括确定是否需要对存储单元阵列的主程序操作，以及当需要存储单元阵列的主程序操作时， 存储单元阵列中的主程序操作的程序模式。 该方法还包括基于所确定的程序模式向存储器单元阵列发出用于主程序操作的一组命令给多位存储器件。

公开(公告)号：US08355279B2

公开(公告)日：2013-01-15

申请号：US12882378

申请日：2010-09-15

申请人： Sangyong Yoon ,  Jinman Han ,  Kitae Park ,  Joon Young Kwak

发明人： Sangyong Yoon ,  Jinman Han ,  Kitae Park ,  Joon Young Kwak

IPC分类号： G11C16/06 ,  G11C16/04

CPC分类号： G11C11/5628 ,  G06F11/1072 ,  G11C11/10

摘要： A nonvolatile memory includes a plurality of N-bit multi-level cell (MLC) memory cells and a controller. The plurality of N-bit MLC memory cells are for storing N pages of data, each of the MLC memory cells programmable into any one of 2N threshold voltage distributions, where N is a positive number. The controller is configured to program the N pages of data into the MLC memory cells, and to execute a partial interleave process in which the N pages of data are divided into M page groups, where M is a positive number and where each page group includes at least one of the N pages of data, and in which each of the M page groups is applied to an error correction code (ECC) circuit to generate parity bits for the respective M page groups, where a bit-error rate (BER) among the pages within each of the M groups is equalized by the partial interleave process.

摘要翻译： 非易失性存储器包括多个N位多电平单元（MLC）存储器单元和控制器。 多个N位MLC存储器单元用于存储N页数据，MLC存储单元中的每一个可编程为2N个阈值电压分布中的任何一个，其中N是正数。 控制器被配置为将N页数据编程到MLC存储器单元中，并且执行部分交错处理，其中N页数据被划分为M页组，其中M是正数，并且每个页组包括 N页数据中的至少一个，并且其中M页组中的每一个被应用于纠错码（ECC）电路以产生各个M页组的奇偶校验位，其中误码率（BER） 在每个M组内的页面之间通过部分交错处理来均衡。

公开(公告)号：US20110216603A1

公开(公告)日：2011-09-08

申请号：US13023934

申请日：2011-02-09

申请人： Jinman Han ,  Doogon Kim

发明人： Jinman Han ,  Doogon Kim

IPC分类号： G11C16/08 ,  G11C16/04 ,  G11C16/16

CPC分类号： G11C16/14 ,  G11C16/04 ,  G11C16/08 ,  G11C16/16 ,  H01L27/1157 ,  H01L27/11582

摘要： Provided is an erasing method of a nonvolatile memory device. The erasing method applies a word line erase voltage to a plurality of word lines connected to the memory cells respectively, applies a specific voltage to a ground selection line connected to the ground selection transistor, applies an erase voltage to a substrate in which the memory string formed during the step applying the specific voltage to the ground selection line, and floats the ground selection line in response to a voltage change of the substrate.

摘要翻译： 提供了一种非易失性存储器件的擦除方法。 擦除方法将字线擦除电压分别施加到连接到存储器单元的多个字线，向连接到接地选择晶体管的接地选择线施加特定电压，将擦除电压施加到其中存储器串 在施加特定电压到地选择线的步骤期间形成，并且响应于衬底的电压变化漂浮地选择线。