公开(公告)号：US10248277B2

公开(公告)日：2019-04-02

申请号：US16156008

申请日：2018-10-10

Applicant: TACTOTEK OY

Inventor： Jarmo Sääski ,  Jarkko Torvinen ,  Pasi Raappana ,  Mikko Heikkinen

IPC: G06F3/044 ,  B29C45/14 ,  B32B27/08 ,  H05K1/03 ,  H05K1/14 ,  H05K3/28 ,  H05K3/12 ,  H05K1/02 ,  H05K1/18 ,  H05K3/36 ,  B29L31/34

Abstract: An integrated multilayer assembly for an electronic device includes a first substrate film configured to accommodate electrical features on at least first side thereof, said first substrate film having the first side and a substantially opposing second side, a second substrate film configured to accommodate electrical features on at least first side thereof, said second substrate film having the first side and a substantially opposing second side, the first sides of the first and second substrate films being configured to face each other, at least one electrical feature on the first side of the first substrate film, at least one other electrical feature on the first side of the second substrate film, and a molded plastic layer between the first and second substrate films at least partially embedding the electrical features on the first sides thereof.

公开(公告)号：US10225932B1

公开(公告)日：2019-03-05

申请号：US16113555

申请日：2018-08-27

Applicant: TactoTek Oy

Inventor： Tomi Simula ,  Vinski Bräysy ,  Mikko Heikkinen ,  Juha-Matti Hintikka ,  Minna Pirkonen ,  Pasi Raappana ,  Tuomas Heikkilä ,  Jarmo Sääski ,  Juhani Harvela

IPC: H05K5/00 ,  H05K7/00 ,  H05K1/14 ,  H05K1/11 ,  H01R12/71 ,  H05K1/02 ,  H05K1/18

Abstract: Interface arrangement comprising an electrical node type component for providing electrical or electromagnetic connection between an external system and a host structure of the interface arrangement. The interface arrangement comprising a first substrate film defining a cavity. A first material layer arranged to at least partly fill the cavity and to embed or at least partly cover at least one electrical element at least partly arranged into the cavity. The at least one electrical element comprises at least a converter element configured for adapting signals to be transferred between the external system and electronics of the host structure. A first connection element arranged at least partly into the cavity and configured for connecting to the external system. The first connection element is further at least functionally connected to the converter element. Related multilayer structures and methods of manufacture are presented.

公开(公告)号：US10194526B1

公开(公告)日：2019-01-29

申请号：US16113467

申请日：2018-08-27

Applicant: TactoTek Oy

Inventor： Tomi Simula ,  Vinski Bräysy ,  Mikko Heikkinen ,  Juha-Matti Hintikka ,  Juhani Harvela ,  Minna Pirkonen ,  Pasi Raappana ,  Tuomas Heikkilä ,  Jarmo Sääski

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/14 ,  H05K1/11 ,  H05K3/32 ,  H05K3/46 ,  H05K3/00 ,  H05K3/40

Abstract: An electrical node, a method, an electrical assembly such as a node strip or sheet, a related multilayer structure, and a method of manufacture are presented. The electrical node comprises a first substrate film defining a cavity and a first material layer arranged to at least partly fill the cavity and to embed or at least partly cover at least one electrical element arranged into the cavity.

公开(公告)号：US09801286B2

公开(公告)日：2017-10-24

申请号：US15279131

申请日：2016-09-28

Applicant: TactoTek Oy

Inventor： Mikko Heikkinen ,  Pasi Raappana ,  Jarmo Saaski

IPC: H05K1/02 ,  H05K3/40 ,  H05K1/18

CPC classification number: H05K3/4015 ,  H05K1/189 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/1327

Abstract: A multilayer structure, includes a flexible substrate film having a first side and opposite second side, a number of conductive traces, optionally defining contact pads and/or conductors, preferably printed on the first side for establishing a desired predetermined circuit design, plastic layer molded onto the first side so as to enclose the circuit between the plastic layer and the first side, and a preferably flexible connector for providing external electrical connection to the embedded circuit on the first side from the second, opposite side, one end of the connector being attached to a predetermined contact area on the first side, the other end being located on the second side for coupling with an external element, the intermediate portion connecting the two ends being fed through an opening in the substrate, wherein the opening extending through the thickness of the film is dimensioned to accommodate the connector without substantial additional clearance.

公开(公告)号：US09801273B2

公开(公告)日：2017-10-24

申请号：US15343731

申请日：2016-11-04

Applicant: Tacto Tek Oy

Inventor： Antti Keranen ,  Jarmo Saaski ,  Mikko Heikkinen

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/11 ,  H05K1/16 ,  H05K1/18 ,  H05K3/00 ,  H05K3/28

CPC classification number: H05K1/028 ,  H05K1/0269 ,  H05K1/0274 ,  H05K1/05 ,  H05K1/111 ,  H05K1/144 ,  H05K1/147 ,  H05K1/16 ,  H05K1/181 ,  H05K3/0044 ,  H05K3/28 ,  H05K3/284 ,  H05K2201/10106 ,  H05K2201/10143 ,  H05K2201/10151 ,  H05K2203/0165 ,  H05K2203/1105 ,  H05K2203/1316 ,  H05K2203/1327 ,  H05K2203/166

Abstract: A multilayer structure (200) including a preferably flexible substrate film (102) capable of accommodating electronics (106, 108), such as conductive traces and optionally electronic components such as SMDs (surface-mount device), on a first side thereof, the film having the first side and a second side, and a plastic layer (204) molded onto the first side of the substrate and protruding at one or more locations (114, 114B) through the substrate onto the second side, forming one or more protrusions (218) on the second side having a predetermined function. A corresponding method of manufacture is presented.

公开(公告)号：US20140344497A1

公开(公告)日：2014-11-20

申请号：US14278417

申请日：2014-05-15

Applicant: Antti KERANEN ,  Juhani HARVELA

Inventor： Antti KERANEN ,  Juhani HARVELA

IPC: G06F13/40

CPC classification number: G06F13/40 ,  G06F13/385 ,  G06F13/4009

Abstract: An electronic device includes a housing, or a ‘cover’, the housing material molded into a desired target shape and to at least partially embed a plurality of functional elements and an enabling arrangement, optionally at least partially embedded in the housing, the enabling arrangement including: a first connector with a first plurality of connecting elements to establish a connection between the plurality of functional elements and the enabling arrangement, a second connector with one or more second connecting elements to be connected a host device utilizing the functionalities associated with the functional elements, a memory for storing and retrieval of instructions, and processing elements capable of transforming signals from a one known format to another predetermined format according to stored instructions. A corresponding method is presented.

Abstract translation: 电子设备包括壳体或“盖”，模制成所需目标形状的壳体材料并且至少部分地嵌入多个功能元件和可选地至少部分地嵌入壳体中的使能装置，使能装置 包括：具有第一多个连接元件以在所述多个功能元件和所述启用装置之间建立连接的第一连接器，具有一个或多个第二连接元件的第二连接器，所述第二连接元件利用与所述功能元件相关联的功能来连接主机设备 元素，用于存储和检索指令的存储器，以及能够根据存储的指令将信号从一种已知格式转换为另一种预定格式的处理元件。 提出了相应的方法。

公开(公告)号：US11934004B2

公开(公告)日：2024-03-19

申请号：US17674894

申请日：2022-02-18

Applicant: TACTOTEK OY

Inventor： Antti Keränen ,  Mikko Heikkinen

IPC: F21V8/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/12 ,  H05K3/28

CPC classification number: G02B6/0091 ,  G02B6/0021 ,  G02B6/0031 ,  G02B6/0051 ,  G02B6/0065 ,  G02B6/0093 ,  G02B6/0055 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/181 ,  H05K3/12 ,  H05K3/284 ,  H05K2201/0129 ,  H05K2201/10106 ,  H05K2201/10121 ,  H05K2203/1316 ,  H05K2203/1327

Abstract: An electronic device includes a substrate film having a first side and a second side, and a number of light sources configured to emit light. A plastic lightguide layer is molded onto the first side of the substrate film. The plastic lightguide layer being of optically at least translucent material to transmit light. The device also includes a masking layer provided on the outer surface of the plastic lightguide layer. The masking layer defines a window for letting the light emitted by the embedded light sources to pass through the masking layer towards the environment.

公开(公告)号：US20240021764A1

公开(公告)日：2024-01-18

申请号：US18476676

申请日：2023-09-28

Applicant: TactoTek Oy

Inventor： Antti KERÄNEN ,  Sami TORVINEN ,  Tero HEIKKINEN ,  Pasi KORHONEN ,  Pälvi APILO ,  Mikko HEIKKINEN ,  Jarmo SÄÄSKI ,  Paavo NISKALA ,  Ville WALLENIUS ,  Heikki TUOVINEN ,  Janne ASIKKALA ,  Taneli SALMI ,  Suvi KELA ,  Outi RUSANEN ,  Johanna JUVANI ,  Mikko SIPPARI ,  Tomi SIMULA ,  Tapio RAUTIO ,  Samuli YRJÄNÄ ,  Tero RAJANIEMI ,  Simo KOIVIKKO ,  Juha-Matti HINTIKKA ,  Hasse SINIVAARA ,  Vinski BRÄYSY ,  Olimpia MIGLIORE ,  Juha SEPPONEN

IPC: H01L33/60 ,  H01L33/00 ,  H01L33/62 ,  H01L25/075

CPC classification number: H01L33/60 ,  H01L33/005 ,  H01L33/62 ,  H01L25/0753 ,  H01L2933/0058 ,  H01L2933/0066

Abstract: An integrated optically functional multilayer structure includes a flexible, substrate film arranged with a circuit design including at least a number of electrical conductors preferably additively printed on the substrate film; a light source provided upon a first side of the substrate film to internally illuminate at least portion of the structure for external perception; an optically transmissive plastic layer produced upon the first side of the substrate film, said plastic layer at least laterally surrounding, the light source, the substrate film at least having a similar or lower refractive index therewith; and a reflector design comprising at least one material layer, said reflector design being configured to reflect, the light emitted by the light source and incident upon the reflector design.

公开(公告)号：US20240004120A1

公开(公告)日：2024-01-04

申请号：US18339467

申请日：2023-06-22

Applicant: TactoTek Oy

Inventor： Antti KERÄNEN ,  Tero HEIKKINEN ,  Pasi KORHONEN ,  Pälvi APILO ,  Mikko HEIKKINEN ,  Jarmo SÄÄSKI ,  Paavo NISKALA ,  Ville WALLENIUS ,  Heikki TUOVINEN ,  Janne ASIKKALA ,  Taneli SALMI ,  Suvi KELA ,  Outi RUSANEN ,  Johanna JUVANI ,  Mikko SIPPARI ,  Tomi SIMULA ,  Tapio RAUTIO ,  Samuli YRJÄNÄ ,  Tero RAJANIEMI ,  Simo KOIVIKKO ,  Juha-Matti HINTIKKA ,  Hasse SINIVAARA ,  Vinski BRÄYSY ,  Olimpia MIGLIORE ,  Juha SEPPONEN

IPC: F21V8/00

CPC classification number: G02B6/0031 ,  G02B6/0068 ,  G02B6/0073 ,  G02B6/0065 ,  G02B6/0051 ,  G02B6/0036 ,  G02B6/0083 ,  G02B6/0061 ,  G02B6/0021 ,  G02B6/004 ,  G02B6/0043 ,  G02B6/0055 ,  G02B6/0041 ,  G02B5/0883

Abstract: An integrated optically functional multilayer structure includes a flexible, substrate film arranged with a circuit design including at least a number of electrical conductors on the substrate film; and a plurality of top-emitting, bottom-installed light sources provided upon a first side of the substrate film to internally illuminate at least portion of the structure for external perception via associated outcoupling areas, wherein for each light source of the plurality of light sources there is optically transmissive plastic layer, produced upon the first side of the substrate film, said plastic layer at least laterally surrounding the light source, the substrate film at least having a similar or lower refractive index therewith; and reflector design including at least one material layer, provided at least upon the light source and configured to reflect the light emitted by the light source and incident upon the reflective laver towards the plastic layer.

公开(公告)号：US20230389184A1

公开(公告)日：2023-11-30

申请号：US18353143

申请日：2023-07-17

Applicant: TactoTek Oy

Inventor： Vinski BRÄYSY ,  Ilpo HÄNNINEN ,  Pälvi APILO ,  Mikko HEIKKINEN ,  Topi WUORI ,  Mikko SIPPARI ,  Heikki ALAMÄKI

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/32 ,  H05K3/12 ,  H05K1/11

CPC classification number: H05K1/181 ,  H05K3/305 ,  H05K3/321 ,  H05K3/12 ,  H05K1/111 ,  H05K2201/0129

Abstract: A method for manufacturing an electronics assembly, includes obtaining or producing an electronics module, which includes a first circuitry on a first surface at a first side of a circuit board, at least one electronics component on the circuit board in electrical connection with the first circuitry, and at least one first connection portion on the first surface and/or an adjacent side surface at a peripheral portion of the circuit board, wherein the at least one first connection portion is electrically connected to or comprised in the first circuitry. The method further includes arranging the electronics module on a second substrate including a second connection portion connected to a second circuitry on a surface of the second substrate, and arranging electrically conductive joint material onto the first and the second connection portions to extend between them for electrically connecting the electronics module to the second circuitry.