Device manufacturing method
    391.
    发明授权

    公开(公告)号:US11061336B2

    公开(公告)日:2021-07-13

    申请号:US16493835

    申请日:2018-03-28

    Abstract: A device manufacturing method includes: exposing a first substrate using a lithographic apparatus to form a patterned layer having first features; processing the first substrate to transfer the first features into the first substrate; determining displacements of the first features from their nominal positions in the first substrate; determining a correction to at least partly compensate for the displacements; and exposing a second substrate using a lithographic apparatus to form a patterned layer having the first features, wherein the correction is applied for or during the exposing the second substrate.

    Time-dependent defect inspection apparatus

    公开(公告)号:US11056311B2

    公开(公告)日:2021-07-06

    申请号:US16552991

    申请日:2019-08-27

    Abstract: An improved charged particle beam inspection apparatus, and more particularly, a particle beam inspection apparatus for detecting a thin device structure defect is disclosed. An improved charged particle beam inspection apparatus may include a charged particle beam source to direct charged particles to a location of a wafer under inspection over a time sequence. The improved charged particle beam apparatus may further include a controller configured to sample multiple images of the area of the wafer at difference times over the time sequence. The multiple images may be compared to detect a voltage contrast difference or changes to identify a thin device structure defect.

    METHOD AND MACHINE FOR EXAMINING WAFERS

    公开(公告)号:US20210193537A1

    公开(公告)日:2021-06-24

    申请号:US17097063

    申请日:2020-11-13

    Abstract: Method and machine utilizes the real-time recipe to perform weak point inspection on a series of wafers during the fabrication of integrated circuits. Each real-time recipe essentially corresponds to a practical fabrication history of a wafer to be examined and/or the examination results of at least one examined wafer of same “lot”. Therefore, different wafers can be examined by using different recipes where each recipe corresponds to a specific condition of a wafer to be examined, even these wafers are received by a machine for examining at the same time.

    HIGH VOLTAGE VACUUM FEEDTHROUGH
    399.
    发明申请

    公开(公告)号:US20210175041A1

    公开(公告)日:2021-06-10

    申请号:US17140699

    申请日:2021-01-04

    Abstract: A feedthrough for providing an electrical connection is provided. The feedthrough comprises a conductor and a quartz or a glass structure configured to surround at least a portion of the conductor and provide isolation to the conductor. The conductor and the quartz or glass structure may be coaxially arranged. The feedthrough can provide an electrical connection between an inside and outside of a vacuum chamber that contains a sample.

    Simulation-assisted alignment between metrology image and design

    公开(公告)号:US11029609B2

    公开(公告)日:2021-06-08

    申请号:US16467675

    申请日:2017-12-06

    Inventor: Te-Sheng Wang

    Abstract: A method including: simulating an image or characteristics thereof, using characteristics of a design layout and of a patterning process, determining deviations between the image or characteristics thereof and the design layout or characteristics thereof; aligning a metrology image obtained from a patterned substrate and the design layout based on the deviations, wherein the patterned substrate includes a pattern produced from the design layout using the patterning process; and determining a parameter of a patterned substrate from the metrology image aligned with the design layout.

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