公开(公告)号：US20130242680A1

公开(公告)日：2013-09-19

申请号：US13827797

申请日：2013-03-14

Applicant: JAE-JUN LEE ,  Do-Hyung Kim ,  Yong-Jin Kim ,  Bo-Ra Kim ,  Jeong-Hoon Baek ,  Kwang-Seop Kim ,  Da-Ae Heo

Inventor： JAE-JUN LEE ,  Do-Hyung Kim ,  Yong-Jin Kim ,  Bo-Ra Kim ,  Jeong-Hoon Baek ,  Kwang-Seop Kim ,  Da-Ae Heo

IPC: G11C7/00

CPC classification number: H03K19/0005 ,  G11C5/04 ,  G11C7/00

Abstract: A memory module includes a command/address (CA) register, memory devices, and a module resistor unit mounted on a circuit board. The centrally disposed CA register drive the memory devices one or more internal CA signal(s) to arrangements of memory devices using multiple CA transmission lines, wherein the multiple internal CA transmission lines are commonly terminated in the module resistor unit.

Abstract translation: 存储器模块包括命令/地址（CA）寄存器，存储器件和安装在电路板上的模块电阻器单元。 集中设置的CA寄存器使用多个CA传输线将存储器件一个或多个内部CA信号驱动到存储器件的布置，其中多个内部CA传输线通常在模块电阻器单元中端接。

公开(公告)号：US08537124B2

公开(公告)日：2013-09-17

申请号：US12366186

申请日：2009-02-05

Applicant: Jae-Hoon Lee ,  Bong-Hyun You ,  Byoung-Jun Lee ,  Jai-Hyun Koh

Inventor： Jae-Hoon Lee ,  Bong-Hyun You ,  Byoung-Jun Lee ,  Jai-Hyun Koh

IPC: G06F3/041 ,  G06F3/045 ,  G06F3/042 ,  G06F3/038 ,  G09G3/36

CPC classification number: G06F3/042 ,  G02F1/13338 ,  G06F3/0412 ,  G06F3/044

Abstract: A touch sensor is installed inside a liquid crystal display panel to sense a touch operation and includes a light sensing part including a photodiode, a capacitance sensing part including a liquid crystal capacitor, and a sensing signal output part. The light sensing part generates a control signal corresponding to a variation in the amount of external light when the liquid crystal display panel is touched. The capacitance sensing part varies the control signal based on a variation in the capacitance of the liquid crystal capacitor when the liquid crystal display panel is touched. The sensing signal output part generates a sensing signal in response to the control signal and determines an output timing of the sensing signal.

Abstract translation: 触摸传感器安装在液晶显示面板内以感测触摸操作，并且包括包括光电二极管的光感测部分，包括液晶电容器的电容感测部分和感测信号输出部分。 光感测部产生与液晶显示面板触摸时的外部光量的变化对应的控制信号。 当触摸液晶显示面板时，电容感测部分基于液晶电容器的电容的变化来改变控制信号。 感测信号输出部分响应于控制信号产生感测信号，并确定感测信号的输出定时。

公开(公告)号：US08495461B2

公开(公告)日：2013-07-23

申请号：US12678682

申请日：2008-09-11

Applicant: Jun Lee

Inventor： Jun Lee

IPC: H03M13/00

CPC classification number: G11B20/1426 ,  G11B7/0045 ,  G11B20/10055 ,  G11B20/1833 ,  G11B2020/185

Abstract: A data modulation method and a data error correction method are provided. The data modulation method includes generating a channel sequence for an input sequence, determining whether or not the channel sequence violates a Run Length Limit (RLL) constraint, and performing, when the channel sequence violates the RLL constraint, bit flip at a position prior to a position at which the RLL constraint is violated among positions of bits included in the channel sequence. The data error correction method includes detecting an error bit of received data using a parity check matrix, determining whether or not the error bit is an error caused by bit flip, and correcting the error bit when the error bit is an error caused by bit flip for applying an RLL constraint.

Abstract translation: 提供了数据调制方法和数据纠错方法。 数据调制方法包括产生用于输入序列的信道序列，确定信道序列是否违反运行长度限制（RLL）约束，并且当信道序列违反RLL限制时，执行比特翻转 在通道序列中包含的位的位置之间违反RLL约束的位置。 数据纠错方法包括使用奇偶校验矩阵检测接收到的数据的错误位，确定错误位是否是由位翻转引起的错误，以及当错误位是由位翻转引起的错误时校正错误位 用于应用RLL约束。

公开(公告)号：US08476713B2

公开(公告)日：2013-07-02

申请号：US12588270

申请日：2009-10-09

Applicant: Seung-Jun Lee ,  Woonkyung Lee

Inventor： Seung-Jun Lee ,  Woonkyung Lee

IPC: H01L21/70 ,  H01L21/336

CPC classification number: H01L27/11551 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11578 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

Abstract: A vertical-type semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a wordline structure on the cell region of the semiconductor substrate, the wordline structure including a plurality of wordlines stacked on top of each other, a semiconductor structure through the wordline structure, a gate dielectric between the wordline structure and the semiconductor structure, and a dummy wordline structure on the peripheral circuit region, the dummy wordline structure having a vertical structure and including same components as the wordline structure.

Abstract translation: 垂直型半导体器件包括具有单元区域和外围电路区域的半导体衬底，半导体衬底的单元区域上的字线结构，该字线结构包括堆叠在彼此顶部的多个字线，半导体结构 通过字线结构，字线结构和半导体结构之间的栅极电介质和外围电路区域上的伪字线结构，虚拟字线结构具有垂直结构并且包括与字线结构相同的部件。

公开(公告)号：US20130160296A1

公开(公告)日：2013-06-27

申请号：US13821264

申请日：2011-09-16

Applicant: Young Ho Park ,  Jae Jun Lee

Inventor： Young Ho Park ,  Jae Jun Lee

IPC: B26B21/38 ,  B26B21/40 ,  B26B21/52

CPC classification number: B26B21/38 ,  B26B21/36 ,  B26B21/40 ,  B26B21/52

Abstract: The present invention pertains to a razor, which includes: a gripping section combined with a housing; a head section coupled at one side of the housing; a razor blade cartridge mounted at a front surface of an upper end of the head section; and an eccentric cam module, which moves the razor blade cartridge to reciprocate in a cutting direction.

Abstract translation: 本发明涉及一种剃刀，其包括：与壳体组合的抓握部分; 头部，其联接在所述壳体的一侧; 安装在所述头部的上端的前表面的剃刀刀片盒; 以及偏心凸轮模块，其使剃刀刀片盒沿切割方向往复运动。

公开(公告)号：US20130141318A1

公开(公告)日：2013-06-06

申请号：US13485243

申请日：2012-05-31

Applicant: Beom-Jun KIM ,  Myung-Koo HUR ,  Bong-Jun LEE ,  Yeon-Kyu MOON ,  Myung-Sub LEE ,  Gyu-Tae KIM

Inventor： Beom-Jun KIM ,  Myung-Koo HUR ,  Bong-Jun LEE ,  Yeon-Kyu MOON ,  Myung-Sub LEE ,  Gyu-Tae KIM

IPC: G09G3/36 ,  H03K17/693

CPC classification number: G09G3/3688 ,  G09G3/36 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0251 ,  G09G2310/0291 ,  G09G2310/08 ,  G11C19/28 ,  H03K17/693

Abstract: A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.

Abstract translation: 提供一种栅极驱动电路，其包括彼此级联的多个级并输出多个栅极信号。 第n（n是自然数）级包括门输出部分，第一节点控制部分和进位部分。 栅极输出部分包括第一晶体管。 第一晶体管响应于控制节点的高电压而将时钟信号的高电压输出到第n栅极信号的高电压。 第一节点控制部分连接到控制节点以控制控制节点的信号，并且包括至少一个具有比第一晶体管的沟道长度更长的沟道的晶体管。 进位部分响应于控制节点的信号将时钟信号的高电压输出到第n进位信号。

公开(公告)号：US20130133426A1

公开(公告)日：2013-05-30

申请号：US13592198

申请日：2012-08-22

Applicant: Jung Tae PARK ,  Seung Heon HAN ,  Jong Woon KIM ,  Heung Woo PARK ,  Jung Won LEE ,  Jung Eun NOH ,  Won Kyu JEUNG ,  Sung Jun LEE

Inventor： Jung Tae PARK ,  Seung Heon HAN ,  Jong Woon KIM ,  Heung Woo PARK ,  Jung Won LEE ,  Jung Eun NOH ,  Won Kyu JEUNG ,  Sung Jun LEE

IPC: G01P15/12

CPC classification number: G01P15/12 ,  G01C19/56 ,  G01P15/09 ,  G01P15/097 ,  G01P2015/084

Abstract: Disclosed herein is an inertial sensor including: a membrane; a mass body provided under the membrane; a plurality of patterned magnets provided under the mass body; and a magnetoresistive element provided to be spaced apart from the mass body and measuring static DC acceleration acting on the mass body through resistance changed according to magnetic fields of the plurality of patterned magnets. The plurality of patterned magnets and the magnetoresistive element are included, thereby making it possible to measure static DC acceleration (particularly, gravity acceleration) that is difficult to measure using an existing to piezoelectric element.

Abstract translation: 本文公开了一种惯性传感器，包括：膜; 设置在膜下面的质量体; 设置在所述质量体下方的多个图案化磁体; 以及设置成与质量体间隔开的磁阻元件，并且通过根据多个图案化磁体的磁场而改变的电阻测量作用在质量体上的静态直流加速度。 包括多个图案化磁体和磁阻元件，从而可以测量使用现有的压电元件难以测量的静态直流加速度（特别是重力加速度）。

公开(公告)号：US08448048B2

公开(公告)日：2013-05-21

申请号：US12769692

申请日：2010-04-29

Applicant: Ki jun Lee ,  Hong Rak Son ,  Jun jin Kong

Inventor： Ki jun Lee ,  Hong Rak Son ,  Jun jin Kong

IPC: G11C29/00

CPC classification number: G11C16/26 ,  G06F11/1072 ,  G11C16/06

Abstract: A nonvolatile memory device comprises a memory cell array configured to store one or more bits per memory cell, a read and write circuit configured to access the memory cell array, a control logic component configured to control the read and write circuit to sequentially execute read operations of a selected memory cell at least twice to output a read data symbol, and an error correcting unit configured to correct an error in the read data symbol based on a pattern of the read data symbol to output an error-corrected symbol.

Abstract translation: 非易失性存储器件包括被配置为存储每个存储器单元的一个或多个位的存储器单元阵列，被配置为访问存储单元阵列的读取和写入电路，被配置为控制读取和写入电路以顺序执行读取操作的控制逻辑组件 选择的存储单元至少两次以输出读取数据符号;以及纠错单元，被配置为基于所读取的数据符号的图案校正所读取的数据符号中的错误，以输出纠错符号。

公开(公告)号：US08431762B2

公开(公告)日：2013-04-30

申请号：US12593252

申请日：2008-04-11

Applicant: Jong-Ho Park ,  Jong-Nam Kim ,  Seong-Jun Lee ,  Min-Su Ko ,  Hee Tae Beum ,  Jongkee Park ,  Chang Hyun Ko ,  Sang Sup Han ,  Soon-Haeng Cho

Inventor： Jong-Ho Park ,  Jong-Nam Kim ,  Seong-Jun Lee ,  Min-Su Ko ,  Hee Tae Beum ,  Jongkee Park ,  Chang Hyun Ko ,  Sang Sup Han ,  Soon-Haeng Cho

IPC: C07C7/12

CPC classification number: C07C7/12 ,  B01D3/143 ,  B01D53/04 ,  B01D2253/108 ,  B01D2256/24 ,  B01D2257/7022 ,  B01D2259/40086 ,  B01D2259/403 ,  C07C7/005 ,  C07C7/04 ,  C07C7/13 ,  C07C11/08

Abstract: The present invention relates to a hybrid process comprising an adsorption process and a distillation process for the separation of butene-1 from a C4 hydrocarbon mixture gas including butene-1, trans-2-butene, cis-2-butene, normal butane, isobutane, etc. The above hybrid process comprises introducing a gaseous C4 mixture into the adsorption tower loaded with adsorbents which adsorb olefins selectively to discharge C4 paraffins to the outlet of the tower, desorbing C4 olefins selectively adsorbed in the adsorption tower to produce high purity C4 olefins mixture gas in which isobutane and normal butane was removed, and separating the high C4 olefins mixture gas (a mixture of butene-1, trans-2-butene, cis-2-butene, and a trace amount of C4 paraffins) via distillation to obtain high purity butene-1 including a trace amount of isobutane in the top of the distillation tower and obtain a mixture gas including trans-2-butene, cis-2-butene and a trace amount of normal butane in the bottom of the tower.

Abstract translation: 本发明涉及一种混合方法，其包括吸附过程和用于从包含丁烯-1，反式-2-丁烯，顺式-2-丁烯，正丁烷，异丁烷的C 4烃混合气体中分离丁烯-1的蒸馏方法 等等。上述混合方法包括将气态C 4混合物引入到负载有吸附剂的吸附塔中，所述吸附剂选择性吸附烯烃以将C4链烷烃排出到塔的出口，解吸选择性吸附在吸附塔中的C4烯烃以产生高纯度C4烯烃 除去异丁烷和正丁烷的混合气体，通过蒸馏将高C4烯烃混合气体（丁烯-1，反式-2-丁烯，顺式-2-丁烯和痕量的C4链烷烃的混合物）分离成 在蒸馏塔顶部得到含有痕量异丁烷的高纯度丁烯-1，得到底部的反式-2-丁烯，顺式-2-丁烯和痕量正丁烷的混合气体 他塔。

公开(公告)号：US20130089986A1

公开(公告)日：2013-04-11

申请号：US13608403

申请日：2012-09-10

Applicant: Jeong-ju PARK ,  Kyoung-mi KIM ,  Min-jung KIM ,  Dong-jun LEE ,  Boo-deuk KIM

Inventor： Jeong-ju PARK ,  Kyoung-mi KIM ,  Min-jung KIM ,  Dong-jun LEE ,  Boo-deuk KIM

IPC: G03F7/20 ,  H01L21/32

CPC classification number: H01L21/32139 ,  G03F7/0392 ,  G03F7/095 ,  G03F7/2022 ,  G03F7/203 ,  H01L21/0274

Abstract: A method of forming patterns of a semiconductor device may include forming a photoresist layer that includes a photo acid generator (PAG) and a photo base generator (PBG), generating an acid from the PAG in a first exposed portion of the photoresist layer by first-exposing the photoresist layer, and generating a base from the PBG in a second exposed portion of the photoresist layer by second-exposing a part of the first exposed portion and neutralizing the acid. The method may also include baking the photoresist layer after the first and second-exposing and deblocking the photoresist layer of the first exposed portion in which the acid is generated to form a deblocked photoresist layer, and forming a photoresist pattern by removing the deblocked photoresist layer by using a developer.

Abstract translation: 形成半导体器件的图案的方法可以包括形成光致抗蚀剂层，该光致抗蚀剂层包括光酸产生剂（PAG）和光产生剂（PBG），首先在光致抗蚀剂层的第一暴露部分中从PAG产生酸 并且在所述光致抗蚀剂层的第二暴露部分中通过将所述第一暴露部分的一部分暴露并中和所述酸而从所述PBG生成碱。 该方法还可以包括在第一和第二次曝光和去除其中产生酸的第一暴露部分的光致抗蚀剂层以形成解封的光致抗蚀剂层之后烘烤光致抗蚀剂层，以及通过去除去封闭的光刻胶层形成光致抗蚀剂图案 通过使用开发人员。