公开(公告)号：US08035100B2

公开(公告)日：2011-10-11

申请号：US12197573

申请日：2008-08-25

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US20110204370A1

公开(公告)日：2011-08-25

申请号：US13027453

申请日：2011-02-15

申请人： Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

发明人： Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

IPC分类号： H01L33/08 ,  H01L29/786 ,  H01L21/44

CPC分类号： H01L29/78693 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L27/3248 ,  H01L27/3262 ,  H01L51/5203

摘要： Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.

摘要翻译： 提供了一种薄膜晶体管（TFT）基板，其制造方法和包括该薄膜晶体管的显示装置。 TFT基板包括形成在基板上的栅电极，形成在栅电极上的栅极绝缘层，形成在栅极绝缘层上的氧化物半导体图案，形成在氧化物半导体图案上的源电极，形成在氧化物上的漏电极 面对源电极的半导体图案，以及形成在栅极绝缘层上的像素电极。

公开(公告)号：US20110109609A1

公开(公告)日：2011-05-12

申请号：US12899409

申请日：2010-10-06

申请人： Ki-Hun Jeong ,  Sung-Hoon Yang ,  Kap-Soo Yoon ,  Kyung-Sook Jeon ,  Seung Mi Seo

发明人： Ki-Hun Jeong ,  Sung-Hoon Yang ,  Kap-Soo Yoon ,  Kyung-Sook Jeon ,  Seung Mi Seo

IPC分类号： G06F3/038 ,  H01L31/18 ,  H01L33/00

CPC分类号： H01L31/1136 ,  G02F1/13318 ,  G06F2203/04103

摘要： A touch sensitive display device utilizing infrared ray sensing transistors. The transistors are configured, and comprise specified materials, to allow them to be formed with fewer photolithography processes, reducing cost and manufacturing time.

摘要翻译： 一种使用红外线感测晶体管的触敏显示装置。 晶体管被配置并且包括指定的材料，以允许它们用更少的光刻工艺形成，从而降低成本和制造时间。

公开(公告)号：US20090242881A1

公开(公告)日：2009-10-01

申请号：US12197573

申请日：2008-08-25

申请人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

发明人： Kap-Soo YOON ,  Sung-Hoon YANG ,  Byoung-June KIM ,  Czang-Ho LEE ,  Sung-Ryul KIM ,  Hwa-Yeul OH ,  Jae-Ho CHOI ,  Yong-Mo CHOI

IPC分类号： H01L33/00

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US20090152635A1

公开(公告)日：2009-06-18

申请号：US12331361

申请日：2008-12-09

申请人： Yu-Gwang JEONG ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

发明人： Yu-Gwang JEONG ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

IPC分类号： H01L29/78 ,  H01L21/02

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

摘要： Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

摘要翻译： 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。

公开(公告)号：US20090152553A1

公开(公告)日：2009-06-18

申请号：US12188956

申请日：2008-08-08

申请人： Kap-Soo YOON ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo YOON ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  H01L29/778 ,  H01L29/78687

摘要： A thin-film transistor (TFT) includes a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The semiconductor pattern includes an active layer being overlapped with the gate electrode and a low band gap portion having a lower energy band gap than the active layer. The source and drain electrodes are spaced apart from each other to be overlapped with the semiconductor pattern. Therefore, the semiconductor pattern includes a low band gap portion having a lower energy band gap than the active layer, so that electron mobility may be increased in a channel formed along the low band gap portion so that electric characteristics of the TFT may be enhanced.

摘要翻译： 薄膜晶体管（TFT）包括栅电极，半导体图案，源电极和漏电极。 半导体图案包括与栅电极重叠的有源层和具有比有源层更低的能带隙的低带隙部分。 源极和漏极彼此间隔开以与半导体图案重叠。 因此，半导体图案包括具有比有源层低的能带隙的低带隙部分，使得沿着低带隙部分形成的沟道中的电子迁移率可能增加，从而可以提高TFT的电特性。

公开(公告)号：US09178024B2

公开(公告)日：2015-11-03

申请号：US13464613

申请日：2012-05-04

申请人： Ki-Won Kim ,  Kap Soo Yoon ,  Woo Geun Lee ,  Jin-Won Lee ,  Se-Myung Kwon ,  Jung Ouck Ahn ,  Si Jin Kim

发明人： Ki-Won Kim ,  Kap Soo Yoon ,  Woo Geun Lee ,  Jin-Won Lee ,  Se-Myung Kwon ,  Jung Ouck Ahn ,  Si Jin Kim

IPC分类号： H01L21/00 ,  H01L29/417 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/41733 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/78696

摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括：在基板上形成从栅极线突出的栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层; 在栅极绝缘层上依次沉积半导体材料和金属材料; 使用第一掩模对所述半导体材料和所述金属材料进行第一蚀刻操作以形成半导体层和金属层，所述金属层包括数据线，源电极和漏电极，其中所述漏电极突出 数据线，源电极和漏电极具有整体形状; 以及使用第二掩模对所述金属层进行第二蚀刻操作以分割所述源电极和所述漏电极。

公开(公告)号：US09153600B2

公开(公告)日：2015-10-06

申请号：US13618308

申请日：2012-09-14

申请人： Hye Young Ryu ,  Hee Jun Byeon ,  Woo Geun Lee ,  Kap Soo Yoon ,  Yoon Ho Kim ,  Chun Won Byun

发明人： Hye Young Ryu ,  Hee Jun Byeon ,  Woo Geun Lee ,  Kap Soo Yoon ,  Yoon Ho Kim ,  Chun Won Byun

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  H01L27/12

CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262

摘要： A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板及其制造方法在由有机绝缘体形成的第二钝化层中形成接触孔，通过用由保护构件形成的保护构件覆盖来保护接触孔的一侧 与第一场产生电极相同的层并由透明导电材料形成，并且使用保护构件作为掩模，将第二钝化层下面的第一钝化层蚀刻。 因此，可以防止由有机绝缘体形成的第二钝化层在蚀刻第二钝化层下方的绝缘层的同时进行过蚀刻，从而防止接触孔过宽。

公开(公告)号：US08866137B2

公开(公告)日：2014-10-21

申请号：US13365704

申请日：2012-02-03

申请人： Jin-Won Lee ,  Woo Geun Lee ,  Kap Soo Yoon ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Hee-Jun Byeon ,  Ji-Soo Oh

发明人： Jin-Won Lee ,  Woo Geun Lee ,  Kap Soo Yoon ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Hee-Jun Byeon ,  Ji-Soo Oh

IPC分类号： H01L29/12 ,  H01L27/12 ,  H01L29/417

CPC分类号： H01L27/1225 ,  H01L29/41733

摘要： A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.

摘要翻译： 薄膜晶体管阵列面板包括：设置在绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 直接设置在栅极绝缘层上的第一电极和氧化物半导体; 形成在所述氧化物半导体上的源电极和漏电极; 设置在所述第一电极，所述源电极和所述漏电极上的钝化层; 以及设置在钝化层上的第二电极。

公开(公告)号：US08822995B2

公开(公告)日：2014-09-02

申请号：US12486542

申请日：2009-06-17

申请人： Chun-Gi You ,  Kap-Soo Yoon ,  Gug-Rae Jo ,  Sung-Hoon Yang ,  Ki-Hun Jeong ,  Seung-Hwan Shim ,  Jae-Ho Choi

发明人： Chun-Gi You ,  Kap-Soo Yoon ,  Gug-Rae Jo ,  Sung-Hoon Yang ,  Ki-Hun Jeong ,  Seung-Hwan Shim ,  Jae-Ho Choi

IPC分类号： H01L29/04 ,  H01L27/12 ,  H01L27/32 ,  H01L29/786

CPC分类号： H01L27/1251 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/7869

摘要： A display substrate includes a switching transistor electrically connected to a gate line and a data line, the data line extending in a first direction substantially perpendicular to the gate line extending in a second direction, the switching transistor including a switching active pattern comprising amorphous silicon, a driving transistor electrically connected to a driving voltage line and the switching transistor, the driving voltage line extended in the first direction, the driving transistor including a driving active pattern comprising a metal oxide; and a light-emitting element electrically connected to the driving transistor.

摘要翻译： 显示基板包括电连接到栅极线和数据线的开关晶体管，所述数据线在基本上垂直于在第二方向延伸的栅极线的第一方向上延伸，所述开关晶体管包括包含非晶硅的开关有源图案， 电连接到驱动电压线的驱动晶体管和所述开关晶体管，所述驱动电压线在所述第一方向上延伸，所述驱动晶体管包括包含金属氧化物的驱动有源图案; 以及电连接到驱动晶体管的发光元件。