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公开(公告)号：US20240097875A1
公开(公告)日：2024-03-21
申请号：US18161995
申请日：2023-01-31
Applicant: Apple Inc.
Inventor： Ryan D. Bartling , Jafar Savoj
CPC classification number: H04L7/0058 , H04L7/0062 , H04L7/02 , H04L7/0066
Abstract: A serial data receiver circuit included in a computer system may include both an analog and an ADC-based receiver circuit. A front-end circuit generates different equalized signals based on received signals that encode a serial data stream that includes multiple data symbols. During startup of a communication channel, phase information generated by the analog receiver circuit may be used to generate clock signals for the ADC-based receiver circuit. After a period of time, the ADC-based receiver circuit can generate its own phase information to be used in the generation of the clock signals.
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公开(公告)号：US20240097874A1
公开(公告)日：2024-03-21
申请号：US18319421
申请日：2023-05-17
Applicant: Apple Inc.
Inventor： Ryan D. Bartling , Jafar Savoj
CPC classification number: H04L7/0029 , H04B1/04 , H04L7/033
Abstract: A serial data receiver circuit included in a computer system may include a front-end circuit, a sample circuit that includes multiple analog-to-digital converter circuits, and a recovery circuit. The sample circuit may sample a serial data stream at different times that correspond to even-numbered and odd-numbered symbols in the serial data stream. The recovery circuit may use different coefficients to process the respective samples of the even-numbered and odd-numbered symbols in order to recover the data symbols encoded in the serial data stream.
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公开(公告)号：US20240061460A1
公开(公告)日：2024-02-22
申请号：US17820143
申请日：2022-08-16
Applicant: Apple Inc.
Inventor： Bo Sun , Jafar Savoj
IPC: G05F3/26 , H03K19/0185
CPC classification number: G05F3/262 , H03K19/018521
Abstract: A current mirror circuit included in a computer system that includes a mirror stage circuit and a feedback circuit is disclosed. The mirror stage circuit generates a mirror current in an output node using a reference current. The feedback circuit adjusts the value of the mirror current based on a voltage level of the output node to increase the output impedance of the current mirror circuit.
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公开(公告)号：US11671103B2
公开(公告)日：2023-06-06
申请号：US17571228
申请日：2022-01-07
Applicant: Apple Inc.
Inventor： Ramy A. Ahmed , Bruno W. Garlepp , Jafar Savoj
IPC: H03K21/00 , H03K21/40 , H03K3/03 , H03K19/0175 , H03K21/08
CPC classification number: H03K21/403 , H03K3/0315 , H03K19/017509 , H03K21/08
Abstract: A circuit for sensing local operating properties of an integrated circuit is disclosed. The circuit may include one or more sensor circuits configured to sense the local operating properties of the integrated circuit. The sensor circuits may receive a supply voltage with a magnitude in a limited range from a digital power supply that is different from the digital power supply that provides power to functional circuits in the integrated circuit. Level shifters may be coupled to the sensor circuits to shift output signals from the sensor circuits to levels that correspond to the digital power supply that provides power to functional circuits in the integrated circuit. Counters and a shift register may be coupled to the level shifters to receive the shifted output signals, the values of which may be used to determine the local operating properties of the integrated circuit as sensed by the sensor circuits.
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公开(公告)号：US11658671B2
公开(公告)日：2023-05-23
申请号：US17482322
申请日：2021-09-22
Applicant: Apple Inc.
Inventor： Ryan D. Bartling , Jafar Savoj , Brian S. Leibowitz , Shah M. Sharif
CPC classification number: H03M1/0687 , H03M1/0626 , H03M1/0648 , H03M1/0663
Abstract: A serial data receiver circuit included in a computer system may include a front-end circuit, a sample circuit that includes multiple analog-to-digital converter circuits, and a recovery circuit. The front-end circuit may generate an equalized signal using multiple signals that encode a serial data stream of multiple data symbols. Based on a baud rate of the serial data stream, a determined number of the multiple analog-to-digital converter circuits sample, using a recovered clock signal, the equalized signal at the respective times to generate corresponding samples. The recovery circuit generates, using the samples, the recovered clock signal and recovered data symbols.
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Patent Agency Ranking
公开(公告)号：US11502880B1
公开(公告)日：2022-11-15
申请号：US17478069
申请日：2021-09-17
Applicant: Apple Inc.
Inventor： Ryan D. Bartling , Jafar Savoj , Brian S. Leibowitz
Abstract: A receiver converter circuit included in a computer system may receive multiple signals that encode a serial data stream that encode multiple data symbols. To correct for baseline wander, the receiver circuit may generate a disparity signal that is used to control the application of a differential voltage to the multiple signals. The receiver circuit may also employ the disparity signal to generate a gradient against which the magnitude of differential voltage is calibrated.
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公开(公告)号：US20210263080A1
公开(公告)日：2021-08-26
申请号：US16796405
申请日：2020-02-20
Applicant: Apple Inc.
Inventor： Ramy A. Ahmed , Bruno W. Garlepp , Jafar Savoj
IPC: G01R19/255 , H03K19/0175 , H03K21/08 , H03K3/03 , G01K7/00
Abstract: A circuit for sensing local operating properties of an integrated circuit is disclosed. The circuit may include one or more sensor circuits configured to sense the local operating properties of the integrated circuit. The sensor circuits may receive a supply voltage with a magnitude in a limited range from a digital power supply that is different from the digital power supply that provides power to functional circuits in the integrated circuit. Level shifters may be coupled to the sensor circuits to shift output signals from the sensor circuits to levels that correspond to the digital power supply that provides power to functional circuits in the integrated circuit. Counters and a shift register may be coupled to the level shifters to receive the shifted output signals, the values of which may be used to determine the local operating properties of the integrated circuit as sensed by the sensor circuits.
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公开(公告)号：US20200235856A1
公开(公告)日：2020-07-23
申请号：US16253100
申请日：2019-01-21
Applicant: Apple Inc.
Inventor： Jafar Savoj , Praveen R. Singh , Brian S. Leibowitz , Emerson S. Fang
IPC: H04L1/02 , H03K19/0175
Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.
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公开(公告)号：US20200217729A1
公开(公告)日：2020-07-09
申请号：US16735600
申请日：2020-01-06
Applicant: Apple Inc.
Inventor： Daniel J. Fritchman , Jafar Savoj
Abstract: Reference center circuitry for a metrology system is disclosed. In one embodiment, the circuitry includes a reference sensor having a topology and characteristics identical to a number of sensors throughout an IC. The both the reference sensor and the sensors on the IC may be used to perform voltage and temperature measurements. The reference sensor may receive a voltage from a precision voltage supply, and may be used as a sensor to provide a basis for calibrating the other sensors, as well. Thereafter, temperature readings obtained from the other sensors may be correlated to the readings obtained by the reference sensor for enhanced accuracy. The reference center circuitry also includes analog process monitoring circuitry, which may be coupled to some, if not all of the transistors implemented on an IC.
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公开(公告)号：US10521391B1
公开(公告)日：2019-12-31
申请号：US16204252
申请日：2018-11-29
Applicant: Apple Inc.
Inventor： Jafar Savoj , Jose A. Tierno , Sanjeev K. Maheshwari , Brian S. Leibowitz , Pradeep R. Trivedi , Gin Yee , Emerson S. Fang
Abstract: A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.
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