公开(公告)号：US20230006070A1

公开(公告)日：2023-01-05

申请号：US17782035

申请日：2021-05-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jie Huang ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Jiayu He ,  Nianqi Yao ,  Kun Zhao ,  Feng Qu ,  Xiaochun Xu

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.

公开(公告)号：US11508786B2

公开(公告)日：2022-11-22

申请号：US16835722

申请日：2020-03-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jiayu He ,  Xue Liu ,  Zhengliang Li

IPC: H01L27/32 ,  H01L31/105 ,  H01L31/18 ,  H01L27/12

Abstract: The disclosure provides a display backplane, a method of manufacturing the same, and a display device using the same. The display backplane includes a substrate; a thin film transistor structure layer disposed on one side of the substrate and including thin film transistors, a gate insulating layer, and an interlayer dielectric layer, where an etching rate of the interlayer dielectric layer carried out under an HF atmosphere condition is less than 2 Å/S; and photosensitive devices spaced apart from the thin film transistor structure layer and disposed on one side of the thin film transistor structure layer away from the substrate. The interlayer dielectric layer has a high compactness, and can effectively block H from entering the active layer of the thin film transistor to conductorize the active layer, thus guaranteeing good optical characteristics of the thin film transistor while carrying out optical compensation.

公开(公告)号：US20220344517A1

公开(公告)日：2022-10-27

申请号：US17763297

申请日：2021-04-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jie Huang ,  Zhengliang Li ,  Ce Ning ,  Hehe Hu ,  Nianqi Yao ,  Kun Zhao ,  Fengjuan Liu ,  Tianmin Zhou ,  Liping Lei

IPC: H01L29/786

Abstract: A thin film transistor includes a gate electrode, an active layer, a gate insulating layer located between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer. The active layer includes a channel layer and at least one channel protection layer; a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material. The at least one channel protection layer is a crystallizing layer, and metal elements of the at least one channel protection layer include non-rare earth metal elements including In, Ga, Zn and Sn.

公开(公告)号：US11446661B2

公开(公告)日：2022-09-20

申请号：US16643464

申请日：2019-03-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen Ma ,  Guangcai Yuan ,  Ce Ning ,  Zhengliang Li

IPC: B01L3/00 ,  G01N35/10

Abstract: A microfluidic channel and a preparation method and an operation method thereof. The microfluidic channel includes: a channel structure, including a channel for a liquid sample to flow through and a channel wall surrounding the channel. The channel wall includes an electrolyte layer made of an electrolyte material; and a control electrode layer, at a side of the electrolyte layer away from the channel. The control electrode layer overlaps with the electrolyte layer with respect to the channel.

公开(公告)号：US10281782B2

公开(公告)日：2019-05-07

申请号：US15229601

申请日：2016-08-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhengliang Li ,  Shi Shu ,  Zhanfeng Cao ,  Bin Zhang ,  Xiaolong He ,  Qi Yao ,  Jincheng Gao ,  Feng Guan ,  Xuefei Sun

IPC: H01L21/02 ,  G02F1/1362 ,  H01L27/12

Abstract: A manufacturing method of an array substrate, an array substrate and a display device are provided. The method includes the following operations: forming a light shielding layer formed of a metal blacken production on a base substrate, wherein the metal blacken production is a product by blackening a metal; forming a preset film layer on the base substrate which is provided with the light shielding layer; forming both a pattern of the light shielding layer and a pattern of the preset film layer through one patterning process. The method of forming a pattern of the light shielding layer and a pattern of the preset film layer through one patterning process saves one patterning process.

公开(公告)号：US10217353B2

公开(公告)日：2019-02-26

申请号：US15327412

申请日：2016-06-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Guan ,  Zhanfeng Cao ,  Zhengliang Li ,  Qi Yao ,  Yaohui Gu

IPC: H04B10/116 ,  G08C23/04 ,  G06F3/14 ,  G05B15/02

Abstract: A data transmitting method, a data receiving method and the related device and system are provided. The data transmitting device includes a display screen, a first determination module, configured to determine one or more transmitting regions of the display screen, and a transmitting module, configured to transmit, by controlling a display of the one or more transmitting regions, target data in a format of a machine language via optical signals. The data receiving device includes a panel on which a plurality of optical sensors is arranged, a second determination module, configured to determine one or more receiving regions of the panel each corresponding to one or more of the optical sensor, and a receiving module, configured to receive, through each optical sensor in the one or more receiving regions, target data in a format of a machine language transmitted via optical signals.

公开(公告)号：US10199504B2

公开(公告)日：2019-02-05

申请号：US14905251

申请日：2015-08-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhengliang Li ,  Qi Yao ,  Zhanfeng Cao ,  Bin Zhang ,  Xiaolong He ,  Jincheng Gao ,  Xiangchun Kong ,  Wei Zhang

IPC: H01L29/10 ,  H01L29/786 ,  H01L21/28 ,  H01L27/12 ,  H01L29/45 ,  H01L29/49

Abstract: Embodiments of the present invention disclose a thin film transistor and a manufacturing method thereof, an array substrate, and a display device, which relates to the field of display technology, and solves the problem that the adhesion of the electrode thin film with the adjacent thin film layer in the thin film transistor of the prior art is relatively bad. More specifically, an embodiment of the present invention provides a thin film transistor, comprising a gate, a source, a drain and a buffer layer, the buffer layer is located at one side or two sides of the gate, the source or the drain, the material of the buffer layer is a copper alloy material, the copper alloy material contains nitrogen element or oxygen element, the copper alloy material further contains aluminum element.

公开(公告)号：US10192893B2

公开(公告)日：2019-01-29

申请号：US14895352

申请日：2015-05-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhanfeng Cao ,  Feng Zhang ,  Qi Yao ,  Jincheng Gao ,  Bin Zhang ,  Xiaolong He ,  Zhengliang Li ,  Wei Zhang

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1345

Abstract: An array substrate and a display device are provided. The array substrate comprises a plurality of signal lines (40), a plurality of connecting lines (50) and a driving module (60) in a peripheral region (1) outside a display region (2); the connecting lines (50) are configured for connecting the signal lines (40) and the driving module (60), to transmit signal from the signal lines (40) to the driving module (60), wherein, at least one of the connecting lines (50) and at least one of the signal lines (40) are designed to intersect with and insulated from each other in a first region (N). The at least one of the signal lines (40) includes, in a second region (0) other than the first region (N), a first electrode line layer (401) and a second electrode line layer (402), while, in the first region (N), includes the first electrode line layer (401) but does not include the second electrode line layer (402). The array substrate may prevent problems of electrostatic accumulation or short circuit from occurring between the connecting lines (50) and the second electrode line layer (402).

公开(公告)号：US10181482B2

公开(公告)日：2019-01-15

申请号：US15306550

申请日：2016-02-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhengliang Li ,  Qi Yao ,  Bin Zhang ,  Zhanfeng Cao ,  Wei Zhang ,  Xuefei Sun ,  Bin Zhou ,  Jincheng Gao

IPC: H01L29/12 ,  H01L27/12 ,  H01L21/027 ,  H01L29/786

Abstract: According to an embodiment of the present disclosure, a method for manufacturing the array substrate includes forming a first transparent conductive layer and a metallic layer successively on a base substrate, and forming a gate electrode, a source electrode, a drain electrode and a first transparent electrode by one patterning process.

公开(公告)号：US10126544B2

公开(公告)日：2018-11-13

申请号：US15525445

申请日：2016-07-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaolong He ,  Zhanfeng Cao ,  Qi Yao ,  Bin Zhang ,  Zhengliang Li ,  Wei Zhang ,  Tingting Zhou ,  Jincheng Gao ,  Jiushi Wang

IPC: G02B26/00

Abstract: A display panel includes a first substrate and a second substrate which are arranged opposed to each other. The space between the first substrate and the second substrate is separated into a plurality of sub-pixel regions. Within each sub pixel region, a first electrode, a first fluid layer, a second fluid layer, a hydrophobic dielectric layer and a second electrode are arranged in this order. The first fluid layer is made of hydrophilic liquid. The second fluid layer is made of ink. When no electric field is applied between the first electrode and the second electrode, the ink spreads over the surface of the hydrophobic dielectric layer. When an electric field is applied between the first electrode and the second electrode, the ink aggregates to expose the hydrophobic dielectric layer.