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    Quantum processor with instance programmable qubit connectivity
    41.
    发明授权
    Quantum processor with instance programmable qubit connectivity 有权

    公开(公告)号：US10891554B2

    公开(公告)日：2021-01-12

    申请号：US16258082

    申请日：2019-01-25

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Richard G. Harris ,  Paul I. Bunyk ,  Mohammad H. S. Amin ,  Emile M. Hoskinson

    IPC: G06N10/00 ,  G06F15/82

    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

    Systems and methods for fabrication of superconducting integrated circuits
    42.
    发明授权
    Systems and methods for fabrication of superconducting integrated circuits 有权

    公开(公告)号：US10700256B2

    公开(公告)日：2020-06-30

    申请号：US15679963

    申请日：2017-08-17

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Eric Ladizinsky ,  Jeremy P. Hilton ,  Byong Hyop Oh ,  Paul I. Bunyk

    IPC: H01L39/24 ,  H01L27/18 ,  H01L39/22 ,  H01L21/285 ,  H01L39/02 ,  H01L39/12 ,  B82Y10/00 ,  H01L21/768 ,  G06N10/00

    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.

    Systems and methods for increasing analog processor connectivity
    45.
    发明授权
    Systems and methods for increasing analog processor connectivity 有权

    公开(公告)号：US10268622B2

    公开(公告)日：2019-04-23

    申请号：US15418497

    申请日：2017-01-27

    Applicant: D-Wave Systems Inc.

    Inventor： Jeremy P. Hilton ,  Aidan Patrick Roy ,  Paul I. Bunyk ,  Andrew Douglas King ,  Kelly T. R. Boothby ,  Richard G. Harris ,  Chunqing Deng

    IPC: G06F13/40 ,  G06F13/36 ,  G06N99/00

    Abstract: Topologies for analog computing systems are provided. Qubits in the topology are grouped into cells, and cells are coupled to adjacent cells by inter-cell couplers. At least some cells are coupled to non-adjacent cells via long-range couplers. Long-range couplers may be arranged into coverings so that certain sets of qubits within a covering region may be coupled with a reduced number of couplers. Each cell within a covering region without a long-range coupler may be proximate to a cell with a long range coupler so that each cell within the covering region is no more than a certain coupling distance away from a long-range coupler. Long-range couplers may couple over a greater physical distance than inter-cell couplers. Long-range couplers may couple to qubits over a larger coupling region, and may extend across multiple crossing regions between qubits.

    Systems and methods for superconducting integrated circuits
    49.
    发明授权
    Systems and methods for superconducting integrated circuits 有权
    超导集成电路的系统和方法

    公开(公告)号：US09355365B2

    公开(公告)日：2016-05-31

    申请号：US14255561

    申请日：2014-04-17

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Andrew J. Berkley ,  Mark W. Johnson ,  Paul I. Bunyk

    IPC: H01L39/00 ,  G06N99/00 ,  B82Y10/00 ,  H01L23/532 ,  H01L27/18

    CPC classification number: G06N99/002 ,  B82Y10/00 ,  H01L23/53285 ,  H01L27/18 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A superconducting integrated circuit may include a magnetic flux transformer having an inner inductive coupling element and an outer inductive coupling element that surrounds the inner inductive coupling element along at least a portion of a length thereof. The magnetic flux transformer may have a coaxial-like geometry such that a mutual inductance between the first inductive coupling element and the second inductive coupling element is sub-linearly proportional to a distance that separates the first inner inductive coupling element from the first outer inductive coupling element. At least one of the first inductive coupling element and the second inductive coupling element may be coupled to a superconducting programmable device, such as a superconducting qubit.

    Abstract translation: 超导集成电路可以包括具有内部感应耦合元件和外部感应耦合元件的磁通量变换器，该外部感应耦合元件沿其长度的至少一部分围绕内部感应耦合元件。 磁通变压器可以具有类似同轴的几何形状，使得第一感应耦合元件和第二感应耦合元件之间的互感与将第一内部感应耦合元件与第一外部电感耦合器分开的距离成亚线性比例 元件。 第一电感耦合元件和第二电感耦合元件中的至少一个可以耦合到超导可编程器件，例如超导量子位。

    Systems, methods and apparatus for active compensation of quantum processor elements
    50.
    发明授权
    Systems, methods and apparatus for active compensation of quantum processor elements 有权
    用于量子处理器元件的主动补偿的系统，方法和装置

    公开(公告)号：US09152923B2

    公开(公告)日：2015-10-06

    申请号：US13958339

    申请日：2013-08-02

    Applicant: D-Wave Systems Inc.

    Inventor： Richard G. Harris ,  Andrew J. Berkley ,  Jan Johansson ,  Mark Johnson ,  Mohammad Amin ,  Paul I. Bunyk

    IPC: G06N99/00 ,  B82Y10/00 ,  H01L39/22

    CPC classification number: H01L39/223 ,  B82Y10/00 ,  G06N99/002 ,  H01L27/18

    Abstract: Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of a quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface.

    Abstract translation: 装置和方法使得能够对量子处理器的超导元件中的不期望的差异进行主动补偿。 量子位可以包括主复合约瑟夫逊结（CJJ）结构，其可以包括至少第一次级CJJ结构，以能够补偿主CJJ结构中的约瑟夫逊结不对称性。 量子位可以包括与第一CJJ结构并联耦合以提供可调电容的串联LC电路。 量子比特控制系统可以包括用于调整量子比特环的电感的装置，例如感应耦合到量子位循环并由编程接口控制的可调谐耦合器，或与量子位循环串联耦合并由编程接口控制的CJJ结构 。

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