公开(公告)号：US07001781B2

公开(公告)日：2006-02-21

申请号：US10672306

申请日：2003-09-26

申请人： Jenny Lian ,  Ulrich Egger ,  Haoren Zhuang

发明人： Jenny Lian ,  Ulrich Egger ,  Haoren Zhuang

IPC分类号： H01L21/475

CPC分类号： H01L28/60 ,  H01L21/31122 ,  H01L21/32136 ,  H01L21/32139 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/57 ,  H01L28/75

摘要： A method for fabricating a device and a device, such as a ferroelectric capacitor, having a substrate, a contact plug through the substrate, a first barrier layer on the substrate, a first electrode on the first barrier layer, a dielectric layer on the first electrode, and a second electrode on the dielectric layer, comprises etching the second electrode and the dielectric layer of the device using a first hardmask, to shape the second electrode and the dielectric layer. The first hardmask is then removed and one or more encapsulating layers are applied to the second electrode and the dielectric layer. A further hardmask is applied to the one or more encapsulating layers. The first electrode is then etched according to the second hardmask down to the first barrier layer and the second hardmask is then removed from the one or more encapsulating layers.

摘要翻译： 一种用于制造器件和器件的方法，例如铁电电容器，具有衬底，通过衬底的接触插塞，衬底上的第一阻挡层，第一阻挡层上的第一电极，第一阻挡层上的电介质层 电极和第二电极，包括使用第一硬掩模蚀刻该器件的第二电极和介电层，以使第二电极和电介质层成型。 然后去除第一硬掩模，并且将一个或多个封装层施加到第二电极和电介质层。 另外的硬掩模应用于一个或多个封装层。 然后根据第二硬掩模将第一电极蚀刻到第一阻挡层，然后从一个或多个封装层移除第二硬掩模。

公开(公告)号：US20050045937A1

公开(公告)日：2005-03-03

申请号：US10654376

申请日：2003-09-03

申请人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

发明人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

IPC分类号： H01L21/02 ,  H01L21/3213 ,  H01L21/8246 ,  H01L21/00 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L28/60 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

摘要： An Iridium barrier layer is between a contact plug and a bottom electrode of a capacitor. Etching is performed to pattern the bottom electrode and barrier layer using a fluorine-based recipe resulting in the formation of a first fence clinging to the sidewalls. Next the remaining barrier layer is etched using a CO-based recipe. A second fence is formed clinging to and structurally supported by the first fence. At the same time, the CO-based recipe etches away a substantial portion of the first fence to remove the structural support provided to the second fence. The second fence is therefore lifted-off from the sidewalls leaving the sidewalls substantially free of clinging fences. The etched barrier layer has a sidewall transition. The sidewalls have a relatively low taper angle above the sidewall transition and a relatively steep taper angle below the sidewall transition.

摘要翻译： 铱屏障层位于电容器的接触插塞和底部电极之间。 进行蚀刻以使用氟基配方对底部电极和阻挡层进行图案化，从而形成紧贴在侧壁上的第一栅栏。 接下来，使用基于CO的配方蚀刻剩余的阻挡层。 第二个围栏是由第一个围栏固定在结构上。 同时，基于CO的配方消除了第一篱笆的大部分，以移除提供给第二篱笆的结构支撑。 因此，第二围栏从侧壁脱离，留下侧壁基本上没有附着的栅栏。 蚀刻的阻挡层具有侧壁过渡。 侧壁在侧壁过渡之上具有相对较低的锥角，并且在侧壁过渡之下具有相对较陡的锥角。

公开(公告)号：US07316980B2

公开(公告)日：2008-01-08

申请号：US10678758

申请日：2003-10-02

申请人： Haoren Zhuang ,  Ulrich Egger ,  Rainer Bruchhaus ,  Karl Hornik ,  Jenny Lian ,  Stefan Gernhardt

发明人： Haoren Zhuang ,  Ulrich Egger ,  Rainer Bruchhaus ,  Karl Hornik ,  Jenny Lian ,  Stefan Gernhardt

IPC分类号： H01L21/302

CPC分类号： H01L27/11502 ,  H01L21/31122 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/60

摘要： Ferrocapacitors having a vertical structure are formed by a process in which a ferroelectric layer is deposited over an insulator. In a first etching stage, the ferroelectric material is etched to form openings in it, leaving the insulating layer substantially intact. Then a conductive layer is deposited into the openings formed in the ferroelectric layer, forming electrodes on the sides of the openings. Further etching is performed to form gaps in the Al2O3 layer, for making connections to conductive elements beneath it. Thus, by the time the second etching step is performed; there are already electrodes overlying the sides of the ferroelectric material, without insulating fences in between.

摘要翻译： 具有垂直结构的铁电体通过在绝缘体上沉积铁电体层的工艺形成。 在第一蚀刻阶段中，铁电材料被蚀刻以在其中形成开口，从而使绝缘层基本上完好无损。 然后，将导电层沉积到形成在铁电层中的开口中，在开口的侧面形成电极。 执行进一步蚀刻以在Al 2 O 3层中形成间隙，以便连接到其下方的导电元件。 因此，在进行第二蚀刻步骤的时候， 已经有电极覆盖在铁电材料的两侧，其间没有绝缘栅栏。

公开(公告)号：US20060071258A1

公开(公告)日：2006-04-06

申请号：US10961079

申请日：2004-10-12

申请人： Kazuhiro Tomioka ,  Tomoaki Ishida ,  Masatoshi Fukushima ,  Masanobu Baba ,  Hiroyuki Kanaya ,  Haoren Zhuang

发明人： Kazuhiro Tomioka ,  Tomoaki Ishida ,  Masatoshi Fukushima ,  Masanobu Baba ,  Hiroyuki Kanaya ,  Haoren Zhuang

IPC分类号： H01L29/94

CPC分类号： H01L28/65 ,  H01L21/0334 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L28/55

摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a dielectric film provided on the bottom electrode, and a top electrode provided on the dielectric film, a mask film provided on the top electrode and used as a mask when a pattern of the capacitor is formed, wherein an inclination of a side surface of the mask film is gentler than an inclination of a side surface of the top electrode and an inclination of a side surface of the dielectric film.

摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底部电极的电容器，设置在底部电极上的电介质膜和设置在电介质膜上的顶部电极，设置在顶部电极上的掩模膜 并且当形成电容器的图案时用作掩模，其中掩模膜的侧表面的倾斜度比顶部电极的侧表面的倾斜度和电介质膜的侧表面的倾斜度更柔和。

公开(公告)号：US07015049B2

公开(公告)日：2006-03-21

申请号：US10654376

申请日：2003-09-03

申请人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

发明人： Ulrich Egger ,  Haoren Zhuang ,  George Stojakovic ,  Kazuhiro Tomioka

IPC分类号： H01L21/00

CPC分类号： H01L28/60 ,  H01L21/32136 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

摘要： An Iridium barrier layer is between a contact plug and a bottom electrode of a capacitor. Etching is performed to pattern the bottom electrode and barrier layer using a fluorine-based recipe resulting in the formation of a first fence clinging to the sidewalls. Next the remaining barrier layer is etched using a CO-based recipe. A second fence is formed clinging to and structurally supported by the first fence. At the same time, the CO-based recipe etches away a substantial portion of the first fence to remove the structural support provided to the second fence. The second fence is therefore lifted-off from the sidewalls leaving the sidewalls substantially free of clinging fences. The etched barrier layer has a sidewall transition. The sidewalls have a relatively low taper angle above the sidewall transition and a relatively steep taper angle below the sidewall transition.

摘要翻译： 铱屏障层位于电容器的接触插塞和底部电极之间。 进行蚀刻以使用氟基配方对底部电极和阻挡层进行图案化，从而形成紧贴在侧壁上的第一栅栏。 接下来，使用基于CO的配方蚀刻剩余的阻挡层。 第二个围栏是由第一个围栏固定在结构上。 同时，基于CO的配方消除了第一篱笆的大部分，以移除提供给第二篱笆的结构支撑。 因此，第二围栏从侧壁脱离，留下侧壁基本上没有附着的栅栏。 蚀刻的阻挡层具有侧壁过渡。 侧壁在侧壁过渡之上具有相对较低的锥角，并且在侧壁过渡之下具有相对较陡的锥角。

公开(公告)号：US20060009040A1

公开(公告)日：2006-01-12

申请号：US10886668

申请日：2004-07-09

申请人： Kazuhiro Tomioka ,  Haoren Zhuang

发明人： Kazuhiro Tomioka ,  Haoren Zhuang

IPC分类号： H01L21/302 ,  B08B6/00 ,  C25F5/00

CPC分类号： H01L21/02071 ,  H01L21/67069 ,  H01L27/10852 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

摘要： A method for manufacturing a semiconductor device including a substrate to be processed having a conductive layer essentially consisting of platinum includes etching the conductive layer, and generating plasma and cleaning the substrate, to which an etching product adhere, by means of ions in the plasma. The cleaning includes heating the substrate to a first temperature, introducing gas, which contains chlorine and nitrogen and in which a ratio of chlorine atoms to nitrogen atoms is 9:1 to 5:5, and applying high-frequency power to an electrode, on which the substrate is placed.

公开(公告)号：US20050084984A1

公开(公告)日：2005-04-21

申请号：US10678952

申请日：2003-10-02

申请人： Haoren Zhuang ,  Rainer Bruchhaus ,  Ulrich Egger ,  Jenny Lian ,  Nicolas Nagel

发明人： Haoren Zhuang ,  Rainer Bruchhaus ,  Ulrich Egger ,  Jenny Lian ,  Nicolas Nagel

IPC分类号： H01L21/02 ,  H01L21/8246 ,  H01L27/115 ,  H01L31/119

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

摘要： A vertical capacitor of an FeRAM device is formed by depositing conductive material and etching it to form electrodes, which are located over openings in an insulating layer so that they are electrically connected to lower levels of the structure. A layer of ferroelectric material is formed on the sides of the electrodes, and etched to a desired, uniform thickness. Conductive material is deposited over the ferroelectric material to form a uniform surface onto which another insulating layer can be deposited. Since this process does not include etching of an insulating layer at a time between the formation of the electrodes and the deposition of the ferroelectric material, no fences of insulating material are formed between them. The geometry can be accurately controlled, to give uniform electric fields and reliable operating parameters.

摘要翻译： FeRAM器件的垂直电容器通过沉积导电材料并进行蚀刻而形成，以形成位于绝缘层中的开口上方的电极，使得它们电连接到结构的较低层。 在电极的侧面形成铁电材料层，并且蚀刻到期望的均匀厚度。 导电材料沉积在铁电材料上以形成可沉积另一绝缘层的均匀表面。 由于该方法不包括在形成电极之间的时间刻蚀绝缘层和铁电体的沉积，所以在它们之间不形成绝缘材料栅栏。 几何形状可以精确控制，给出均匀的电场和可靠的工作参数。

公开(公告)号：US20050070030A1

公开(公告)日：2005-03-31

申请号：US10672308

申请日：2003-09-26

申请人： Stefan Gernhardt ,  Haoren Zhuang ,  Ulrich Egger

发明人： Stefan Gernhardt ,  Haoren Zhuang ,  Ulrich Egger

IPC分类号： H01L21/02 ,  H01L21/00

CPC分类号： H01L28/60

摘要： A device and method for fabricating a device comprises forming a substrate and forming a contact plug through the substrate. A first electrode is formed on the substrate and a dielectric layer is formed on the first electrode. A second electrode is formed on the ferroelectric layer and an interlayer dielectric layer is applied to the second electrode and exposed surfaces of the first electrode and the ferroelectric layer. The interlayer dielectric layer is subjected to a chemical mechanical polishing process to expose a surface of the second electrode and a metal layer is deposited onto the polished interlayer dielectric layer and the exposed surface of the second electrode. The metal layer is then etched to provide an interconnection pattern to the second electrode.

摘要翻译： 用于制造器件的器件和方法包括形成衬底并通过衬底形成接触插塞。 在基板上形成第一电极，在第一电极上形成电介质层。 在铁电体层上形成第二电极，在第二电极和第一电极和铁电层的露出面上施加层间电介质层。 对层间介电层进行化学机械抛光工艺以暴露第二电极的表面，并且将金属层沉积到抛光的层间介电层和第二电极的暴露表面上。 然后蚀刻金属层以提供到第二电极的互连图案。

公开(公告)号：US20050067644A1

公开(公告)日：2005-03-31

申请号：US10677099

申请日：2003-09-30

申请人： Haoren Zhuang ,  Nicolas Nagel ,  Jenny Lian ,  Rainer Bruchhaus

发明人： Haoren Zhuang ,  Nicolas Nagel ,  Jenny Lian ,  Rainer Bruchhaus

IPC分类号： H01L21/02 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65 ,  H01L28/92

摘要： A device and method for forming a capacitor device comprises forming a substrate, forming a first interlayer dielectric layer on the substrate and forming two or more contact plugs through the substrate. A conducting layer is formed on the first interlayer dielectric layer and an electrode is formed on alternate ones of the contact plugs by etching the conducting layer. The etched electrodes are then coated with a ferroelectric layer. The ferroelectric layer is etched from the surfaces separating the contact plugs and additional electrodes are created by filling the spaces between the electrodes on alternate ones of the contact plugs with a conductive material to establish electrical contact between the plugs and the electrodes.

摘要翻译： 用于形成电容器器件的器件和方法包括形成衬底，在衬底上形成第一层间电介质层，并通过衬底形成两个或更多个接触插塞。 在第一层间电介质层上形成导电层，通过蚀刻导电层，在交替的接触插塞上形成电极。 然后用铁电层涂覆蚀刻的电极。 从分离接触塞的表面蚀刻铁电层，并且通过用导电材料填充交替的接触插塞上的电极之间的空间来产生附加电极，以建立插塞和电极之间的电接触。

公开(公告)号：US06867053B2

公开(公告)日：2005-03-15

申请号：US10629326

申请日：2003-07-28

申请人： Ulrich Egger ,  Haoren Zhuang ,  Rainer Bruchhaus

发明人： Ulrich Egger ,  Haoren Zhuang ,  Rainer Bruchhaus

IPC分类号： H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/00 ,  H01L21/8234

CPC分类号： H01L28/55 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L28/65

摘要： A ferroelectric capacitor is fabricated using a noble metal hardmask. A hardmask is deposited on a top electrode of a capacitor stack comprising a ferroelectric layer sandwiched between the top electrode and a bottom electrode. The top electrode is patterned according to the pattern of the hardmask by etching at a first temperature. The top electrode serves as the noble metal hardmask and the ferroelectric layer is patterned according to the pattern of the top electrode at a second temperature lower than the first temperature, resulting in the top electrode having sidewalls beveled relative to a top surface of the top electrode etching. The bottom electrode is etched at a third temperature to form the capacitor.

摘要翻译： 使用贵金属硬掩模制造铁电电容器。 硬掩模沉积在电容器堆叠的顶部电极上，该电容器堆叠包括夹在顶部电极和底部电极之间的铁电层。 根据硬掩模的图案，通过在第一温度下蚀刻来对顶部电极进行图案化。 顶部电极用作贵金属硬掩模，并且铁电层根据顶部电极的图案在低于第一温度的第二温度下被图案化，导致顶部电极具有相对于顶部电极的顶表面倾斜的侧壁 蚀刻。 在第三温度下蚀刻底部电极以形成电容器。