公开(公告)号：US20160149046A1

公开(公告)日：2016-05-26

申请号：US14944676

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Masayoshi Fuchi ,  Hajime Watakabe ,  Takashi Okada ,  Arichika Ishiba

IPC: H01L29/786 ,  H01L21/467 ,  H01L29/66 ,  H01L29/423 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L21/467 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78696

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.

Abstract translation: 根据一个实施例，本文提供的薄膜晶体管和制造薄膜晶体管的方法通过防止栅极绝缘膜在与氧化物半导体层的端面相对应的位置处的断开而实现增强的可靠性。 氧化物半导体层包括沟道区，源极区和漏极区。 沟道区域放置在源极区域和漏极区域之间。 栅极绝缘膜在从上表面至与氧化物半导体层的上表面连续的端面的至少一部分的范围内覆盖氧化物半导体层。 氧化物半导体层形成为具有从上侧到底侧变低的氧浓度，并且端面倾斜以从顶侧向底侧发散。

公开(公告)号：US12176438B2

公开(公告)日：2024-12-24

申请号：US17549882

申请日：2021-12-14

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Kentaro Miura ,  Toshinari Sasaki ,  Takeshi Sakai ,  Akihiro Hanada ,  Masashi Tsubuku

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes an oxide semiconductor. The oxide semiconductor includes a first edge portion and a second edge portion intersecting a gate electrode, a first area overlapping the gate electrode, a second area along the first edge portion, a third area along the second edge portion, a fourth area the first edge portion, a fifth area along the second edge portion, a sixth area surrounded by the first area, the second area and the third area, and a seventh area surrounded by the first area, the fourth area and the fifth area. The first area, the second area and the third area, the fourth area and the fifth area have a higher resistivity than those of the sixth area and the seventh area.

公开(公告)号：US12166131B2

公开(公告)日：2024-12-10

申请号：US18328788

申请日：2023-06-05

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Tomoyuki Ito ,  Toshihide Jinnai ,  Isao Suzumura ,  Akihiro Hanada ,  Ryo Onodera

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  G02F1/1368

Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

公开(公告)号：US12085823B2

公开(公告)日：2024-09-10

申请号：US17987887

申请日：2022-11-16

Applicant: Japan Display Inc.

Inventor： Toshihide Jinnai ,  Hajime Watakabe ,  Akihiro Hanada ,  Ryo Onodera ,  Isao Suzumura

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786 ,  H10K59/131

CPC classification number: G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  H01L27/124 ,  H01L29/78672 ,  H10K59/131 ,  G02F2201/123

Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.

公开(公告)号：US11894387B2

公开(公告)日：2024-02-06

申请号：US17747049

申请日：2022-05-18

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Toshihide Jinnai ,  Ryo Onodera ,  Akihiro Hanada

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/1285 ,  H01L29/66742 ,  H01L29/7869

Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.

公开(公告)号：US20220223707A1

公开(公告)日：2022-07-14

申请号：US17657168

申请日：2022-03-30

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Takuo Kaitoh ,  Hajime Watakabe

IPC: H01L29/49 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1368

Abstract: The purpose of the present invention is to suppress a change in characteristics of a TFT using an oxide semiconductor film caused by that oxygen in the oxide semiconductor film is extracted by metal electrode. The main structure of the present invention is as follows. A semiconductor device having a TFT, in which a gate insulating film is formed on a gate electrode, and an oxide semiconductor film is formed on the gate insulating film; the oxide semiconductor film including a channel region, a drain region, and a source region; in which a metal nitride film is formed on a top surface of the gate electrode in an opposing portion to the channel region in a plan view; and the metal nitride film is not formed at a part of the top surface of the gate electrode.

公开(公告)号：US11177388B2

公开(公告)日：2021-11-16

申请号：US16785662

申请日：2020-02-10

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Tomoyuki Ito ,  Toshihide Jinnai ,  Isao Suzumura ,  Akihiro Hanada ,  Ryo Onodera

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/66 ,  G02F1/1368

Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

公开(公告)号：US11133337B2

公开(公告)日：2021-09-28

申请号：US16852925

申请日：2020-04-20

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Isao Suzumura ,  Akihiro Hanada ,  Yohei Yamaguchi

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

公开(公告)号：US10580801B2

公开(公告)日：2020-03-03

申请号：US15978464

申请日：2018-05-14

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe ,  Yohei Yamaguchi ,  Marina Shiokawa ,  Ryotaro Kimura

IPC: G02F1/1343 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1337 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1333 ,  H01L27/32

Abstract: The purpose of the invention is to form a flexible display device where the substrate is made of resin, wherein the TFT can be annealed in high temperature; consequently, a reliability of the TFT is improved. The concrete measure is as follows. A display device having a pixel electrode and a TFT including a semiconductor layer on a substrate comprising: a source region of the semiconductor layer connects with a source electrode, a drain region of the semiconductor layer connects with a drain electrode; the pixel electrode connects with the source electrode; the drain electrode connects with a video signal line; a distance between the drain electrode and the substrate is smaller than a distance between the semiconductor and the substrate, the semiconductor layer is formed between the pixel electrode and the substrate.

公开(公告)号：US20190041932A1

公开(公告)日：2019-02-07

申请号：US16131477

申请日：2018-09-14

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime Watakabe ,  Kazufumi Watabe

IPC: G06F1/26 ,  H04L29/08 ,  H04L12/24 ,  H02J13/00 ,  H04L12/853 ,  H04Q9/02

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.