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    Method of reducing AlCu hillocks
    41.
    发明授权
    Method of reducing AlCu hillocks 有权
    减少AlCu小丘的方法

    公开(公告)号：US6080657A

    公开(公告)日：2000-06-27

    申请号：US356008

    申请日：1999-07-16

    申请人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu

    发明人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu

    IPC分类号： H01L21/768 ,  H01L21/28

    CPC分类号： H01L21/76856 ,  H01L21/76838 ,  H01L21/76841

    摘要： A method of aluminum metallization in the manufacture of an integrated circuit device is described. An insulating layer is provided over the surface of a semiconductor substrate wherein a metal plug fills an opening through the insulating layer to the semiconductor substrate. A titanium layer is deposited over the surface of the insulating layer and the metal plug using ionized metal plasma. A titanium nitride is deposited layer overlying the titanium layer. Vacuum is broken and the titanium nitride layer is exposed to the ambient air whereby a titanium oxynitride layer forms on the surface of titanium nitride layer. An aluminum layer is sputter deposited over the titanium oxynitride layer at a high temperature of greater than about 400 .degree. C. and low power of less than or equal to 4 kilowatts. The aluminum layer will be deposited in a (111)-orientation. The metal stack is patterned to form a metal line. Hillocks and metal voids are prevented by the process of the invention.

    摘要翻译： 描述了在制造集成电路器件中的铝金属化方法。 绝缘层设置在半导体衬底的表面上，其中金属插塞将通过绝缘层的开口填充到半导体衬底。 使用电离金属等离子体在绝缘层和金属插塞的表面上沉积钛层。 氮化钛层叠在钛层上。 真空断裂，氮化钛层暴露于环境空气中，由此在氮化钛层的表面上形成氮氧化钛层。 在大于约400℃的高温和低于4千瓦的低功率下，在氮氧化钛层上溅射沉积铝层。 铝层将以（111）取向沉积。 图案化金属叠层以形成金属线。 通过本发明的方法防止了小丘和金属空隙。

    Method to improve copper via electromigration (EM) resistance
    44.
    发明授权
    Method to improve copper via electromigration (EM) resistance 有权
    通过电迁移（EM）电阻改善铜的方法

    公开(公告)号：US06500749B1

    公开(公告)日：2002-12-31

    申请号：US09810123

    申请日：2001-03-19

    申请人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu

    发明人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu

    IPC分类号： H01L214763

    CPC分类号： H01L23/53238 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/76886 ,  H01L23/53223 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method to fabricate a metal via structure having improved electromigration resistance, comprising the following steps. A semiconductor structure having an exposed metal interconnect structure therein is provided. The metal interconnect structure including a metal via portion. A capping layer is formed over the metal interconnect structure. A via pattern structure is formed over the capping layer. The via pattern structure having a via pattern hole aligned with the metal via portion of the metal interconnect structure. Ions are implanted through the via pattern hole into the metal via portion, and any portion of the metal interconnect structure above the metal via portion. Whereby the metal via portion and the portion of the metal interconnect structure above the metal via portion have improved electromigration resistance.

    摘要翻译： 一种制造具有改善的电迁移阻力的金属孔结构的方法，包括以下步骤。 提供其中具有暴露的金属互连结构的半导体结构。 金属互连结构包括金属通孔部分。 在金属互连结构上形成覆盖层。 在覆盖层上形成通孔图案结构。 通孔图案结构具有与金属互连结构的金属通孔部分对准的通孔图形孔。 离子通过通孔图案孔注入金属通孔部分中，并且金属互连结构的任何部分在金属通孔部分上方。 金属通孔部分和金属通孔部分上方的金属互连结构的部分具有改善的电迁移阻力。

    Methods for edge alignment mark protection during damascene electrochemical plating of copper
    45.
    发明授权
    Methods for edge alignment mark protection during damascene electrochemical plating of copper 有权
    铜镶嵌电镀过程中边缘对准标记保护方法

    公开(公告)号：US06492269B1

    公开(公告)日：2002-12-10

    申请号：US09755570

    申请日：2001-01-08

    申请人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu ,  Ching-Hua Hsieh

    发明人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu ,  Ching-Hua Hsieh

    IPC分类号： H01L2144

    CPC分类号： H01L21/2885 ,  H01L21/76877 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

    摘要： This invention relates to a method of fabrication for metal wiring used in semiconductor integrated circuit devices, and more specifically, to a copper plating method, whereby the wafer edge alignment marks for subsequent processing steps are protected from being covered by copper deposition by two methods: the first method being that of forming alignment mark shields at the wafer's edge, thus preventing both barrier and copper seed layers from being deposited in those regions; the second method being that of forming small pad-like extrusions at the contact ring of the copper plating fixture, thus preventing copper plating at the contact points. In the first method, an alignment mark shield Is utilized to cover the alignment mark areas, near the edge of the wafer, with a mechanical shield. This shield protects the alignment mark regions from film deposition during the sputter deposition steps of barrier and copper seed layers. The alignment marks are left without a copper seed layer, hence preventing copper deposition in these regions during copper electroplating. In the second method, the alignment mark areas, near the edge of the wafer, are protected from copper electroplating deposition by use of small pad-like extrusions positioned at copper plating contact ring. The pad-like extrusion is part of the contact ring and prevents copper buildup and deposition on the alignment mark.

    摘要翻译： 本发明涉及一种用于半导体集成电路器件的金属布线的制造方法，更具体地说，涉及一种镀铜方法，由此通过两种方法保护用于后续处理步骤的晶片边缘对准标记不被铜沉积覆盖： 第一种方法是在晶片边缘处形成对准标记屏蔽，从而防止屏障和铜种子层沉积在那些区域中; 第二种方法是在镀铜夹具的接触环处形成小的垫状挤压件，从而防止接触点处的镀铜。 在第一种方法中，使用对准标记屏蔽来利用机械屏蔽覆盖晶片边缘附近的对准标记区域。 在屏障和铜种子层的溅射沉积步骤期间，该屏蔽件保护对准标记区域免受膜沉积。 留下对准标记没有铜种子层，因此在铜电镀期间防止这些区域中的铜沉积。 在第二种方法中，通过使用位于铜电镀接触环的小的垫状突出部，在晶片的边缘附近的对准标记区域被保护以避免铜电镀沉积。 垫状挤出物是接触环的一部分，可防止铜对准标记上的积累和沉积。

    Methods to reduce metal bridges and line shorts in integrated circuits
    46.
    发明授权
    Methods to reduce metal bridges and line shorts in integrated circuits 有权
    降低集成电路中金属桥和线路短路的方法

    公开(公告)号：US06372645B1

    公开(公告)日：2002-04-16

    申请号：US09439367

    申请日：1999-11-15

    申请人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu ,  Shih-Chi Lin ,  Ming-Jer Lee ,  Ying-Lang Wang ,  Yu-Ku Lin

    发明人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu ,  Shih-Chi Lin ,  Ming-Jer Lee ,  Ying-Lang Wang ,  Yu-Ku Lin

    IPC分类号： H01L2144

    CPC分类号： H01L21/76838 ,  H01L21/32051

    摘要： In the first option of the present invention, a semiconductor structure is provided and an overlying titanium nitride barrier layer is deposited thereon at about 100° C. At least Al and Cu is sputtered over the titanium nitride barrier layer from about 270 to 300° C. to form an Al—Cu alloy containing metal layer. The sputtered Al—Cu alloy containing metal layer is promptly cooled at a cooling rate greater than about 100° C./minute to a temperature below 200° C. to form a Al—Cu alloy containing metal layer having minimal CuAl2 grain growth. The semiconductor structure is removed from the cooling chamber and the semiconductor structure is processed further below 200° C. to form semiconductor device precursors. In the second option of the present invention, a semiconductor structure having an overlying barrier layer is provided. At least Al and Cu is sputtered over the barrier layer at a first temperature to form an Al—Cu alloy containing metal layer having CuAl2 grains of a first average size. The semiconductor structure is processed and then heated to a second temperature to dissolve the CuAl2 grains of a first average size then rapidly cooling to a third temperature whereby the CuAl2 grains formed have a second average size within the Al—Cu alloy containing metal layer. The second average size CuAl2 grains being less than the first average size CuAl2 grains.

    摘要翻译： 在本发明的第一种选择中，提供了一种半导体结构，并在其上沉积了大约100℃的上覆氮化钛阻挡层。至少Al和Cu溅射在氮化钛阻挡层上约270-300℃ 以形成含有金属层的Al-Cu合金。 将溅射的含有Al-Cu合金的金属层以大于约100℃/分钟的冷却速度迅速冷却到低于200℃的温度，以形成含有最小CuAl 2晶粒生长的金属层的Al-Cu合金。 将半导体结构从冷却室中移除，半导体结构进一步在200℃以下进行处理以形成半导体器件前体。 在本发明的第二个选择中，提供了具有上覆阻挡层的半导体结构。 在第一温度下至少将Al和Cu溅射在阻挡层上，以形成含有具有第一平均尺寸的CuAl 2晶粒的金属层的Al-Cu合金。 将半导体结构加工，然后加热至第二温度以溶解第一平均尺寸的CuAl 2晶粒，然后快速冷却至第三温度，由此形成的CuAl 2晶粒在含有Al-Cu合金的金属层内具有第二平均尺寸。 第二平均尺寸CuAl2晶粒小于第一平均尺寸CuAl2晶粒。

    AlCu electromigration (EM) resistance
    48.
    发明授权
    AlCu electromigration (EM) resistance 有权
    AlCu电迁移（EM）电阻

    公开(公告)号：US06099701A

    公开(公告)日：2000-08-08

    申请号：US342034

    申请日：1999-06-28

    申请人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu

    发明人： Chung-Shi Liu ,  Shau-Lin Shue ,  Chen-Hua Yu

    IPC分类号： H01L21/768 ,  H01L23/532 ,  C23C14/34 ,  H01L21/4763

    CPC分类号： H01L21/7685 ,  H01L21/76841 ,  H01L23/53223 ,  H01L2924/0002

    摘要： A method of manufacturing a Al-Cu line stack comprised of Ti-rich TIN, TiN, Ti-rich TiN, Al-Cu, Ti-rich TiN, TiN layers. A key feature of the invention is the sputtering of the Ti-rich TiN layers and TiN layers in the same Ti sputter chamber by turning off and on the N.sub.2 gas flow. For example, the Ti-rich TiN layer is formed by sputtering Ti with the N.sub.2 gas initially turned off. The overlying TiN layer is sputtered with the N.sub.2 gas turned on and the process stabilizes. The Ti-rich TiN layer is sputtered during a N.sub.2 off step (no N.sub.2 gas flow). The invention's Ti-rich TiN, TiN, Ti-rich TiN, Al-Cu, Ti-rich TiN, TiN layers increase the electromigration resistance.

    摘要翻译： 一种由富Ti的TIN，TiN，富Ti的TiN，Al-Cu，富Ti的TiN，TiN层构成的Al-Cu线叠层的制造方法。 本发明的一个关键特征是通过关闭和在N2气流上溅射相同Ti溅射室中的富钛TiN层和TiN层。 例如，通过溅射Ti，最初关闭N 2气体来形成富Ti的TiN层。 上覆的TiN层被溅射，N2气开启，工艺稳定。 在N 2脱氮步骤（无N2气流）下溅镀Ti富Ti Ti层。 本发明的富钛TiN，TiN，富钛TiN，Al-Cu，Ti富TiN，TiN层增加了电迁移率。