Semiconductor component and method of manufacture
    43.
    发明授权
    Semiconductor component and method of manufacture 有权
    半导体元件及制造方法

    公开(公告)号:US08034685B1

    公开(公告)日:2011-10-11

    申请号:US12771869

    申请日:2010-04-30

    IPC分类号: H01L21/336

    摘要: A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one or more termination trenches is formed in the edge termination region. Shield electrodes are formed in portions of the device trenches that are adjacent their floors. A gate dielectric material is formed on the sidewalls of the trenches in the device region and gate electrodes are formed over and electrically isolated from the shield electrodes. A gate electrode in at least one of the trenches is connected to at least one shield electrode in the trenches.

    摘要翻译: 包括栅电极和屏蔽电极的半导体部件和制造半导体部件的方法。 半导体材料具有器件区域,栅极接触区域,端接区域和漏极接触区域。 在器件区域中形成一个或多个器件沟槽,并且在边缘端接区域中形成一个或多个端接沟槽。 屏蔽电极形成在与其底板相邻的器件沟槽的部分中。 栅极电介质材料形成在器件区域中的沟槽的侧壁上,并且栅电极形成在屏蔽电极之上并与屏蔽电极电隔离。 至少一个沟槽中的栅电极连接到沟槽中的至少一个屏蔽电极。

    Power switching transistor with low drain to gate capacitance
    48.
    发明授权
    Power switching transistor with low drain to gate capacitance 有权
    功率开关晶体管具有低漏极到栅极电容

    公开(公告)号:US06870221B2

    公开(公告)日:2005-03-22

    申请号:US10313225

    申请日:2002-12-09

    摘要: A transistor (10) is formed on a semiconductor substrate (12) with a first surface (19) for forming a channel (40). A gate dielectric (22) has a first thickness overlying a first portion of the channel, and a dielectric film (20) overlies a second portion of the channel and has a second thickness greater than the first thickness. The second thickness reduces the drain to gate capacitance of the transistor, thereby improving its switching speed and frequency response.

    摘要翻译: 晶体管(10)形成在具有用于形成沟道(40)的第一表面(19)的半导体衬底(12)上。 栅极电介质(22)具有覆盖在通道的第一部分上的第一厚度,并且电介质膜(20)覆盖在通道的第二部分上,并且具有大于第一厚度的第二厚度。 第二厚度减小了晶体管的漏极到栅极电容,从而提高了其开关速度和频率响应。

    Process of forming an electronic device including a trench and a conductive structure therein
    49.
    发明授权
    Process of forming an electronic device including a trench and a conductive structure therein 有权
    在其中形成包括沟槽和导电结构的电子器件的工艺

    公开(公告)号:US08697560B2

    公开(公告)日:2014-04-15

    申请号:US13404855

    申请日:2012-02-24

    IPC分类号: H01L21/3205

    摘要: An electronic device can include a transistor structure, including a patterned semiconductor layer overlying a substrate and having a primary surface, wherein the patterned semiconductor layer defines a first trench and a second trench that extend from the primary surface towards the substrate. The electronic device can further include a first conductive electrode and a gate electrode within the first trench. The electronic device can still further include a second conductive electrode within the second trench. The electronic device can include a source region within the patterned semiconductor layer and disposed between the first and second trenches. The electronic device can further include a body contact region within the patterned semiconductor layer and between the first and second trenches, wherein the body contact region is spaced apart from the primary surface. Processes of forming the electronic device can take advantage of forming all trenches during processing sequence.

    摘要翻译: 电子器件可以包括晶体管结构,其包括覆盖在衬底上并具有主表面的图案化半导体层,其中所述图案化半导体层限定从所述主表面朝向所述衬底延伸的第一沟槽和第二沟槽。 电子器件还可以包括在第一沟槽内的第一导电电极和栅电极。 电子器件还可以在第二沟槽内进一步包括第二导电电极。 电子器件可以包括图案化半导体层内的源极区域,并且设置在第一和第二沟槽之间。 电子器件还可以包括在图案化的半导体层内以及在第一和第二沟槽之间的体接触区域,其中主体接触区域与主表面间隔开。 形成电子器件的过程可以利用在处理序列期间形成所有沟槽的优点。