公开(公告)号：US08803205B2

公开(公告)日：2014-08-12

申请号：US13484490

申请日：2012-05-31

申请人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

发明人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

IPC分类号： H01L29/66

CPC分类号： H01L29/7813 ,  H01L27/088 ,  H01L27/098 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/7803 ,  H01L29/7831

摘要： A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.

摘要翻译： 半导体器件包括栅极端子，至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。 所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件，所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件，所述负载路径与所述负载路径串联连接 的MOSFET器件在负载端子之间。 所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管，所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间，并且所述控制端子耦合到 晶体管器件的至少一个控制端子。

公开(公告)号：US20130249001A1

公开(公告)日：2013-09-26

申请号：US13429568

申请日：2012-03-26

申请人： Armin Willmeroth ,  Franz Hirler ,  Peter Irsigler

发明人： Armin Willmeroth ,  Franz Hirler ,  Peter Irsigler

IPC分类号： H01L29/78

CPC分类号： H01L27/0629 ,  H01L21/823487 ,  H01L27/0826 ,  H01L27/0828 ,  H01L27/10841 ,  H01L27/10864 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/10 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/732 ,  H01L29/7395 ,  H01L29/7788 ,  H01L29/78 ,  H01L29/7803 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7823 ,  H01L29/7825 ,  H01L29/7838 ,  H01L29/7926 ,  H01L29/8611 ,  H01L29/88

摘要： A semiconductor arrangement includes a semiconductor body and a power transistor arranged in a first device region of the semiconductor body. The power transistor includes at least one source region, a drain region, and at least one body region, at least one drift region of a first doping type and at least one compensation region of a second doping complementary to the first doping type, and a gate electrode arranged adjacent to the at least one body region and dielectrically insulated from the body region by a gate dielectric. The semiconductor arrangement also includes a further semiconductor device arranged in a second device region of the semiconductor body. The second device region includes a well-like structure of the second doping type surrounding a first semiconductor region of the first doping type. The further semiconductor device includes device regions arranged in the first semiconductor region.

摘要翻译： 半导体装置包括半导体本体和布置在半导体本体的第一器件区域中的功率晶体管。 功率晶体管包括至少一个源极区，漏极区和至少一个体区，至少一个第一掺杂类型的漂移区和与第一掺杂类型互补的第二掺杂的至少一个补偿区，以及 栅电极，其布置成与所述至少一个体区相邻并且通过栅极电介质与所述体区电介质绝缘。 半导体布置还包括布置在半导体本体的第二器件区域中的另一半导体器件。 第二器件区域包括围绕第一掺杂型的第一半导体区域的第二掺杂型的类似结构。 另外的半导体器件包括布置在第一半导体区域中的器件区域。

公开(公告)号：US20120306003A1

公开(公告)日：2012-12-06

申请号：US13118928

申请日：2011-05-31

申请人： Armin Willmeroth ,  Franz Hirler

发明人： Armin Willmeroth ,  Franz Hirler

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/7803 ,  H01L29/7831

摘要： Disclosed is a MOSFET including at least one transistor cell. The at least one transistor cell includes a source region, a drain region, a body region and a drift region. The body region is arranged between the source region and the drift region and the drift region is arranged between the body region and the drain region. The at least one transistor cell further includes a compensation region arranged in the drift region and distant to the body region, a source electrode electrically contacting the source region and the body region, a gate electrode arranged adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a coupling arrangement including a control terminal. The coupling arrangement is configured to electrically couple the compensation region to at least one of the body region, the source region, the source electrode and the gate electrode dependent on a control signal received at the control terminal.

摘要翻译： 披露了包括至少一个晶体管单元的MOSFET。 所述至少一个晶体管单元包括源极区，漏极区，体区和漂移区。 体区域布置在源极区域和漂移区域之间，并且漂移区域布置在体区域和漏极区域之间。 所述至少一个晶体管单元还包括布置在所述漂移区域中并且远离所述体区域的补偿区域，与所述源极区域和所述体区域电接触的源电极，邻近所述体区域布置并与所述主体电介质绝缘的栅电极 区域，以及包括控制端子的耦合装置。 耦合装置被配置为根据在控制端接收到的控制信号将补偿区域电耦合到体区域，源极区域，源电极和栅电极中的至少一个。

公开(公告)号：US07936010B2

公开(公告)日：2011-05-03

申请号：US12342721

申请日：2008-12-23

申请人： Markus Zundel ,  Franz Hirler ,  Armin Willmeroth

发明人： Markus Zundel ,  Franz Hirler ,  Armin Willmeroth

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095

摘要： A power semiconductor element having a lightly doped drift and buffer layer is disclosed. One embodiment has, underneath and between deep well regions of a first conductivity type, a lightly doped drift and buffer layer of a second conductivity type. The drift and buffer layer has a minimum vertical extension between a drain contact layer on the adjacent surface of a semiconductor substrate and the bottom of the deepest well region which is at least equal to a minimum lateral distance between the deep well regions. The vertical extension can also be determined such that a total amount of dopant per unit area in the drift and buffer layer is larger than a breakdown charge amount at breakdown voltage.

摘要翻译： 公开了一种具有轻掺杂漂移和缓冲层的功率半导体元件。 一个实施例具有在第一导电类型的深阱区之下并且在第二导电类型的轻掺杂漂移和缓冲层之间并且在深阱区之间。 漂移和缓冲层在半导体衬底的相邻表面上的漏极接触层和最深阱区的底部之间具有至少等于深阱区域之间的最小横向距离的最小垂直延伸。 也可以确定垂直延伸，使得漂移缓冲层中的每单位面积的掺杂剂的总量大于击穿电压下的击穿电荷量。

公开(公告)号：US07821033B2

公开(公告)日：2010-10-26

申请号：US11706860

申请日：2007-02-15

申请人： Stefan Sedlmaier ,  Anton Mauder ,  Armin Willmeroth ,  Franz Hirler

发明人： Stefan Sedlmaier ,  Anton Mauder ,  Armin Willmeroth ,  Franz Hirler

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7804

摘要： A semiconductor component is disclosed herein comprising a drift zone and a drift control zone. The drift control zone is arranged adjacent to the drift zone and is dielectrically insulated from the drift zone by a dielectric layer. The drift control zone includes at least one first semiconductor layer and one second semiconductor layer. The first semiconductor layer has a higher charge carrier mobility than the second semiconductor layer.

摘要翻译： 本文公开了一种半导体元件，其包括漂移区和漂移控制区。 漂移控制区域布置成与漂移区相邻，并且通过介电层与漂移区介电绝缘。 漂移控制区包括至少一个第一半导体层和一个第二半导体层。 第一半导体层具有比第二半导体层更高的电荷载流子迁移率。

公开(公告)号：US20100213506A1

公开(公告)日：2010-08-26

申请号：US12773580

申请日：2010-05-04

申请人： Armin Willmeroth ,  Franz Hirler

发明人： Armin Willmeroth ,  Franz Hirler

IPC分类号： H01L27/06 ,  H01L29/78 ,  H01L29/739

CPC分类号： H01L29/7802 ,  H01L29/0696 ,  H01L29/402 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7825 ,  H03K17/063 ,  H03K2017/6878

摘要： A component arrangement including a MOS transistor having a field electrode is disclosed. One embodiment includes a gate electrode, a drift zone and a field electrode, arranged adjacent to the drift zone and dielectrically insulated from the drift zone by a dielectric layer a charging circuit, having a rectifier element connected between the gate electrode and the field electrode.

摘要翻译： 公开了一种包括具有场电极的MOS晶体管的部件布置。 一个实施例包括栅极，漂移区和场电极，其布置成与漂移区相邻并且通过介电层与漂移区介电绝缘，该充电电路具有连接在栅电极和场电极之间的整流元件。

公开(公告)号：US20100078775A1

公开(公告)日：2010-04-01

申请号：US12241985

申请日：2008-09-30

申请人： Anton Mauder ,  Franz Hirler ,  Armin Willmeroth ,  Michael Rueb ,  Holger Kapels

发明人： Anton Mauder ,  Franz Hirler ,  Armin Willmeroth ,  Michael Rueb ,  Holger Kapels

IPC分类号： H01L21/20 ,  H01L29/06

CPC分类号： H01L29/36 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0688 ,  H01L29/0878 ,  H01L29/105 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7811

摘要： A semiconductor device has a cell field with drift zones of a first type of conductivity and charge carrier compensation zones of a second type of conductivity complementary to the first type. An edge region which surrounds the cell field has a higher blocking strength than the cell field, the edge region having a near-surface area which is undoped to more weakly doped than the drift zones, and beneath the near-surface area at least one buried, vertically extending complementarily doped zone is positioned.

摘要翻译： 半导体器件具有具有与第一类型互补的第二导电类型的漂移区和具有第二类型导电性的电荷载体补偿区的电池区。 围绕细胞场的边缘区域具有比细胞场更高的阻挡强度，边缘区域具有未漂移至比漂移区更弱掺杂的近表面区域，并且在近表面区域下方至少有一个埋置 垂直延伸的互补掺杂区定位。

公开(公告)号：US20100078710A1

公开(公告)日：2010-04-01

申请号：US11874591

申请日：2007-10-18

申请人： Armin Willmeroth ,  Anton Mauder ,  Franz Hirler ,  Stefan Sedlmaier

发明人： Armin Willmeroth ,  Anton Mauder ,  Franz Hirler ,  Stefan Sedlmaier

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/7804

摘要： A semiconductor component has a drift zone and a drift control zone, a drift control zone dielectric, which is arranged in sections between the drift zone and the drift control zone, and has a first and a second connection zone, which are doped complementarily with respect to one another and which form a pn junction between the drift control zone and a section of the drift zone.

摘要翻译： 半导体部件具有漂移区和漂移控制区，漂移控制区电介质，其布置在漂移区和漂移控制区之间的部分中，并且具有第一和第二连接区，其相互掺杂互补 并且在漂移控制区域和漂移区段的一部分之间形成pn结。

公开(公告)号：US20090166727A1

公开(公告)日：2009-07-02

申请号：US12342721

申请日：2008-12-23

申请人： Markus Zundel ,  Franz Hirler ,  Armin Willmeroth

发明人： Markus Zundel ,  Franz Hirler ,  Armin Willmeroth

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095

摘要： A power semiconductor element having a lightly doped drift and buffer layer is disclosed. One embodiment has, underneath and between deep well regions of a first conductivity type, a lightly doped drift and buffer layer of a second conductivity type. The drift and buffer layer has a minimum vertical extension between a drain contact layer on the adjacent surface of a semiconductor substrate and the bottom of the deepest well region which is at least equal to a minimum lateral distance between the deep well regions. The vertical extension can also be determined such that a total amount of dopant per unit area in the drift and buffer layer is larger then a breakdown charge amount at breakdown voltage.

公开(公告)号：US07459365B2

公开(公告)日：2008-12-02

申请号：US11540922

申请日：2006-09-29

申请人： Michael Rüb ,  Herbert Schäfer ,  Armin Willmeroth ,  Anton Mauder ,  Stefan Sedlmaier ,  Roland Rupp ,  Manfred Pippan ,  Hans Weber ,  Frank Pfirsch ,  Franz Hirler ,  Hans-Joachim Schulze

发明人： Michael Rüb ,  Herbert Schäfer ,  Armin Willmeroth ,  Anton Mauder ,  Stefan Sedlmaier ,  Roland Rupp ,  Manfred Pippan ,  Hans Weber ,  Frank Pfirsch ,  Franz Hirler ,  Hans-Joachim Schulze

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/76224 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/66734 ,  H01L29/7804 ,  H01L29/7849

摘要： The fabrication of a semiconductor component having a semiconductor body in which is arranged a very thin dielectric layer having sections which run in the vertical direction and which extend very deeply into the semiconductor body is disclosed. In one method a trench is formed in a drift zone region proceeding from the front side of a semiconductor body, a sacrificial layer is produced on at least a portion of the sidewalls of the trench and at least a portion of the trench is filled with a semiconductor material which is chosen such that the quotient of the net dopant charge of the semiconductor material in the trench and the total area of the sacrificial layer on the sidewalls of the trench between the semiconductor material and the drift zone region is less than the breakdown charge of the semiconductor material, and the sacrificial layer is replaced with a dielectric.

摘要翻译： 公开了具有半导体主体的半导体部件的制造，其中布置有具有在垂直方向上延伸并且非常深地延伸到半导体本体中的截面的非常薄的电介质层。 在一种方法中，在从半导体主体的前侧开始的漂移区域中形成沟槽，在沟槽的至少一部分侧壁上产生牺牲层，并且沟槽的至少一部分填充有 半导体材料被选择为使得沟槽中的半导体材料的净掺杂剂电荷的商和半导体材料和漂移区域之间的沟槽的侧壁上的牺牲层的总面积小于击穿电荷 的半导体材料，并且牺牲层被电介质代替。