公开(公告)号：US10388538B2

公开(公告)日：2019-08-20

申请号：US15332198

申请日：2016-10-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideyuki Kishida

IPC: H01L21/02 ,  H01L21/477 ,  H01L21/322 ,  H01L27/11521 ,  H01L27/1156 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L27/105 ,  G11C16/26 ,  G11C16/14 ,  G11C16/10 ,  H01L29/24 ,  G02F1/1368 ,  G09G3/36 ,  G02F1/137 ,  G02F1/1343 ,  G02F1/1333

Abstract: An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, another object is to provide a semiconductor device which can be manufactured with high mass productivity. Another object is to provide a manufacturing method of a semiconductor device which can be manufactured with high mass productivity. An impurity remaining in an oxide semiconductor layer is removed so that the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after adding a halogen element into the oxide semiconductor layer, heat treatment is performed to remove an impurity from the oxide semiconductor layer. The halogen element is preferably fluorine.

公开(公告)号：US10290742B2

公开(公告)日：2019-05-14

申请号：US15728591

申请日：2017-10-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/45 ,  H01L29/66 ,  H01L29/49

Abstract: It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.

公开(公告)号：US10224215B2

公开(公告)日：2019-03-05

申请号：US15332198

申请日：2016-10-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideyuki Kishida

IPC: H01L21/02 ,  H01L21/477 ,  H01L21/322 ,  H01L27/11521 ,  H01L27/1156 ,  H01L27/12 ,  H01L29/786 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  H01L27/105 ,  H01L29/24 ,  H01L29/66 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/137 ,  G09G3/36

Abstract: An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, another object is to provide a semiconductor device which can be manufactured with high mass productivity. Another object is to provide a manufacturing method of a semiconductor device which can be manufactured with high mass productivity. An impurity remaining in an oxide semiconductor layer is removed so that the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after adding a halogen element into the oxide semiconductor layer, heat treatment is performed to remove an impurity from the oxide semiconductor layer. The halogen element is preferably fluorine.

公开(公告)号：US09893200B2

公开(公告)日：2018-02-13

申请号：US14972964

申请日：2015-12-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo Akimoto ,  Junichiro Sakata ,  Takuya Hirohashi ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga

IPC: H01L29/04 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L21/28

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/28079 ,  H01L21/28158 ,  H01L29/04 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78693

Abstract: It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO3(ZnO)m (m=1) are included in an amorphous structure represented by InGaO3(ZnO)m (m>0).

公开(公告)号：US09443874B2

公开(公告)日：2016-09-13

申请号：US14320742

申请日：2014-07-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

IPC: H01L29/12 ,  H01L27/12 ,  H01L29/786 ,  H01L29/45 ,  H01L27/32

CPC classification number: H01L29/7869 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/78618

Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.

Abstract translation: 目的是提供一种具有良好电特性的薄膜晶体管和包括薄膜晶体管作为开关元件的半导体器件。 薄膜晶体管包括形成在绝缘表面上的栅极电极，栅电极上的栅极绝缘膜，与栅极绝缘膜上的栅电极重叠的氧化物半导体膜，并且包括其中浓度为1或 包含在氧化物半导体中的多种金属高于其他区域，形成在氧化物半导体膜上并与该层接触的一对金属氧化物膜，以及与金属氧化物膜接触的源电极和漏电极 。 金属氧化物膜通过氧化源电极和漏电极中所含的金属而形成。

公开(公告)号：US08916870B2

公开(公告)日：2014-12-23

申请号：US14305156

申请日：2014-06-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro Sakata ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC: H01L29/10 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.

公开(公告)号：US20140312345A1

公开(公告)日：2014-10-23

申请号：US14320742

申请日：2014-07-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

IPC: H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/78618

Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.

Abstract translation: 目的是提供一种具有良好电特性的薄膜晶体管和包括薄膜晶体管作为开关元件的半导体器件。 薄膜晶体管包括形成在绝缘表面上的栅极电极，栅电极上的栅极绝缘膜，与栅极绝缘膜上的栅电极重叠的氧化物半导体膜，并且包括其中浓度为1或 包含在氧化物半导体中的多种金属高于其他区域，形成在氧化物半导体膜上并与该层接触的一对金属氧化物膜，以及与金属氧化物膜接触的源电极和漏电极 。 金属氧化物膜通过氧化源电极和漏电极中所含的金属而形成。

公开(公告)号：US20140284601A1

公开(公告)日：2014-09-25

申请号：US14297733

申请日：2014-06-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L29/10 ,  H01L29/41733

Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.

Abstract translation: 提供了包括具有良好电特性的氧化物半导体的薄膜晶体管。 薄膜晶体管包括设置在基板上的栅极电极，设置在栅极上的栅极绝缘膜，设置在栅电极和栅极绝缘膜上的氧化物半导体膜，设置在氧化物半导体膜上的金属氧化物膜， 以及设置在金属氧化物膜上的金属膜。 氧化物半导体膜与金属氧化物膜接触，并且包括金属的浓度高于氧化物半导体膜中的任何其它区域（高金属浓度区域）的区域。 在高金属浓度区域中，包含在氧化物半导体膜中的金属可以作为晶粒或微晶存在。

公开(公告)号：US12136629B2

公开(公告)日：2024-11-05

申请号：US18509468

申请日：2023-11-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshikazu Kondo ,  Hideyuki Kishida

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/477 ,  H01L29/24 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H10K59/12 ,  H10K59/121 ,  H10K59/123

Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.

公开(公告)号：US11715801B2

公开(公告)日：2023-08-01

申请号：US17687817

申请日：2022-03-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichiro Sakata ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L29/66 ,  H01L27/12 ,  H01L29/08 ,  H01L29/10 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696 ,  H01L21/02554

Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.