公开(公告)号：US20070293009A1

公开(公告)日：2007-12-20

申请号：US11848642

申请日：2007-08-31

申请人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

发明人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

IPC分类号： H01L21/336

CPC分类号： H01L29/1054 ,  H01L29/105 ,  H01L29/161 ,  H01L29/36 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7842 ,  Y10S438/926

摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。

公开(公告)号：US20060197125A1

公开(公告)日：2006-09-07

申请号：US11415784

申请日：2006-05-02

申请人： Thomas Langdo ,  Matthew Currie ,  Glyn Braithwaite ,  Richard Hammond ,  Anthony Lochtefeld ,  Eugene Fitzgerald

发明人： Thomas Langdo ,  Matthew Currie ,  Glyn Braithwaite ,  Richard Hammond ,  Anthony Lochtefeld ,  Eugene Fitzgerald

IPC分类号： H01L21/8234 ,  H01L29/76 ,  H01L31/00

CPC分类号： H01L29/785 ,  H01L21/76254 ,  H01L21/76259 ,  H01L21/76264 ,  H01L21/76275 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/78603 ,  H01L29/78684 ,  H01L29/78687

摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

公开(公告)号：US20050205934A1

公开(公告)日：2005-09-22

申请号：US11126550

申请日：2005-05-11

申请人： Anthony Lochtefeld ,  Thomas Langdo ,  Richard Hammond ,  Matthew Gurrie ,  Eugene Fitzgerald

发明人： Anthony Lochtefeld ,  Thomas Langdo ,  Richard Hammond ,  Matthew Gurrie ,  Eugene Fitzgerald

IPC分类号： H01L21/20 ,  H01L21/331 ,  H01L21/336 ,  H01L21/337 ,  H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L31/117

CPC分类号： H01L29/7847 ,  H01L21/28518 ,  H01L21/76254 ,  H01L21/76256 ,  H01L21/76259 ,  H01L21/76264 ,  H01L21/76275 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1033 ,  H01L29/165 ,  H01L29/41783 ,  H01L29/66242 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/66787 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/7843 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/78603 ,  H01L29/78684 ,  H01L29/78687

摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

公开(公告)号：US20050042849A1

公开(公告)日：2005-02-24

申请号：US10944618

申请日：2004-09-17

申请人： Matthew Currie ,  Richard Hammond

发明人： Matthew Currie ,  Richard Hammond

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/10 ,  H01L21/46

CPC分类号： H01L29/7848 ,  H01L21/28052 ,  H01L21/2807 ,  H01L21/28255 ,  H01L21/28518 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/45 ,  H01L29/49 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7842

摘要： A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material. The first and second materials can be silicon and germanium. A contact of the device has a portion proximal to the semiconductor layer and a portion distal to the semiconductor layer. The distal portion includes the first material and the second material. A metal layer formed adjacent to the relaxed semiconductor layer and adjacent to the distal portion of the contact is simultaneously reacted with the relaxed semiconductor layer and with the distal portion of the contact to provide metallic contact material.

摘要翻译： 半导体器件和制造半导体器件的方法包括包括第一材料和第二材料的半导体层。 第一和第二种材料可以是硅和锗。 器件的触点具有靠近半导体层的部分和远离半导体层的部分。 远侧部分包括第一材料和第二材料。 与松弛的半导体层相邻并且邻近接触的远端部分形成的金属层与松弛的半导体层和接触的远端部分同时反应以提供金属接触材料。

公开(公告)号：US06846720B2

公开(公告)日：2005-01-25

申请号：US10464282

申请日：2003-06-18

申请人： Narayanan Balasubramanian ,  Richard Hammond

发明人： Narayanan Balasubramanian ,  Richard Hammond

IPC分类号： H01L21/20 ,  H01L21/762 ,  H01L29/10 ,  H01L21/76 ,  H01L21/336

CPC分类号： H01L21/76232 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02664 ,  H01L29/1054

摘要： A MOSFET device in strained silicon-on-SiGe and a method of forming the device are described. The said device achieves reduced junction leakage due to the lower band-gap values of SiGe. The method consists of forming isolation trenches in a composite strained-Si/SiGe substrate and growing a liner oxide by wet oxidation such that oxidation is selective to SiGe only, with negligible oxidation of silicon surfaces. Selective oxidation results in oxide encroachment under strained-Si, thereby reducing the junction area after device fabrication is completed. Reduced junction area leads to reduced n+/p or p+/n junction leakage current.

摘要翻译： 描述了应变Si-Si中的MOSFET器件和形成该器件的方法。 所述器件由于SiGe的较低带隙值而实现了减少的结漏电。 该方法包括在复合应变Si / SiGe衬底中形成隔离沟槽，并通过湿式氧化生长衬里氧化物，使氧化仅对SiGe有选择性，硅表面的氧化可忽略不计。 选择性氧化导致应变Si下的氧化物侵蚀，从而在器件制造完成后减少接合面积。 减少的结面积导致n + / p或p + + / n结漏电流减小。

公开(公告)号：US06680496B1

公开(公告)日：2004-01-20

申请号：US10191006

申请日：2002-07-08

申请人： Richard Hammond ,  Glyn Braithwaite

发明人： Richard Hammond ,  Glyn Braithwaite

IPC分类号： H01L2978

CPC分类号： H01L29/802

摘要： Transistors including a buried channel layer intermediate to a source and a drain and a surface layer intermediate to the buried layer and a gate are operated so as to cause current between the source and the drain to flow predominately through the buried channel layer by applying a back-bias voltage to the transistor. The back-bias voltage modulates a free charge carrier density distribution in the buried layer and in the surface layer.

公开(公告)号：US06221222B1

公开(公告)日：2001-04-24

申请号：US09204890

申请日：1998-12-03

申请人： James Kipp ,  Glenn Wehrmann ,  Richard Hammond ,  Christine Rebbeck

发明人： James Kipp ,  Glenn Wehrmann ,  Richard Hammond ,  Christine Rebbeck

IPC分类号： G01N2730

CPC分类号： G01N27/301

摘要： The present invention provides a reference electrode solution containing ammonium salts and phosphonium salts for the potentiometric measurement of pH and method of using the same. The use of the ammonium salts and the phosphonium salts to replace potassium chloride or sodium chloride as reference electrolytes in a standard reference electrode minimizes the formation of precipitates in sample solutions containing cation-sensitive compounds. Disruption of ion flow through the reference electrode is eliminated, and accurate pH measurements may be obtained in solutions that contain compounds having a strong affinity for hard cations.

摘要翻译： 本发明提供了含有铵盐和鏻盐的参比电极溶液，用于电位测量pH值和使用该方法。 在标准参考电极中使用铵盐和鏻盐代替氯化钾或氯化钠作为参考电解质，使含有阳离子敏感化合物的样品溶液中沉淀物的形成最小化。 消除了通过参比电极的离子流的破坏，并且可以在含有对硬质阳离子具有强亲和力的化合物的溶液中获得精确的pH值。

公开(公告)号：US20120299120A1

公开(公告)日：2012-11-29

申请号：US13568944

申请日：2012-08-07

申请人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

发明人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

IPC分类号： H01L27/088

CPC分类号： H01L29/7378 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78654 ,  H03B5/1203 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1221 ,  H03B5/1228 ,  H03B5/1243 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099

摘要： Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators (“VCOs”), low noise amplifiers (“LNAs”), and phase locked loops (“PLLs”) built using these FETs also exhibit enhanced performance.

摘要翻译： 用于处理射频（RF）和微波信号的电路使用具有设置在一个或多个平坦化衬底层上的一个或多个应变通道层的场效应晶体管（FET）来制造。 具有这种结构的FET对于例如跨导和噪声系数显示出改善的值。 RF电路，例如压电振荡器（VCO），低噪声放大器（LNA）和使用这些FET构建的锁相环（PLL）也表现出增强的性能。

公开(公告)号：US20110121362A1

公开(公告)日：2011-05-26

申请号：US13017694

申请日：2011-01-31

申请人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

发明人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

IPC分类号： H01L27/088

CPC分类号： H01L29/7378 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78654 ,  H03B5/1203 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1221 ,  H03B5/1228 ,  H03B5/1243 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099

摘要： Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators (“VCOs”), low noise amplifiers (“LNAs”), and phase locked loops (“PLLs”) built using these FETs also exhibit enhanced performance.

摘要翻译： 用于处理射频（“RF”）和微波信号的电路使用具有设置在一个或多个平坦化衬底层上的一个或多个应变沟道层的场效应晶体管（“FET”）来制造。 具有这种结构的FET对于例如跨导和噪声系数显示出改善的值。 诸如例如压控振荡器（“VCO”），使用这些FET构建的低噪声放大器（“LNA”）和锁相环（“PLL”）的RF电路也表现出增强的性能。

公开(公告)号：US07884353B2

公开(公告)日：2011-02-08

申请号：US10972578

申请日：2004-10-25

申请人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

发明人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

IPC分类号： H01L29/06

CPC分类号： H01L29/1054 ,  H01L29/105 ,  H01L29/161 ,  H01L29/36 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7842 ,  Y10S438/926

摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。