公开(公告)号：US20070293009A1

公开(公告)日：2007-12-20

申请号：US11848642

申请日：2007-08-31

申请人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

发明人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

IPC分类号： H01L21/336

CPC分类号： H01L29/1054 ,  H01L29/105 ,  H01L29/161 ,  H01L29/36 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7842 ,  Y10S438/926

摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。

公开(公告)号：US20060197125A1

公开(公告)日：2006-09-07

申请号：US11415784

申请日：2006-05-02

申请人： Thomas Langdo ,  Matthew Currie ,  Glyn Braithwaite ,  Richard Hammond ,  Anthony Lochtefeld ,  Eugene Fitzgerald

发明人： Thomas Langdo ,  Matthew Currie ,  Glyn Braithwaite ,  Richard Hammond ,  Anthony Lochtefeld ,  Eugene Fitzgerald

IPC分类号： H01L21/8234 ,  H01L29/76 ,  H01L31/00

CPC分类号： H01L29/785 ,  H01L21/76254 ,  H01L21/76259 ,  H01L21/76264 ,  H01L21/76275 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/78603 ,  H01L29/78684 ,  H01L29/78687

摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

公开(公告)号：US20050042849A1

公开(公告)日：2005-02-24

申请号：US10944618

申请日：2004-09-17

申请人： Matthew Currie ,  Richard Hammond

发明人： Matthew Currie ,  Richard Hammond

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/10 ,  H01L21/46

CPC分类号： H01L29/7848 ,  H01L21/28052 ,  H01L21/2807 ,  H01L21/28255 ,  H01L21/28518 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/45 ,  H01L29/49 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7842

摘要： A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material. The first and second materials can be silicon and germanium. A contact of the device has a portion proximal to the semiconductor layer and a portion distal to the semiconductor layer. The distal portion includes the first material and the second material. A metal layer formed adjacent to the relaxed semiconductor layer and adjacent to the distal portion of the contact is simultaneously reacted with the relaxed semiconductor layer and with the distal portion of the contact to provide metallic contact material.

摘要翻译： 半导体器件和制造半导体器件的方法包括包括第一材料和第二材料的半导体层。 第一和第二种材料可以是硅和锗。 器件的触点具有靠近半导体层的部分和远离半导体层的部分。 远侧部分包括第一材料和第二材料。 与松弛的半导体层相邻并且邻近接触的远端部分形成的金属层与松弛的半导体层和接触的远端部分同时反应以提供金属接触材料。

公开(公告)号：US20110095363A1

公开(公告)日：2011-04-28

申请号：US12982101

申请日：2010-12-30

申请人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

发明人： Matthew Currie ,  Anthony Lochtefeld ,  Richard Hammond ,  Eugene Fitzgerald

IPC分类号： H01L29/78

CPC分类号： H01L29/1054 ,  H01L29/105 ,  H01L29/161 ,  H01L29/36 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7842 ,  Y10S438/926

摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

摘要翻译： 包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。 当杂质存在于应变材料层的某些区域中时，器件性能下降。 通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。

公开(公告)号：US20100264995A1

公开(公告)日：2010-10-21

申请号：US12767671

申请日：2010-04-26

申请人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

发明人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

IPC分类号： H03B5/12 ,  H03F3/16

CPC分类号： H01L29/7378 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78654 ,  H03B5/1203 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1221 ,  H03B5/1228 ,  H03B5/1243 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099

摘要： Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators (“VCOs”), low noise amplifiers (“LNAs”), and phase locked loops (“PLLs”) built using these FETs also exhibit enhanced performance.

摘要翻译： 用于处理射频（“RF”）和微波信号的电路使用具有设置在一个或多个平坦化衬底层上的一个或多个应变沟道层的场效应晶体管（“FET”）来制造。 具有这种结构的FET对于例如跨导和噪声系数显示出改善的值。 诸如例如压控振荡器（“VCO”），使用这些FET构建的低噪声放大器（“LNA”）和锁相环（“PLL”）的RF电路也表现出增强的性能。

公开(公告)号：US07709828B2

公开(公告)日：2010-05-04

申请号：US11032413

申请日：2005-01-10

申请人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

发明人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

IPC分类号： H01L31/00

CPC分类号： H01L29/7378 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78654 ,  H03B5/1203 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1221 ,  H03B5/1228 ,  H03B5/1243 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099

摘要： Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators (“VCOs”), low noise amplifiers (“LNAs”), and phase locked loops (“PLLs”) built using these FETs also exhibit enhanced performance.

摘要翻译： 用于处理射频（“RF”）和微波信号的电路使用具有设置在一个或多个平坦化衬底层上的一个或多个应变沟道层的场效应晶体管（“FET”）来制造。 具有这种结构的FET对于例如跨导和噪声系数显示出改善的值。 诸如例如压控振荡器（“VCO”），使用这些FET构建的低噪声放大器（“LNA”）和锁相环（“PLL”）的RF电路也表现出增强的性能。

公开(公告)号：US20050212061A1

公开(公告)日：2005-09-29

申请号：US11127508

申请日：2005-05-12

申请人： Thomas Langdo ,  Matthew Currie ,  Richard Hammond ,  Anthony Lochtefeld ,  Eugene Fitzgerald

发明人： Thomas Langdo ,  Matthew Currie ,  Richard Hammond ,  Anthony Lochtefeld ,  Eugene Fitzgerald

IPC分类号： H01L21/20 ,  H01L21/331 ,  H01L21/336 ,  H01L21/337 ,  H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L29/76

CPC分类号： H01L29/7847 ,  H01L21/28518 ,  H01L21/76254 ,  H01L21/76256 ,  H01L21/76259 ,  H01L21/76264 ,  H01L21/76275 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1033 ,  H01L29/165 ,  H01L29/41783 ,  H01L29/66242 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/66787 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/7843 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/78603 ,  H01L29/78684 ,  H01L29/78687

摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

摘要翻译： 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

公开(公告)号：US20050202640A1

公开(公告)日：2005-09-15

申请号：US11013838

申请日：2004-12-16

申请人： Eugene Fitzgerald ,  Richard Hammond ,  Matthew Currie

发明人： Eugene Fitzgerald ,  Richard Hammond ,  Matthew Currie

IPC分类号： H01L21/20 ,  H01L21/28 ,  H01L21/336 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/66477 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/28238 ,  H01L29/1054 ,  H01L29/78 ,  H01L29/7838 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of fabricating a semiconductor device including providing a semiconductor heterostructure, the heterostructure having a relaxed Si1-xGex layer on a substrate, a strained channel layer on the relaxed Si1-xGex layer, and a Si1-yGey layer; removing the Si1-yGey layer; and providing a dielectric layer. The dielectric layer includes a gate dielectric of a MISFET. In alternative embodiments, the heterostructure includes a SiGe spacer layer and a Si layer.

摘要翻译： 一种制造半导体器件的方法，包括提供半导体异质结构，所述异质结构在衬底上具有松弛的Si 1-x Ge 2 x层，在弛豫时产生应变沟道层 Si 1-x Ge Ge层，以及Si 1-y Ge Ge层; 除去Si 1-y Y y Y y层; 并提供介电层。 电介质层包括MISFET的栅极电介质。 在替代实施例中，异质结构包括SiGe间隔层和Si层。

公开(公告)号：US20050156210A1

公开(公告)日：2005-07-21

申请号：US11073976

申请日：2005-03-07

申请人： Matthew Currie ,  Richard Hammond

发明人： Matthew Currie ,  Richard Hammond

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/10 ,  H01L21/337 ,  H01L21/8234 ,  H01L29/94 ,  H01L31/113 ,  H01L21/3205

CPC分类号： H01L29/7848 ,  H01L21/28052 ,  H01L21/2807 ,  H01L21/28255 ,  H01L21/28518 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/45 ,  H01L29/49 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7842

摘要： A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material. The first and second materials can be silicon and germanium. A contact of the device has a portion proximal to the semiconductor layer and a portion distal to the semiconductor layer. The distal portion includes the first material and the second material. A metal layer formed adjacent to the relaxed semiconductor layer and adjacent to the distal portion of the contact is simultaneously reacted with the relaxed semiconductor layer and with the distal portion of the contact to provide metallic contact material.

摘要翻译： 半导体器件和制造半导体器件的方法包括包括第一材料和第二材料的半导体层。 第一和第二种材料可以是硅和锗。 器件的触点具有靠近半导体层的部分和远离半导体层的部分。 远侧部分包括第一材料和第二材料。 与松弛的半导体层相邻并且邻近接触的远端部分形成的金属层与松弛的半导体层和接触的远端部分同时反应以提供金属接触材料。

公开(公告)号：US20120299120A1

公开(公告)日：2012-11-29

申请号：US13568944

申请日：2012-08-07

申请人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

发明人： Glyn Braithwaite ,  Richard Hammond ,  Matthew Currie

IPC分类号： H01L27/088

CPC分类号： H01L29/7378 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78654 ,  H03B5/1203 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1221 ,  H03B5/1228 ,  H03B5/1243 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099

摘要： Circuits for processing radio frequency (“RF”) and microwave signals are fabricated using field effect transistors (“FETs”) that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators (“VCOs”), low noise amplifiers (“LNAs”), and phase locked loops (“PLLs”) built using these FETs also exhibit enhanced performance.

摘要翻译： 用于处理射频（RF）和微波信号的电路使用具有设置在一个或多个平坦化衬底层上的一个或多个应变通道层的场效应晶体管（FET）来制造。 具有这种结构的FET对于例如跨导和噪声系数显示出改善的值。 RF电路，例如压电振荡器（VCO），低噪声放大器（LNA）和使用这些FET构建的锁相环（PLL）也表现出增强的性能。