METHOD FOR OPTIMIZING AN INTEGRATED CIRCUIT LAYOUT DESIGN
    41.
    发明申请
    METHOD FOR OPTIMIZING AN INTEGRATED CIRCUIT LAYOUT DESIGN 有权
    优化集成电路布局设计的方法

    公开(公告)号:US20170024506A1

    公开(公告)日:2017-01-26

    申请号:US14807869

    申请日:2015-07-23

    CPC classification number: G06F17/5072 G03F1/36 G06F17/5081

    Abstract: A method for optimizing an integrated circuit layout design includes the following steps. A first integrated circuit layout design including a metal line feature having several metal lines and a second integrated circuit layout design including a hole feature having several holes are obtained. A line-end hole feature of the hole feature is selected by piecing the metal line feature with the hole feature. The line-end hole feature is classified into a single hole feature and a redundant hole feature by spacings between the adjacent holes by a computer system.

    Abstract translation: 一种用于优化集成电路布局设计的方法包括以下步骤。 获得包括具有多个金属线的金属线特征和包括具有多个孔的孔特征的第二集成电路布局设计的第一集成电路布局设计。 通过将具有孔特征的金属线特征拼接,选择孔特征的线端孔特征。 线端孔特征通过计算机系统由相邻孔之间的间隔分为单孔特征和冗余孔特征。

    PATTERN VERIFYING METHOD
    42.
    发明申请
    PATTERN VERIFYING METHOD 有权
    模式验证方法

    公开(公告)号:US20160147140A1

    公开(公告)日:2016-05-26

    申请号:US14601250

    申请日:2015-01-21

    CPC classification number: G03F1/36 G03F1/70 G03F1/72 G03F1/84

    Abstract: The present invention provides a pattern verifying method. First, a target pattern is decomposed into a first pattern and a second pattern. A first OPC process is performed for the first pattern to form a first revised pattern, and a second OPC process is performed for the second pattern to form a second revised pattern. An inspection process is performed, wherein the inspection process comprises an after mask inspection (AMI) process, which comprises considering the target pattern, the first pattern and the second pattern.

    Abstract translation: 本发明提供一种模式验证方法。 首先,将目标图案分解为第一图案和第二图案。 对第一图案执行第一OPC处理以形成第一修订图案,并且对第二图案执行第二OPC处理以形成第二修改图案。 执行检查过程,其中检查过程包括后掩模检查(AMI)处理,其包括考虑目标图案,第一图案和第二图案。

    METHOD FOR GENERATING LAYOUT PATTERN
    43.
    发明申请
    METHOD FOR GENERATING LAYOUT PATTERN 有权
    生成布局图案的方法

    公开(公告)号:US20150347657A1

    公开(公告)日:2015-12-03

    申请号:US14822907

    申请日:2015-08-11

    CPC classification number: G06F17/5068 G03F1/144 G03F1/36

    Abstract: A method of generating a layout pattern including a FinFET structure layout includes the following processes. First, a layout pattern, which includes a sub-pattern having pitches in simple integer ratios, is provided to a computer system. The sub-pattern is then classified into a first sub-pattern and a second sub-pattern. Afterwards, first stripe patterns and at least one second stripe pattern are generated. The longitudinal edges of the first stripe patterns are aligned with the longitudinal edges of the first sub-pattern and the first stripe patterns have equal spacings and widths. The positions of the second stripe patterns correspond to the positions of the blank pattern, and spacings or widths of the second stripe patterns are different from the spacings or widths of the first stripe patterns. Finally, the first stripe patterns and the second stripe pattern are outputted to a photomask.

    Abstract translation: 生成包括FinFET结构布局的布局图案的方法包括以下处理。 首先,将包括具有简单整数比例的间距的子图案的布局图案提供给计算机系统。 然后将子图案分类为第一子图案和第二子图案。 之后,产生第一条纹图案和至少一个第二条纹图案。 第一条形图案的纵向边缘与第一子图案的纵向边缘对准,并且第一条纹图案具有相等的间距和宽度。 第二条纹图案的位置对应于空白图案的位置,第二条纹图案的间距或宽度不同于第一条纹图案的间距或宽度。 最后,将第一条纹图案和第二条纹图案输出到光掩模。

    Mask set for double exposure process and method of using the mask set
    44.
    发明授权
    Mask set for double exposure process and method of using the mask set 有权
    双面曝光工艺的面膜套和使用面膜组的方法

    公开(公告)号:US09104833B2

    公开(公告)日:2015-08-11

    申请号:US14287079

    申请日:2014-05-26

    CPC classification number: G06F17/5081 G03F1/00 G03F1/70 G03F7/20 G03F7/70466

    Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.

    Abstract translation: 用于双曝光处理的掩模组和使用所述掩模组的方法。 掩模组具有第一掩模图案,其具有第一基底和多个第一齿和突出部分,第二掩模图案具有第二基底和多个第二牙齿,其中第二基底可以至少部分地与 第一基座,使得每个突出部分至少部分地与第二齿中的一个齿重叠。

    Method For Forming Photo-Mask And OPC Method
    45.
    发明申请
    Method For Forming Photo-Mask And OPC Method 有权
    形成光罩和OPC方法的方法

    公开(公告)号:US20150072272A1

    公开(公告)日:2015-03-12

    申请号:US14023476

    申请日:2013-09-11

    CPC classification number: G03F1/72 G03F1/144 G03F1/36

    Abstract: A method for forming a photo-mask is provided. A first photo-mask pattern relating to a first line, an original second photo-mask pattern relating to a first via plug, and a third photo-mask pattern relating to a second line are provided. A first optical proximity correction (OPC) process is performed. A second OPC process is performed, comprising enlarging a width of the second photo-mask pattern along the first direction to form a revised second photo-resist pattern. A contour simulation process is performed to make sure the revised second photo-mask pattern is larger or equal to the original second-mask pattern. The first photo-mask pattern, the revised second photo-mask pattern, and the third photo-mask pattern are output. The present invention further provides an OPC method.

    Abstract translation: 提供一种形成光掩模的方法。 提供与第一行相关的第一照片掩模图案,与第一通孔插头相关的原始第二照片掩模图案和与第二行相关的第三照片掩模图案。 执行第一光学邻近校正(OPC)处理。 执行第二OPC处理,包括沿着第一方向放大第二光掩模图案的宽度以形成修改的第二光刻胶图案。 执行轮廓模拟处理以确保修改的第二光掩模图案大于或等于原始第二掩模图案。 输出第一光掩模图案,修改的第二光掩模图案和第三光掩模图案。 本发明还提供一种OPC方法。

    METHOD FOR PATTERNING SEMICONDUCTOR STRUCTURE
    46.
    发明申请
    METHOD FOR PATTERNING SEMICONDUCTOR STRUCTURE 有权
    用于绘制半导体结构的方法

    公开(公告)号:US20140256132A1

    公开(公告)日:2014-09-11

    申请号:US13787912

    申请日:2013-03-07

    CPC classification number: H01L21/308 H01L27/1116

    Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.

    Abstract translation: 提供了一种图案化半导体结构的方法。 该方法包括以下步骤。 提供了在第一区域中限定第一图案的第一掩模和与第一区域相邻的第二区域中的第二图案。 由第一掩模限定的第一图案被转移到第一区域中的第一膜结构,并且由第一掩模限定的第二图案被转移到第二区域中的第一膜结构。 在第一膜结构上形成第二膜结构。 提供了在第一区域中限定第三图案的第二掩模。 由第一掩模限定的第一图案占据的第一区域的一部分的至少50%与由第二掩模限定的第三图案占据的第一区域的一部分相同。

    Method for patterning semiconductor structure
    47.
    发明授权
    Method for patterning semiconductor structure 有权
    图案化半导体结构的方法

    公开(公告)号:US08822328B1

    公开(公告)日:2014-09-02

    申请号:US13787912

    申请日:2013-03-07

    CPC classification number: H01L21/308 H01L27/1116

    Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.

    Abstract translation: 提供了一种图案化半导体结构的方法。 该方法包括以下步骤。 提供了在第一区域中限定第一图案的第一掩模和与第一区域相邻的第二区域中的第二图案。 由第一掩模限定的第一图案被转移到第一区域中的第一膜结构,并且由第一掩模限定的第二图案被转移到第二区域中的第一膜结构。 在第一膜结构上形成第二膜结构。 提供了在第一区域中限定第三图案的第二掩模。 由第一掩模限定的第一图案占据的第一区域的一部分的至少50%与由第二掩模限定的第三图案占据的第一区域的一部分相同。

    Method of optical proximity correction in combination with double patterning technique
    48.
    发明授权
    Method of optical proximity correction in combination with double patterning technique 有权
    光学邻近校正方法结合双重图案化技术

    公开(公告)号:US08701052B1

    公开(公告)日:2014-04-15

    申请号:US13748564

    申请日:2013-01-23

    CPC classification number: G03F7/70466 G03F1/36 G03F1/70 G03F7/70441

    Abstract: A method of optical proximity correction (OPC) includes the following steps. A layout pattern is provided to a computer system, and the layout pattern is classified into at least a first sub-layout pattern and at least a second sub-layout pattern. Then, at least an OPC calculation is performed respectively on the first sub-layout pattern and the second sub-layout pattern to form a corrected first sub-layout pattern and a corrected second sub-layout pattern. The corrected first sub-layout pattern/the corrected second sub-layout pattern and the layout pattern are compared to select a part of the corrected first sub-layout pattern/the corrected second sub-layout pattern as a first selected pattern/the second selected pattern, and the first selected pattern/the second selected pattern is further altered to modify the corrected first sub-layout pattern/the corrected second sub-layout pattern as a third sub-layout pattern/a fourth sub-layout pattern.

    Abstract translation: 光学邻近校正(OPC)的方法包括以下步骤。 将布局图案提供给计算机系统,并且布局图案被分类为至少第一子布局图案和至少第二子布局图案。 然后,分别对第一子布局图案和第二子布局图案执行至少OPC计算,以形成校正的第一子布局图案和校正的第二子布局图案。 将校正的第一子布局图案/校正的第二子布局图案和布局图案进行比较,以选择校正的第一子布局图案的一部分/校正的第二子布局图案作为第一选定图案/第二选定图案 进一步改变第一选择图案/第二选择图案,以将修正的第一子布局图案/校正后的第二子布局图案修改为第三子布局图案/第四子布局图案。

    Method for making photomask layout
    49.
    发明授权
    Method for making photomask layout 有权
    制作光掩模布局的方法

    公开(公告)号:US08627242B1

    公开(公告)日:2014-01-07

    申请号:US13754257

    申请日:2013-01-30

    CPC classification number: G03F1/36 G03F1/70

    Abstract: A method for making a photomask layout is provided. A first graphic data of a photomask is provided, wherein the first graphic data includes a first line with a first line end target, a second line with a second line end target and a hole, the first line is aligned with the second line, and the first line, the second line and the hole partially overlap with each other. Thereafter, a retarget step is performed to the first graphic data to obtain a second graphic data, wherein the retarget step includes moving the first line end target and the second line end target in opposite directions away from each other.

    Abstract translation: 提供了制造光掩模布局的方法。 提供光掩模的第一图形数据,其中第一图形数据包括具有第一行末端目标的第一行,具有第二行末端目标的第二行和第一行,第一行与第二行对齐,以及 第一线,第二线和孔部分地彼此重叠。 此后,对第一图形数据执行再次目标步骤以获得第二图形数据,其中重新目标步骤包括使第一行末端目标和第二行终点目标彼此相反的方向移动。

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