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    Method of fabricating a plurality of ferroelectric capacitors
    51.
    发明授权
    Method of fabricating a plurality of ferroelectric capacitors 失效
    制造多个铁电电容器的方法

    公开(公告)号：US07122441B2

    公开(公告)日：2006-10-17

    申请号：US11044958

    申请日：2005-01-26

    Applicant: Jung-Hoon Park ,  Hyun-Ho Kim

    Inventor： Jung-Hoon Park ,  Hyun-Ho Kim

    IPC: H01L21/8234

    CPC classification number: H01L28/55

    Abstract: In one embodiment, a plurality of bottom electrodes spaced apart from each other are formed on a lower insulating layer. A high-k dielectric layer and an upper conductive layer are sequentially and conformally formed overlying the bottom electrodes. The high-k dielectric layer and the upper conductive layer cover the bottom electrodes and the lower insulating layer between the bottom electrodes. A hard mask layer is selectively formed on the upper conductive layer to have an overhang over each of the bottom electrodes. Then the upper conductive layer is anisotropically etched using the hard mask layer as an etch mask, thereby forming upper electrodes spaced from each other. Therefore, a photolithography process of forming upper electrodes can be omitted, and damage to the upper electrodes due to etch can be prevented.

    Abstract translation: 在一个实施例中，在下绝缘层上形成彼此间隔开的多个底部电极。 高k电介质层和上导电层顺序并保形地形成在底电极上。 高k电介质层和上导电层覆盖底电极和底电极之间的下绝缘层。 在上导电层上选择性地形成硬掩模层，以在每个底电极上具有突出端。 然后使用硬掩模层作为蚀刻掩模对上导电层进行各向异性蚀刻，从而形成彼此间隔开的上电极。 因此，可以省略形成上电极的光刻工艺，并且可以防止由于蚀刻而导致的上电极损坏。

    In-line die attaching and curing apparatus for a multi-chip package
    52.
    发明授权
    In-line die attaching and curing apparatus for a multi-chip package 失效
    用于多芯片封装的在线模片安装和固化装置

    公开(公告)号：US07074646B2

    公开(公告)日：2006-07-11

    申请号：US11020931

    申请日：2004-12-22

    Applicant: Hyun-Ho Kim ,  Young-Kyun Sun ,  Kyoung-Bok Cho ,  Sung-Bok Hong

    Inventor： Hyun-Ho Kim ,  Young-Kyun Sun ,  Kyoung-Bok Cho ,  Sung-Bok Hong

    IPC: H01L21/50

    CPC classification number: H01L21/67144 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10T156/1744 ,  Y10T156/1798 ,  H01L2924/00 ,  H01L2224/4554

    Abstract: An in-line die attaching and curing apparatus for a multi-chip package (MCP) comprises at least one die attaching apparatus and at least one snap-cure apparatus. In one embodiment, the die attaching apparatus comprises a loader, an index rail, a transfer gripper, a wafer loader, a chip alignment table, an adhesive applying device and an apparatus for placing a device on a chip mounting area. The die attaching apparatus further comprises a UV radiation device and a vision camera. The adhesive curing apparatus comprises a frame providing unit being provided with the chip mounting frame from the index rail, a plurality of heating zones, each having a heating means, the heating means operable to raise and/or lower the temperature condition of the heating zones, a frame discharging unit discharging the chip mounting frame, and frame transfer means transferring the chip mounting frame from the frame providing unit to the frame discharging unit through the heating zones.

    Abstract translation: 一种用于多芯片封装（MCP）的在线裸片附着和固化设备包括至少一个模具附接装置和至少一个快速固化装置。 在一个实施例中，模具附接装置包括装载机，索引轨道，传送夹具，晶片装载机，芯片对准台，粘合剂施加装置和用于将装置放置在芯片安装区域上的装置。 模具附接装置还包括UV辐射装置和视觉相机。 粘合剂固化装置包括：框架提供单元，其从索引轨道设置有芯片安装框架;多个加热区域，每个具有加热装置，加热装置可操作以升高和/或降低加热区域的温度状态 ，排出芯片安装框架的框架排出单元和通过加热区域将框架设置单元从框架提供单元传送到框架排出单元的框架传送装置。

    Methods for fabricating ferroelectric memory devices
    53.
    发明申请
    Methods for fabricating ferroelectric memory devices 失效
    制造铁电存储器件的方法

    公开(公告)号：US20060049442A1

    公开(公告)日：2006-03-09

    申请号：US11250245

    申请日：2005-10-14

    Applicant: Hyun-ho Kim

    Inventor： Hyun-ho Kim

    IPC: H01L29/94

    CPC classification number: H01L27/11502 ,  H01L27/11507

    Abstract: A ferroelectric memory device includes a semiconductor substrate, ferroelectric capacitors, conductive patterns, and plate lines. The ferroelectric capacitors are arranged in rows and columns on the semiconductor substrate. The conductive patterns are arranged in even numbered and odd numbered rows. Each of the conductive patterns is on, and electrically connected to, a plurality of adjacent ones of the ferroelectric capacitors. The plate lines are in rows that extend along even numbered and odd numbered columns. The plate lines in the even numbered columns are electrically connected to at least two of the conductive patterns in the even numbered rows and are electrically isolated from the conductive patterns in the odd numbered rows. The plate lines in the odd numbered columns are electrically connected to at least two of the conductive patterns in the odd numbered rows and are electrically isolated from the conductive patterns in the even numbered rows.

    Abstract translation: 铁电存储器件包括半导体衬底，铁电电容器，导电图案和板线。 铁电电容器以半导体衬底上的行和列布置。 导电图案布置成偶数和奇数行。 每个导电图案与多个相邻的铁电电容器接通并电连接。 板线是沿着偶数和奇数列延伸的行。 偶数列中的平板线电连接到偶数行中的至少两个导电图案，并且与奇数行中的导电图案电隔离。 奇数列中的板线电连接到奇数行中的至少两个导电图案，并且与偶数行中的导电图案电隔离。

    Methods of fabricating ferroelectric memory devices having expanded plate lines
    56.
    发明申请
    Methods of fabricating ferroelectric memory devices having expanded plate lines 有权
    制造具有扩展板线的铁电存储器件的方法

    公开(公告)号：US20050117382A1

    公开(公告)日：2005-06-02

    申请号：US11029232

    申请日：2005-01-04

    Applicant: Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

    Inventor： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

    IPC: H01L27/105 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/115

    CPC classification number: H01L27/11502 ,  G11C11/22 ,  H01L27/11507

    Abstract: A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of rows and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

    Abstract translation: 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器，其被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸，其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线，并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线，并且使本地板线通过 绝缘层中的开口。 在一些实施例中，相邻行中的铁电电容器共享公共上电极，并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

    Methods of fabricating integrated circuit ferroelectric memory devices including plate lines directly on ferroelectric capacitors
    57.
    发明申请
    Methods of fabricating integrated circuit ferroelectric memory devices including plate lines directly on ferroelectric capacitors 有权
    制造集成电路铁电存储器件的方法，包括直接在铁电电容器上的板线

    公开(公告)号：US20050077561A1

    公开(公告)日：2005-04-14

    申请号：US10967936

    申请日：2004-10-19

    Applicant: Hyun-Ho Kim ,  Ki-Nam Kim

    Inventor： Hyun-Ho Kim ,  Ki-Nam Kim

    IPC: H01L27/105 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8246 ,  H01L23/522 ,  H01L27/115 ,  H01L27/108

    CPC classification number: H01L27/11502 ,  H01L23/522 ,  H01L27/11507 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Integrated circuit ferroelectric memory devices are provided that include an integrated circuit transistor. The memory device further includes a ferroelectric capacitor on the integrated circuit transistor. The ferroelectric capacitor includes a first electrode adjacent the transistor, a second electrode remote from the transistor and a ferroelectric film therebetween. The memory device further includes a plate line directly on the ferroelectric capacitor. Methods are also provided that include forming a ferroelectric capacitor on the integrated circuit transistor and forming a plate line directly on the ferroelectric capacitor.

    Abstract translation: 提供了包括集成电路晶体管的集成电路铁电存储器件。 存储器件还包括集成电路晶体管上的铁电电容器。 铁电电容器包括与晶体管相邻的第一电极，远离晶体管的第二电极和其间的铁电体膜。 存储装置还包括直接在铁电电容器上的板线。 还提供了包括在集成电路晶体管上形成铁电电容器并且在铁电电容器上直接形成板线的方法。

    Integrated circuit ferroelectric memory devices including plate lines directly on ferroelectric capacitors
    59.
    发明授权
    Integrated circuit ferroelectric memory devices including plate lines directly on ferroelectric capacitors 有权
    集成电路铁电存储器件，包括直接在铁电电容器上的板线

    公开(公告)号：US06828611B2

    公开(公告)日：2004-12-07

    申请号：US10054540

    申请日：2002-01-22

    Applicant: Hyun-Ho Kim ,  Ki-Nam Kim

    Inventor： Hyun-Ho Kim ,  Ki-Nam Kim

    IPC: H01L27108

    CPC classification number: H01L27/11502 ,  H01L23/522 ,  H01L27/11507 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Integrated circuit ferroelectric memory devices are provided that include an integrated circuit transistor. The memory device further includes a ferroelectric capacitor on the integrated circuit transistor. The ferroelectric capacitor includes a first electrode adjacent the transistor, a second electrode remote from the transistor and a ferroelectric film therebetween. The memory device further includes a plate line directly on the ferroelectric capacitor. Methods are also provided that include forming a ferroelectric capacitor on the integrated circuit transistor and forming a plate line directly on the ferroelectric capacitor.

    Abstract translation: 提供了包括集成电路晶体管的集成电路铁电存储器件。 存储器件还包括集成电路晶体管上的铁电电容器。 铁电电容器包括与晶体管相邻的第一电极，远离晶体管的第二电极和其间的铁电体膜。 存储装置还包括直接在铁电电容器上的板线。 还提供了包括在集成电路晶体管上形成铁电电容器并且在铁电电容器上直接形成板线的方法。

    Fluorescent indication clip for surgery
    60.
    发明授权
    Fluorescent indication clip for surgery 有权
    手术荧光指示夹

    公开(公告)号：US08688195B2

    公开(公告)日：2014-04-01

    申请号：US12612305

    申请日：2009-11-04

    Applicant: Dae-Kyung Sohn ,  Kwang-Gi Kim ,  Yong-Doo Choi ,  Kyoung-Won Nam ,  Hyun-Ho Kim

    Inventor： Dae-Kyung Sohn ,  Kwang-Gi Kim ,  Yong-Doo Choi ,  Kyoung-Won Nam ,  Hyun-Ho Kim

    IPC: A61B5/05

    CPC classification number: A61B17/1227 ,  A61B17/1285 ,  A61B2090/3908 ,  A61B2090/3941

    Abstract: Provided is a fluorescent indication clip for surgery that has an improved function as a position indicator due to a photo-reactive fluorescent material included in the bio-clip, and allows people to rapidly and easily detect the accurate position of an internal operation region, and thus can improve operation accuracy and reduce side effects caused by excessive incision. The fluorescent indication clip includes a self-spreadable clip body, a fluorescent indicator prepared at the rear end of the clip body and including a photo-reactive fluorescent material, and a clamper configured to slide from a position at which the clamper is mounted on the fluorescent indicator to the clip body by an external force, and fasten the clip body to narrow front ends of the clip body.

    Abstract translation: 提供了一种用于手术的荧光指示夹，其由于生物夹中包含的光反应性荧光材料而具有作为位置指示器的功能的改善，并且允许人们快速且容易地检测内部操作区域的准确位置，以及 从而可以提高手术精度，减少由于切口引起的副作用。 荧光指示夹包括自扩展夹体，荧光指示器，其准备在夹主体的后端并包括光反应荧光材料，以及夹持器，构造成从夹持器安装在其上的位置滑动 通过外力将荧光指示器固定到夹体上，并将夹具体紧固到夹子主体的窄前端。

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